AK8975 DataSheet

[AK8975/C]
AK8975/AK8975C
3-axis Electronic Compass
1. Features
A 3-axis electronic compass IC with high sensitive Hall sensor technology.
Best adapted to pedestrian city navigation use for cell phone and other portable appliance.
Functions:
• 3-axis magnetometer device suitable for compass application
• Built-in A to D Converter for magnetometer data out
• 13 bit data out for each 3 axis magnetic components
- Sensitivity: 0.3 µT / LSB typ.
• Serial interface
- I2C bus interface.
Standard mode and Fast mode compliant with Philips I2C specification Ver.2.1
- 4-wire SPI
• Operation mode:
Power-down mode, Single Measurement mode, Self test mode and Fuse access mode.
• DRDY function for measurement data ready
• Magnetic sensor overflow monitor function
• Built-in oscillator for internal clock source
• Power on Reset circuit
• Self test function with built-in internal magnetic source
Operating temperatures:
•
-30°C to +85°C
Operating supply voltage:
• Analog power supply
+2.4V to +3.6V
• Digital Interface supply
+1.65V to analog power supply voltage.
Current consumption:
• Power-down:
10 µA max.
• Measurement:
- Average power consumption at 8 Hz repetition rate: 350 µA typ.
Package:
AK8975 16-pin QFN package:
AK8975C 14-pin WL-CSP (BGA):
MS1187-E-02
4.0 mm × 4.0 mm × 0.75 mm
2.0 mm × 2.0 mm × 0.6 mm
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2010/05
[AK8975/C]
2. Overview
AK8975/C is 3-axis electronic compass IC with high sensitive Hall sensor technology.
Small package of AK8975/C incorporates magnetic sensors for detecting terrestrial magnetism in the X-axis,
Y-axis, and Z-axis, a sensor driving circuit, signal amplifier chain, and an arithmetic circuit for processing the
signal from each sensor. Self test function is also incorporated. From its compact foot print and thin package
feature, it is suitable for map heading up purpose in GPS-equipped cell phone to realize pedestrian navigation
function.
AK8975/C has the following features:
(1) Silicon monolithic Hall-effect magnetic sensor with magnetic concentrator realizes 3-axis magnetometer
on a silicon chip. Analog circuit, digital logic, power block and interface block are also integrated on a
chip.
(2) Wide dynamic measurement range and high resolution with lower current consumption.
Output data resolution:
13 bit (0.3 µT / LSB)
Measurement range:
±1200 µT
Average power consumption at 8Hz repetition rate: 350 µA typ.
(3) Digital serial interface
- I2C bus interface to control AK8975/C functions and to read out the measured data by external CPU. A
dedicated power supply for I2C bus interface can work in low-voltage apply as low as 1.65V.
- 4-wire SPI is also supported. A dedicated power supply for SPI can work in low-voltage apply as low as
1.65V.
(4) DRDY pin and register inform to system that measurement is end and set of data in registers are ready to
be read.
(5) Device is worked by on-chip oscillator so no external clock source is necessary.
(6) Self test function with internal magnetic source to confirm magnetic sensor operation on end products.
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3. Table of Contents
1.
2.
3.
4.
Features ....................................................................................................................................1
Overview ...................................................................................................................................2
Table of Contents ......................................................................................................................3
Circuit Configuration ..................................................................................................................5
4.1. Block Diagram ....................................................................................................................5
4.2. Block Function....................................................................................................................5
4.3. Pin Function .......................................................................................................................6
5. Overall Characteristics ..............................................................................................................7
5.1. Absolute Maximum Ratings................................................................................................7
5.2. Recommended Operating Conditions ................................................................................7
5.3. Electrical Characteristics ....................................................................................................7
5.3.1.
DC Characteristics ......................................................................................................7
5.3.2.
AC Characteristics ......................................................................................................8
5.3.3.
Analog Circuit Characteristics .....................................................................................8
5.3.4.
4-wire SPI ...................................................................................................................9
5.3.5.
I2C Bus Interface .......................................................................................................10
6. Functional Explanation ............................................................................................................ 11
6.1. Power States .................................................................................................................... 11
6.2. Reset Functions ............................................................................................................... 11
6.3. Operation Modes..............................................................................................................12
6.4. Description of Each Operation Mode................................................................................13
6.4.1.
Power-down Mode ....................................................................................................13
6.4.2.
Single Measurement Mode .......................................................................................13
6.4.2.1.
Data Ready ........................................................................................................13
6.4.2.2.
Data Error ..........................................................................................................14
6.4.2.3.
Magnetic Sensor Overflow .................................................................................14
6.4.3.
Self-test Mode ...........................................................................................................15
6.4.4.
Fuse ROM Access Mode ..........................................................................................15
7. Serial Interface ........................................................................................................................16
7.1. 4-wire SPI.........................................................................................................................16
7.1.1.
Writing Data ..............................................................................................................16
7.1.2.
Reading Data ............................................................................................................17
7.2. I2C Bus Interface ..............................................................................................................18
7.2.1.
Data Transfer ............................................................................................................18
7.2.1.1.
Change of Data..................................................................................................18
7.2.1.2.
Start/Stop Condition ...........................................................................................18
7.2.1.3.
Acknowledge......................................................................................................19
7.2.1.4.
Slave Address ....................................................................................................19
7.2.2.
WRITE Instruction .....................................................................................................20
7.2.3.
READ Instruction.......................................................................................................21
7.2.3.1.
One Byte READ .................................................................................................21
7.2.3.2.
Multiple Byte READ ...........................................................................................21
8. Registers .................................................................................................................................22
8.1. Description of Registers ...................................................................................................22
8.2. Register Map....................................................................................................................23
8.3. Detailed Description of Registers .....................................................................................24
8.3.1.
WIA: Device ID..........................................................................................................24
8.3.2.
INFO: Information......................................................................................................24
8.3.3.
ST1: Status 1.............................................................................................................24
8.3.4.
HXL to HZH: Measurement Data...............................................................................25
8.3.5.
ST2: Status 2.............................................................................................................26
8.3.6.
CNTL: Control ...........................................................................................................26
8.3.7.
RSV: Reserved .........................................................................................................27
8.3.8.
ASTC: Self Test Control ............................................................................................27
8.3.9.
TS1, TS2: Test 1, 2 ...................................................................................................27
8.3.10. I2CDIS: I2C Disable...................................................................................................27
8.3.11. ASAX, ASAY, ASAZ: Sensitivity Adjustment values...................................................28
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9.
Example of Recommended External Connection ....................................................................29
9.1. I2C Bus Interface ..............................................................................................................29
9.2. 4-wire SPI.........................................................................................................................30
10. Package ..................................................................................................................................31
10.1. Marking ............................................................................................................................31
10.2. Pin Assignment ................................................................................................................31
10.3. Outline Dimensions ..........................................................................................................32
10.4. Recommended Foot Print Pattern ....................................................................................33
11. Relationship between the Magnetic Field and Output Code....................................................34
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4. Circuit Configuration
4.1.
Block Diagram
3-axis
Hall
sensor
Chopper
SW
PreAMP
Integrator
ADC
MUX
OSC1
HE-Drive
Magnetic source
Interface,
Logic
& Register
Timing
Control
Voltage
Reference
SCL/SK
SDA/SI
CSB
SO
DRDY
POR
CAD0
4.2.
CAD1
TST1
TST2
RSV
TST6
VSS
VDD
FUSE ROM
VID
Block Function
Block
3-axis Hall sensor
MUX
Chopper SW
HE-Drive
Pre-AMP
Integrator & ADC
OSC1
POR
Interface Logic
Timing Control
Magnetic Source
FUSE ROM
MS1187-E-02
Function
Monolithic Hall elements.
Multiplexer for selecting Hall elements.
Performs chopping.
Magnetic sensor drive circuit for constant-current driving of sensor
Variable-gain differential amplifier used to amplify the magnetic sensor signal.
Integrates and amplifies pre-AMP output and performs analog-to-digital
conversion.
Generates an operating clock for sensor measurement.
6.144MHz(typ.)
Power On Reset circuit. Generates reset signal on rising edge of VDD.
Exchanges data with an external CPU.
DRDY pin indicates sensor measurement end and data is ready to be read.
I2C bus interface using two pins, namely, SCL and SDA. Standard mode and Fast
mode are supported. The low-voltage specification can be supported by applying
1.65V to the VID pin.
4-wire SPI is also supported by SK, SI, SO and CSB pins.
4-wire SPI works in VID pin voltage down to 1.65V, too.
Generates a timing signal required for internal operation from a clock generated
by the OSC1.
Generates magnetic field for self test of magnetic sensor.
Fuse for adjustment
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4.3.
Pin Function
Pin No.
Pin
Power
I/O
supply
Type
75
75C
name
1
A1
TST1
O
VDD
ANALOG
2
A2
CSB
I
VID
CMOS
3
A4
RSV
I
VID
CMOS
Function
system
Test pin.
Hi-Z output. Keep this pin electrically nonconnected.
Chip select pin for 4-wire SPI.
2
“L” active. Connect to VID when selecting I C bus interface.
Reserved pin.
Keep this pin electrically nonconnected or connect to VSS.
2
When the I C bus interface is selected (CSB pin is connected to
VID)
SCL
4
A3
I
VID
CMOS
SCL: Control data clock input pin
Input: Schmidt trigger
When the 4-wire SPI is selected
SK
SK: Serial clock input pin
2
When the I C bus interface is selected (CSB pin is connected to VID)
SDA
5
I/O
D4
SDA: Control data input/output pin
VID
SI
CMOS
Input: Schmidt trigger, Output: Open drain
When the 4-wire SPI is selected
I
SI: Serial data input pin
2
When the I C bus interface is selected (CSB pin is connected to VID)
6
B4
SO
O
VID
CMOS
Hi-Z output. Keep this pin electrically nonconnected.
When the 4-wire SPI is selected
Serial data output pin
7
C4
VID
8
-
NC1
9
B3
TST6
-
-
Power
Digital interface positive power supply pin.
Non-contact pin.
Keep this pin electrically nonconnected.
Test pin.
O
VID
CMOS
Vss output. Keep this pin electrically nonconnected or connect to
VSS..
Data ready signal output pin.
10
C3
DRDY
O
VID
CMOS
Active “H”. Informs measurement ended and data is ready to be
read.
2
When the I C bus interface is selected (CSB pin is connected to VID)
CAD1: Slave address 1 input pin
11
D2
CAD1
I
VDD
CMOS
Connect to VSS or VDD.
When the 4-wire serial interface is selected
Connect to VSS.
12
-
NC2
Non-contact pin. Keep this pin electrically nonconnected.
2
When the I C bus interface is selected (CSB pin is connected to VID)
CAD0: Slave address 0 input pin
13
D1
CAD0
I
VDD
CMOS
Connect to VSS or VDD.
When the 4-wire serial interface is selected
Connect to VSS.
Test pin.
14
C2
TST2
O
VDD
ANALOG
15
C1
VSS
-
-
Power
Ground pin.
16
B1
VDD
-
-
Power
Analog Power supply pin.
MS1187-E-02
Hi-Z output. Keep this pin electrically nonconnected.
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[AK8975/C]
5. Overall Characteristics
5.1.
Absolute Maximum Ratings
Vss=0V
Parameter
Symbol
Min.
Max.
Unit
V+
-0.3
+6.5
Power supply voltage
V
(Vdd, Vid)
VIN
-0.3
(V+)+0.3
Input voltage
V
IIN
mA
Input current
±10
TST
-40
+125
Storage temperature
°C
(Note 1) If the device is used in conditions exceeding these values, the device may be destroyed. Normal operations
are not guaranteed in such exceeding conditions.
5.2.
Recommended Operating Conditions
Vss=0V
Parameter
Operating temperature
Power supply voltage
5.3.
Remark
VDD pin voltage
VID pin voltage
Symbol
Ta
Vdd
Vid
Min.
-30
2.4
1.65
Typ.
3.0
Max.
+85
3.6
Vdd
Unit
°C
V
V
Electrical Characteristics
The following conditions apply unless otherwise noted:
Vdd=2.4V to 3.6V, Vid=1.65V to Vdd, Temperature range=-30°C to 85°C
5.3.1. DC Characteristics
Parameter
High level input voltage 1
Symbol
VIH1
Low level input voltage 1
High level input voltage 2
Low level input voltage 2
High level input voltage 3
Low level input voltage 3
Input current
VIL1
VIH2
VIL2
VIH3
VIL3
IIN
Hysteresis input voltage
(Note 2)
VHS
High level output voltage 1
Low level output voltage 1
Low level output voltage 2
(Note 3)(Note 4)
Current consumption
VOH1
VOL1
VOL2
SO
DRDY
SDA
IDD1
VDD
VID
IDD2
IDD3
(Note 6)
Pin
CSB
SK
SI
SCL
SDA
CAD0
CAD1
SCL
SK
SDA
SI
CSB
SCL
SDA
Condition
Min.
70%Vid
Typ.
Max.
Unit
V
30%Vid
30%Vdd
+10
V
V
V
V
V
μA
3
20%Vid
0.4
20%Vid
10
V
V
V
V
V
V
μA
6
10
mA
10.3
15
mA
70%Vid
30%Vid
70%Vdd
Vin=Vss or Vid
Vid≥2V
Vid<2V
IOH≥-100µA (Note 5)
IOL≤+100µA (Note 5)
IOL≤3mA Vid≥2V
IOL≤3mA Vid<2V
Power-down mode
Vdd=Vid=3.0V
When magnetic sensor
is driven
Self-test mode
-10
5%Vid
10%Vid
80%Vid
(Note 2) Schmitt trigger input (reference value for design)
(Note 3) Maximum load capacitance: 400pF (capacitive load of each bus line applied to the I2C bus interface)
(Note 4) Output is open-drain. Connect a pull-up resistor externally.
(Note 5) Load capacitance: 20pF
(Note 6) Reference value for design.
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5.3.2. AC Characteristics
Parameter
Power supply rise time
(Note 7)
Symbol
tPUP
Power-down mode transit
time (Note 7)
Wait time before mode
setting
Pin
VDD
VDD
Condition
Period of time from
10%Vdd to 90%Vdd
(Note 8)
Period of time from
90%Vdd at power-on to
Power-down mode
Twat
Min.
100
Typ.
Max.
200
Unit
µs
100
µs
μs
(Note 7) Reference value for design
(Note 8) Only when VDD meets this condition, POR circuit starts and resets AK8975/C. After reset, all registers are
initialized and AK8975/C transits to Power-down mode.
tPUP
90%Vdd
10%Vdd
5.3.3. Analog Circuit Characteristics
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
DBIT
13
bit
Measurement data output bit
TSM
Single measurement mode
7.3
9
ms
Time for measurement
BSE
0.285
0.3
0.315 μT/LSB
Magnetic sensor sensitivity
Tc=25°C (Note 9)
BRG
Tc=25°C
(Note
9)
±1229
Magnetic sensor measurement
μT
range (Note 10)
Tc=25°C
-1000
+1000
LSB
Magnetic sensor initial offset
(Note 11)
(Note 9) Value after sensitivity is adjusted using sensitivity fine adjustment data stored in Fuse ROM. (Refer to
8.3.11 for how to adjust.)
(Note 10) Reference value for design
(Note 11) Value of measurement data register on shipment without applying magnetic field on purpose.
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5.3.4. 4-wire SPI
4-wire SPI is compliant with mode 3
Parameter
Symbol
CSB setup time
Tcs
Data setup time
Ts
Data hold time
Th
SK high time
Twh
SK low time
Twl
Condition
Vid≥2.5V
2.5V>Vid≥1.65V
Vid≥2.5V
2.5V>Vid≥1.65V
SK setup time
Tsd
SK to SO delay time
Tdd
(Note 12)
CSB to SO delay time
Tcd
(Note 12)
SK rise time (Note 13)
Tr
SK fall time (Note 13)
Tf
CSB high time
Tch
(Note 12) SO load capacitance: 20pF
(Note 13) Reference value for design.
Min.
50
50
50
100
150
100
150
50
Typ.
Max.
50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
50
ns
100
100
ns
ns
ns
150
[4-wire SPI]
Tch
Tcs
Tsd
CSB
Ts
Th
Tdd
Twh
Tcd
Twl
SK
SI
Hi-Z
Hi-Z
SO
[Rise time and fall time]
Tr
Tf
0.9Vid
0.1Vid
SK
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5.3.5. I2C Bus Interface
CSB pin = “H”
I2C bus interface is compliant with Standard mode and Fast mode. Standard/Fast mode is selected
automatically by fSCL.
(1) Standard mode
fSCL≤100kHz
1.65V≤Vid≤Vdd
Symbol
Parameter
fSCL
SCL clock frequency
tHIGH
SCL clock "High" time
tLOW
SCL clock "Low" time
tR
SDA and SCL rise time
tF
SDA and SCL fall time
tHD:STA
Start Condition hold time
tSU:STA
Start Condition setup time
tHD:DAT
SDA hold time (vs. SCL falling edge)
tSU:DAT
SDA setup time (vs. SCL rising edge)
tSU:STO
Stop Condition setup time
tBUF
Bus free time
Min.
Typ.
Max.
100
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
ns
μs
μs
4.0
4.7
1.0
0.3
4.0
4.7
0
250
4.0
4.7
(2) Fast mode
100kHz<fSCL≤400kHz
1.65V≤Vid≤Vdd
Symbol
Parameter
fSCL
SCL clock frequency
tHIGH
SCL clock "High" time
tLOW
SCL clock "Low" time
tR
SDA and SCL rise time
tF
SDA and SCL fall time
tHD:STA
Start Condition hold time
tSU:STA
Start Condition setup time
tHD:DAT
SDA hold time (vs. SCL falling edge)
tSU:DAT
SDA setup time (vs. SCL rising edge)
tSU:STO
Stop Condition setup time
tBUF
Bus free time
tSP
Noise suppression pulse width
Min.
Typ.
Max.
400
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
ns
μs
μs
ns
0.6
1.3
0.3
0.3
0.6
0.6
0
100
0.6
1.3
50
[I2C bus interface timing]
1/fSCL
VIH3
SCL
VIL3
VIH3
SDA
VIL3
tLOW
tBUF
tR
tHIGH
tF
tSP
VIH3
SCL
VIL3
tHD:STA
Stop
Start
MS1187-E-02
tHD:DAT
tSU:DAT
tSU:STA
tSU:STO
Start
Stop
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[AK8975/C]
6. Functional Explanation
6.1.
Power States
When VDD and VID are turned on from Vdd=OFF (0V) and Vid=OFF (0V), all registers in AK8975/C are
initialized by POR circuit and AK8975/C transits to Power-down mode.
All the states in the table below can be set, although the transition from state 2 to state 3 and the transition from
state 3 to state 2 are prohibited.
States
1
6.2.
VDD
OFF (0V)
2
3
OFF (0V)
2.4V to 3.6V
4
2.4V to 3.6V
VID
OFF (0V)
Power states
OFF (0V).
SCL, SDA should be fixed to the voltage that does
not exceed 3.6V. Other digital pins should be fixed
to L(0V).
1.65V to 3.6V OFF (0V). It doesn’t affect external interface.
OFF (0V)
OFF (0V). It consumes current same as
Power-down mode.
SCL, SDA should be fixed to the voltage that does
not exceed 3.6V. Other digital pins should be fixed
to L (0V).
1.65V to Vdd ON
Table 6.1
Reset Functions
AK8975/C has two types of reset;
(1) Power on reset (POR)
When Vdd reaches approximately 2V (reference value for design), POR circuit operates, and AK8975/C
is reset.
(2) VID monitor
When Vid is turned OFF (0V), AK8975/C is reset.
When AK8975/C is reset, all registers are initialized and AK8975/C transits to Power-down mode.
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6.3.
Operation Modes
AK8975/C has following four operation modes:
(1) Power-down mode
(2) Single measurement mode
(3) Self-test mode
(4) Fuse ROM access mode
By setting CNTL register MODE[3:0] bits, the operation set for each mode is started.
A transition from one mode to another is shown below.
Power-down
MOD E[3:0]=“0001”
mode
Single m easurement mode
Sensor is measured for one time and data is output.
Transit s to Power-down m ode automatically after
measurement ended.
Transits automatically
MOD E[3:0]=“0000”
MOD E[3:0]=“1000”
Self-test m ode
Sensor is self-tested and the result is output. Transits
to Power-down m ode automatically.
Transits automatically
MOD E[3:0]=“0000”
MODE[3:0]=“1111”
MODE[3:0]=“0000”
Fuse R OM access m ode
Turn on the circuit needed to read out Fuse ROM.
Transits to Power-down mode by writing
MODE[3:0]=“0000”.
Figure 6.1 Operation modes
When power is turned ON, AK8975/C is in power-down mode. When MODE[3:0] is set, AK8975/C transits to
the specified mode and starts operation. When user wants to change operation mode, transit to power-down
mode first and then transit to other modes. After power-down mode is set, at least 100μs(Twat) is needed
before setting another mode.
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6.4.
Description of Each Operation Mode
6.4.1. Power-down Mode
Power to all internal circuits is turned off. All registers except fuse ROM are accessible in power-down mode.
Data stored in read/write registers are remained.
6.4.2. Single Measurement Mode
When single measurement mode (MODE[3:0]=“0001”) is set, sensor is measured, and after sensor
measurement and signal processing is finished, measurement data is stored to measurement data registers
(HXL to HZH), then AK8975/C transits to power-down mode automatically. On transition to power-down
mode, MODE[3:0] turns to “0000”. At the same time, DRDY bit in ST1 register turns to “1”. This is called
“Data Ready”. When any of measurement data register (HXL to HZH) or ST2 register is read, or operation
mode is changed from power-down mode to other mode, DRDY bit turns to “0”. DRDY pin is in the same state
as DRDY bit.
Operation Mode:
Power-down
Single measuremnet
(1)
(2)
(3)
IndefiniteData(2)
IndefiniteData(3)
Measurement period
Measurement Data Register
Last Data
IndefiniteMeasurement Data (1)
DRDY
Register Read
Register Write
Data Register
Data Register
MODE[3:0]="0001"
MODE[3:0]="0001"
MODE[3:0]="0001"
Figure 6.2 Single measurement mode
6.4.2.1. Data Ready
When measurement data is stored and ready to be read, DRDY bit in ST1 register turns to “1”. This is called
“Data Ready”. DRDY pin is in the same state as DRDY bit. When measurement is performed correctly,
AK8975/C becomes Data Ready on transition to Power-down mode (PD) after measurement. The period from
the end of Nth measurement to the start of (N+1)th measurement is called “Data Readable Period”. Stored
measurement data should be read during Data Readable Period.
(N-1)th
PD
Nth
Measurement
(N+1)th
Measurement
PD
PD
Data Readable Period
Data Readable Period
Figure 6.3 Data Readable Period
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6.4.2.2. Data Error
When data reading is started out of data readable period, read data is not correct. In this case, DERR bit of ST2
register turns to “1” so that read data can be checked at the end of data reading. DERR turns to “0” when ST2
register is read.
(N-1)th
PD
Nth
Measurement
(N+1)th
Measurement
PD
Data Readable Period
Measurement Data Register
(N-1)th Indefinite
Nth
PD
Data Readable Period
Indefinite
(N+1)th
Ind
DRDY
DERR
Register Read
ST1 Data
ST2
Register
ST1 Data
ST2
Register
ST1 Data
ST2
Register
Figure 6.4 Data Error
6.4.2.3. Magnetic Sensor Overflow
AK8975/C has the limitation for measurement range that the sum of absolute values of each axis should be
smaller than 2400μT.
|X|+|Y|+|Z| < 2400μT
When the magnetic field exceeded this limitation, data stored at measurement data are not correct. This is
called Magnetic Sensor Overflow.
When magnetic sensor overlow occurs, HOFL bit turns to “1”. When the next measurement starts, it returns to
“0”.
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[AK8975/C]
6.4.3. Self-test Mode
Self-test mode is used to check if the sensor is working normally.
When self-test mode (MODE[3:0]=“1000”) is set, magnetic field is generated by the internal magnetic source
and sensor is measured. Measurement data is stored to measurement data registers (HXL to HZH), then
AK8975/C transits to power-down mode automatically.
Before setting self-test mode, write “1” to SELF bit of ASTC register. Data read sequence and functions of
read-only registers in self-test mode is the same as single measurement mode.
When self-test is end, write “0” to SELF bit then proceed to other operation.
<Self-test Sequence>
(1) Set Power-down mode
(2) Write “1” to SELF bit of ASTC register
(3) Set Self-test Mode
(4) Check Data Ready or not by any of the following method.
- Polling DRDY bit of ST1 register
- Monitor DRDY pin
When Data Ready, proceed to the next step.
(5) Read measurement data (HXL to HZH)
(6) Write “0” to SELF bit of ASTC register
<Self-test Judgement>
When measurement data read by the above sequence is in the range of following table after sensitivity
adjustment (refer to 8.3.11), AK8975/C is working normally.
Criteria
HX[15:0]
HY[15:0]
HZ[15:0]
-100≤X≤+100
-100≤Y≤+100
-1000≤Z≤-300
6.4.4. Fuse ROM Access Mode
Fuse ROM access mode is used to read Fuse ROM data.Sensitivity adjustment data for each axis is stored in
fuse ROM. These data are used in calculation of direction by the external CPU.
When Fuse ROM mode (MODE[3:0]=“1111”) is set, circuits reauired for reading fuse ROM are turned on.
After reading fuse ROM data, set power-down mode (MODE[3:0]=“0000”).
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[AK8975/C]
7. Serial Interface
AK8975/C supports I2C bus interface and 4-wire SPI. A selection is made by CSB pin. When used as 3-wire
SPI, set SI pin and SO pin wired-OR externally.
CSB pin=“L”:
4-wire SPI
CSB pin=“H”: I2C bus interface
7.1.
4-wire SPI
The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB. It is compliant with sequencial read
operation.
Data consists of Read/Write control bit (R/W), register address (7bits) and control data (8bits).
CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on the
falling edge of SK pin. (SPI MODE3)
Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must be
“H” during CSB pin is in transition. Also, it is prohibited to change SI pin during CSB pin is “H” and SK pin is
“H”.
7.1.1. Writing Data
Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits input
data, the first 8 bits specify the R/W control bit (R/W=“0” when writing) and register address (7bits), and the
latter 8 bits are control data (8bits). When any of addresses listed on Table 8.1 is input, AK8975/C recognizes
that it is selected and takes in latter 8 bits as setting data.
If the number of clock pulses is less than 16, no data is written. If the number of clock pulses is more than 16,
data after the 16th clock pulse on SI pin are ignored.
It is not compliant with sereal write operation for multiple addresses.
CSB
1
2
3
4
5
6
7
8
9
A6
A5
A4
A3
A2
A1
A0
D7
10
11
12
13
14
15
16
SK
SI
RW
D6
D5
D4
D3
D2
D1
D0
(INPUT)
SO
Hi-Z
(OUTPUT)
Figure 7.1 4-wire SPI Writing Data
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[AK8975/C]
7.1.2. Reading Data
Input the R/W control bit (R/W=“1”) and 7 bit register address on SI pin in synchronous with the first 8 bits of
the 16 bits of a serial clock input on SK pin. Then AK8975/C outputs the data held in the specified register
with MSB first from SO pin.
When clocks are input continuously after one byte of data is read, the address is incremented and data in the
next address is output. Accordingly, after the falling edge of the 15th clock and CSB pin is “L”, the data in the
next address is output on SO pin. When CSB pin is driven “L” to “H”, SO pin is placed in the high-impedance
state.
AK8975/C has two incrementation lines; 00H to 0CH and 10H to 12H. For example, data is read as follows:
00H -> 01H ... -> 0BH -> 0CH -> 00H -> 01H ..., and 10H -> 11H -> 12H -> 10H …
When specified address is other than 00H to 12H, AK8975/C recognizes that it is not selected and keeps SO
pin in high-impedance state. Therefore, user can use other addresses for other devices.
CSB
1
2
3
4
5
6
7
8
RW
A6
A5
A4
A3
A2
A1
A0
9
10
11
12
13
14
15
16
SK
SI
(INPUT)
SO
(OUTPUT)
Hi-Z
Hi-Z
D7
D6
D5
D4
D3
D2
D1
D0
Figure 7.2 4-wire SPI Reading Data
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[AK8975/C]
7.2.
I2C Bus Interface
The I2C bus interface of AK8975/C supports the standard mode (100 kHz max.) and the fast mode (400 kHz
max.).
7.2.1. Data Transfer
To access AK8975/C on the bus, generate a start condition first.
Next, transmit a one-byte slave address including a device address. At this time, AK8975/C compares the slave
address with its own address. If these addresses match, AK8975/C generates an acknowledgement, and then
executes READ or WRITE instruction. At the end of instruction execution, generate a stop condition.
7.2.1.1. Change of Data
A change of data on the SDA line must be made during "Low" period of the clock on the SCL line. When the
clock signal on the SCL line is "High", the state of the SDA line must be stable. (Data on the SDA line can be
changed only when the clock signal on the SCL line is "Low".)
During the SCL line is "High", the state of data on the SDA line is changed only when a start condition or a
stop condition is generated.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 7.3 Data Change
7.2.1.2. Start/Stop Condition
If the SDA line is driven to "Low" from "High" when the SCL line is "High", a start condition is generated.
Any instruction starts with a start condition.
If the SDA line is driven to "High" from "Low" when the SCL line is "High", a stop condition is generated.
Any instruction stops with a stop condition.
SCL
SDA
START CONDITION
STOP CONDITION
Figure 7.4 Start and Stop Conditions
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[AK8975/C]
7.2.1.3. Acknowledge
The IC that is transmitting data releases the SDA line (in the "High" state) after sending 1-byte data.
The IC that receives the data drives the SDA line to "Low" on the next clock pulse. This operation is referred to
acknowledge. With this operation, whether data has been transferred successfully can be checked.
AK8975/C generates an acknowledge after reception of a start condition and slave address.
When a WRITE instruction is executed, AK8975/C generates an acknowledge after every byte is received.
When a READ instruction is executed, AK8975/C generates an acknowledge then transfers the data stored at
the specified address. Next, AK8975/C releases the SDA line then monitors the SDA line. If a master IC
generates an acknowledge instead of a stop condition, AK8975/C transmits the 8bit data stored at the next
address. If no acknowledge is generated, AK8975/C stops data transmission.
Clock pulse
for acknowledge
SCL FROM
MASTER
1
8
9
DATA
OUTPUT BY
TRANSMITTER
not acknowledge
DATA
OUTPUT BY
RECEIVER
START
CONDITION
acknowledge
Figure 7.5 Generation of Acknowledge
7.2.1.4. Slave Address
The slave address of AK8975/C can be selected from the following list by setting CAD0/1 pin. When CAD pin
is fixed to VSS, the corresponding slave address bit is “0”. When CAD pin is fixed to VDD, the corresponding
slave address bit is “1”.
CAD1
CAD0
Slave Address
0
0
0CH
0
1
0DH
1
0
0EH
1
1
0FH
Table 7.1 Slave Address and CAD0/1 pin
The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is
selected from the ICs on the bus according to the slave address.
When a slave address is transferred, the IC whose device address matches the transferred slave address
generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a
R/W bit.
When the R/W bit is set to "1", READ instruction is executed. When the R/W bit is set to "0", WRITE
instruction is executed.
MSB
0
LSB
0
0
1
1
CAD1
CAD0
R/W
Figure 7.6 Slave Address
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[AK8975/C]
7.2.2. WRITE Instruction
When the R/W bit is set to "0", AK8975/C performs write operation.
In write operation, AK8975/C generates an acknowledge after receiving a start condition and the first byte
(slave address) then receives the second byte. The second byte is used to specify the address of an internal
control register and is based on the MSB-first configuration.
MSB
A7
LSB
A6
A5
A4
A3
A2
A1
A0
Figure 7.7 Register Address
After receiving the second byte (register address), AK8975/C generates an acknowledge then receives the
third byte.
The third and the following bytes represent control data. Control data consists of 8 bits and is based on the
MSB-first configuration. AK8975/C generates an acknowledge after every byte is received. Data transfer
always stops with a stop condition generated by the master.
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
Figure 7.8 Control Data
AK8975/C can write multiple bytes of data at a time.
After reception of the third byte (control data), AK8975/C generates an acknowledge then receives the next
data.
If additional data is received instead of a stop condition after receiving one byte of data, the address counter
inside the LSI chip is automatically incremented and the data is written at the next address.
The address is incremented from 00H to 0CH or from 10H to12H. When the address is in the range from 00H
to 0CH, the address goes back to 00H after 0CH. When the address is in the range from 10H to 12H, the
address goes back to 10H after 12H. Actual data is written only to Read/Write registers (0AH to 0FH).
S
T
A
R
T
SDA
S
S
T
O
P
R/W="0"
Slave
Address
Register
Address(n)
A
C
K
Data(n+1)
Data(n)
A
C
K
A
C
K
Data(n+x)
A
C
K
A
C
K
P
A
C
K
Figure 7.9 WRITE Instruction
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[AK8975/C]
7.2.3. READ Instruction
When the R/W bit is set to "1", AK8975/C performs read operation.
If a master IC generates an acknowledge instead of a stop condition after AK8975/C transfers the data at a
specified address, the data at the next address can be read.
Address can be from 00H to 0CH and/or from 10H to 12H.When address is counted up to 0CH in the range of
00H to 0CH, the next address returns to 00H. When address is counted up to 12H in the range of 10H to 12H,
the next address returns to 10H.
AK8975/C supports one byte read and multiple byte read.
7.2.3.1. One Byte READ
AK8975/C has an address counter inside the LSI chip. In current address read operation, the data at an address
specified by this counter is read.
The internal address counter holds the next address of the most recently accessed address.
For example, if the address most recently accessed (for READ instruction) is address "n", and a current address
read operation is attempted, the data at address "n+1" is read.
In one byte read operation, AK8975/C generates an acknowledge after receiving a slave address for the READ
instruction (R/W bit="1"). Next, AK8975/C transfers the data specified by the internal address counter starting
with the next clock pulse, then increments the internal counter by one. If the master IC generates a stop
condition instead of an acknowledge after AK8975/C transmits one byte of data, the read operation stops.
S
T
A
R
T
SDA
S
S
T
O
P
R/W="1"
Slave
Address
Data(n)
A
C
K
Data(n+1)
A
C
K
Data(n+x)
Data(n+2)
A
C
K
A
C
K
P
A
C
K
Figure 7.10 One Byte READ
7.2.3.2. Multiple Byte READ
By multiple byte read operation, data at an arbitrary address can be read.
The multiple byte read operation requires to execute WRITE instruction as dummy before a slave address for
the READ instruction (R/W bit="1") is transmitted. In random read operation, a start condition is first
generated then a slave address for the WRITE instruction (R/W bit="0") and a read address are transmitted
sequentially.
After AK8975/C generates an acknowledge in response to this address transmission, a start condition and a
slave address for the READ instruction (R/W bit="1") are generated again. AK8975/C generates an
acknowledge in response to this slave address transmission. Next, AK8975/C transfers the data at the specified
address then increments the internal address counter by one. If the master IC generates a stop condition instead
of an acknowledge after data is transferred, the read operation stops.
S
T
A
R
T
SDA
S
S
T
A
R
T
R/W="0"
Slave
Address
Register
Address(n)
A
C
K
S
A
C
K
S
T
O
P
R/W="1"
Slave
Address
A
C
K
Data(n+x)
Data(n+1)
Data(n)
A
C
K
A
C
K
P
A
C
K
Figure 7.11 Multiple Byte READ
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[AK8975/C]
8. Registers
8.1.
Description of Registers
AK8975/C has registers of 19 addresses as indicated in Table 8.1. Every address consists of 8 bits data. Data is
transferred to or received from the external CPU via the serial interface described previously.
Name
Address
WIA
INFO
ST1
HXL
HXH
HYL
HYH
HZL
HZH
ST2
CNTL
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
RSV
0BH
ASTC
0CH
TS1
0DH
TS2
0EH
I2CDIS
0FH
ASAX
ASAY
ASAZ
10H
11H
12H
READ/
WRITE
READ
READ
READ
READ
READ
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ/
WRITE
READ
READ
READ
Status 2
Control
Bit
width
8
8
8
8
8
8
8
8
8
8
8
Reserved
8
Self-test
8
Test 1
8
DO NOT ACCESS
Test 2
8
DO NOT ACCESS
I2C disable
8
X-axis sensitivity adjustment value
Y-axis sensitivity adjustment value
Z-axis sensitivity adjustment value
Table 8.1 Register Table
8
8
8
Description
Device ID
Information
Status 1
Measurement data
Explanation
Data status
X-axis data
Y-axis data
Z-axis data
Data status
DO NOT ACCESS
Fuse ROM
Fuse ROM
Fuse ROM
Addresses from 00H to 0CH and from 10H to 12H are compliant with automatic increment function of serial
interface respectively. Values of addresses from 10H to 12H can be read only in Fuse access mode. In other
modes, read data is not correct.
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[AK8975/C]
8.2.
Register Map
Register
D7
Name
Read-only Register
00H
WIA
0
01H
INFO
INFO7
02H
ST1
0
03H
HXL
HX7
04H
HXH
HX15
05H
HYL
HY7
06H
HYH
HY15
07H
HZL
HZ7
08H
HZH
HZ15
09H
ST2
0
Write/read Register
0AH
CNTL
0
0BH
RSV
0CH
ASTC
0DH
TS1
0EH
TS2
0FH
I2CDIS
Read-only Register
10H
ASAX
COEFX7
11H
ASAY
COEFY7
12H
ASAZ
COEFZ7
Addr
D6
D5
D4
D3
D2
D1
D0
1
INFO6
0
HX6
HX14
HY6
HY14
HZ6
HZ14
0
0
INFO5
0
HX5
HX13
HY5
HY13
HZ5
HZ13
0
0
INFO4
0
HX4
HX12
HY4
HY12
HZ4
HZ12
0
1
INFO3
0
HX3
HX11
HY3
HY11
HZ3
HZ11
HOFL
0
INFO2
0
HX2
HX10
HY2
HY10
HZ2
HZ10
DERR
0
INFO1
0
HX1
HX9
HY1
HY9
HZ1
HZ9
0
0
INFO0
DRDY
HX0
HX8
HY0
HY8
HZ0
HZ8
0
0
SELF
-
0
-
0
-
MODE3
-
MODE2
-
COEFX6
COEFY6
COEFZ6
COEFX5 COEFX4
COEFY5 COEFY4
COEFZ5 COEFZ4
Table 8.2 Register Map
MODE1 MODE0
I2CDIS
COEFX3 COEFX2 COEFX1 COEFX0
COEFY3 COEFY2 COEFY1 COEFY0
COEFZ3 COEFZ2 COEFZ1 COEFZ0
When VDD is turned ON, POR function works and all registers of AK8975/C are initialized regardless of
VID status. To write data to or to read data from register, VID must be ON.
TS1 and TS2 are test registers for shipment test. Do not use these registers.
RSV is reserved register. Do not use this register.
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[AK8975/C]
8.3.
Detailed Description of Registers
8.3.1. WIA: Device ID
Register
Addr
name
Read-only register
00H
WIA
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
0
0
0
Device ID of AKM. It is described in one byte and fixed value.
48H: fixed
8.3.2. INFO: Information
Register
Addr
D7
name
Read-only register
01H
INFO
INFO7
D6
D5
D4
D3
D2
D1
D0
INFO6
INFO5
INFO4
INFO3
INFO2
INFO1
INFO0
INFO[7:0]: Device information for AKM.
8.3.3. ST1: Status 1
Register
Addr
name
Read-only register
02H
ST1
Reset
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DRDY
0
DRDY: Data Ready
"0":
Normal
"1":
Data is ready
DRDY bit turns to “1” when data is ready in single measurement mode or self-test mode. It returns to “0”
when any one of ST2 register or measurement data register (HXL to HZH) is read.
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[AK8975/C]
8.3.4. HXL to HZH: Measurement Data
Addr Register name
D7
D6
Read-only register
03H
HXL
HX7
HX6
04H
HXH
HX15
HX14
05H
HYL
HY7
HY6
06H
HYH
HY15
HY14
07H
HZL
HZ7
HZ6
08H
HZH
HZ15
HZ14
Reset
0
0
D5
D4
D3
D2
D1
D0
HX5
HX13
HY5
HY13
HZ5
HZ13
0
HX4
HX12
HY4
HY12
HZ4
HZ12
0
HX3
HX11
HY3
HY11
HZ3
HZ11
0
HX2
HX10
HY2
HY10
HZ2
HZ10
0
HX1
HX9
HY1
HY9
HZ1
HZ9
0
HX0
HX8
HY0
HY8
HZ0
HZ8
0
Measurement data of magnetic sensor X-axis/Y-axis/Z-axis
HXL[7:0]: X-axis measurement data lower 8bit
HXH[15:8]: X-axis measurement data higher 8bit
HYL[7:0]: Y-axis measurement data lower 8bit
HYH[15:8]: Y-axis measurement data higher 8bit
HZL[7:0]: Z-axis measurement data lower 8bit
HZH[15:8]: Z-axis measurement data higher 8bit
Measuremnet data is stored in two’s complement and Little Endian format. Measurement range of each
axis is from -4096 to +4095 in decimal.
Measurement data (each axis) [15:0]
Two’s complement
Hex
Decimal
0000 1111 1111 1111
0FFF
4095
|
|
|
0000 0000 0000 0001
0001
1
0000 0000 0000 0000
0000
0
1111 1111 1111 1111
FFFF
-1
|
|
|
1111 0000 0000 0000
F000
-4096
Table 8.3 Measurement data format
MS1187-E-02
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Magnetic flux
density [µT]
1229(max.)
|
0.3
0
-0.3
|
-1229(min.)
2010/05
[AK8975/C]
8.3.5. ST2: Status 2
Register
Addr
name
Read-only register
09H
ST2
Reset
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
HOFL
0
DERR
0
0
0
0
0
DERR: Data Error
"0":
Normal
"1":
Data read error occurred
When data reading is started out of data readable period, the read data are not correct. In this case, data
read error occurs and DERR bit turns to 1 . When ST2 register is read, it returns to 0 .
HOFL: Magnetic sensor overflow
"0":
Normal
"1":
Magnetic sensor overflow occurred
In single measurement mode and self-test mode, magnetic sensor may overflow even though
measurement data regiseter is not saturated. In this case, measurement data is not correct and HOFL bit
turns to “1”. When next measurement stars, it returns to “0”. Refer to 6.4.2.3 for detailed information.
8.3.6. CNTL: Control
Addr Register name
Read-only register
0AH
CNTL
Reset
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
MODE3
0
MODE2
0
MODE1
0
MODE0
0
MODE[3:0]: Operation mode setting
"0000": Power-down mode
"0001": Single measurement mode
"1000": Self-test mode
"1111": Fuse ROM access mode
Other code settings are prohibited
When each mode is set, AK8975/C transits to set mode. Refer to 6.3 for detailed information.
When CNTL register is accessed to be written, registers from 02H to 09H are initialized.
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[AK8975/C]
8.3.7. RSV: Reserved
Addr Register name
Read-only register
0BH
RSV
Reset
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
RSV register is reserved. Do not use this register.
8.3.8. ASTC: Self Test Control
Addr Register name
D7
Write/read register
0CH
ASTC
Reset
0
D6
D5
D4
D3
D2
D1
D0
SELF
0
0
0
0
0
0
0
SELF: Self test control
"0":
Normal
"1":
Generate magnetic field for self-test
Do not write “1” to any bit other than SELF bit in ASTC register. If “1” is written to any bit other than SELF
bit, normal measurement can not be done.
8.3.9. TS1, TS2: Test 1, 2
Addr Register name
D7
Write/read register
0DH
TS1
0EH
TS2
Reset
0
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
TS1 and TS2 registers are test registers for shipment test. Do not use these registers.
8.3.10.
I2CDIS: I2C Disable
Addr Register name
D7
D6
Write/read register
0FH
I2CDIS
Reset
0
0
D5
D4
D3
D2
D1
D0
0
0
0
0
0
I2CDIS
0
This register disables I2C bus interface. I2C bus interface is enabled in default. To disable I2C bus interface,
write “00011011” to I2CDIS register. Then I2CDIS bit turns to “1” and I2C bus interface is disabled.
Once I2CDIS is turned to “1” and I2C bus interface is disabled, re-setting I2CDIST to “0” is prohibited. To
enable I2C bus interface, reset AK8975/C by turning VDD or VID to OFF (0V) once.
MS1187-E-02
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2010/05
[AK8975/C]
8.3.11.
ASAX, ASAY, ASAZ: Sensitivity Adjustment values
Register
Addr
D7
D6
D5
D4
D3
D2
D1
D0
name
Read-only register
10H
ASAX
COEFX7 COEFX6 COEFX5 COEFX4 COEFX3 COEFX2 COEFX1 COEFX0
11H
ASAY
COEFY7 COEFY6 COEFY5 COEFY4 COEFY3 COEFY2 COEFY1 COEFY0
12H
ASAZ
COEFZ7 COEFZ6 COEFZ5 COEFZ4 COEFZ3 COEFZ2 COEFZ1 COEFZ0
Reset
Sensitivity adjustment data for each axis is stored to fuse ROM on shipment.
ASAX[7:0]: Magnetic sensor X-axis sensitivity adjustment value
ASAY[7:0]: Magnetic sensor Y-axis sensitivity adjustment value
ASAZ[7:0]: Magnetic sensor Z-axis sensitivity adjustment value
<How to adjust sensitivity>
The sensitivity adjustment is done by the equation below;
⎛ ( ASA − 128) × 0.5 ⎞
Hadj = H × ⎜
+ 1⎟ ,
128
⎝
⎠
where H is the measurement data read out from the measurement data register, ASA is the sensitivity
adjustment value, and Hadj is the adjusted measurement data.
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2010/05
[AK8975/C]
9. Example of Recommended External Connection
9.1.
2
I C Bus Interface
<AK8975>
VDD
POWER 2.4V~3.6V
VID
POWER 1.65V~Vdd
Slave address select
CAD1 CAD0 address
VSS VSS 0 0 0 1 1 0 0 R/W
VSS VDD 0 0 0 1 1 0 1 R/W
VDD VSS 0 0 0 1 1 1 0 R/W
VDD VDD 0 0 0 1 1 1 1 R/W
Host CPU
Interrupt
11
NC1
TST2
VSS
VID
(Top View)
SO
3
8
open
7
6
SCL/SK
2
RSV
CSB
1
open
0.1µF
AK8975
VDD
TST1
0.1µF
TST6
16
DRDY
15
9
CAD0
14
open
10
CAD1
NC2
13
open
open
12
SDA/SI
open
5
I2C i/f
4
open or
VSS
Power for i/f
<AK8975C>
Same as AK8975
MS1187-E-02
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2010/05
[AK8975/C]
9.2.
4-wire SPI
<AK8975>
VDD
POWER 2.4V~3.6V
VID
POWER 1.65V~Vdd
Host CPU
Interrupt
11
NC1
AK8975
TST2
VID
SCL/SK
VDD
2
RSV
CSB
1
3
8
open
7
SO 6
(Top View)
VSS
TST1
0.1µF
TST6
16
DRDY
15
9
CAD0
14
open
10
CAD1
NC2
13
open
open
12
SDA/SI
5
4-wireSPI i/f
4
open
0.1µF
Power for i/f
open or
VSS
<AK8975C>
Same as AK8975
MS1187-E-02
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2010/05
[AK8975/C]
10.
Package
10.1. Marking
<AK8975>
• Company logo: AKM
• Product name: 8975
• Date code:
X1X2X3X4X5
= ID
X1
= Year code
X2
X3X4 = Week code
= Lot
X5
<AK8975C>
• Product name: 8975C
• Date code:
X1X2X3X4X5
= ID
X1
= Year code
X2
X3X4 = Week code
= Lot
X5
8975C
AKM
8975
X1X2X3X4X5
X1X2X3X4X5
<Top view>
<Top view>
10.2. Pin Assignment
<AK8975C>
<AK8975>
NC2
CAD1
DRDY
TST6
12
11
10
9
CAD0 13
AKM
8975
XXXXX
TST2 14
VSS 15
VDD 16
3
4
RSV
SCL/SK
TST1
2
CSB
1
4
3
D
SDA
/SI
VID
C
VID
6
SO
B
SO
TST6
5
SDA/SI
A
RSV
SCL
/SK
8
NC1
7
2
CAD1
1
CAD0
8975C
XXXXX
DRDY
TST2
VSS
VDD
CSB
TST1
<Top view>
<Top view>
MS1187-E-02
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2010/05
[AK8975/C]
10.3. Outline Dimensions
<AK8975>
[mm]
4.00±0.10
2.6±0.10
B
13
16
9
AKM
8975
XXXXX
9
12
0.30 REF.
8
8
13
2.6±0.10
4.00±0.10
12
A
C0.30.
5
16
5
0.40±0.10
1
4
4
1
0.65 REF.
0.30±0.05
16X
0.10 M C A B
0.75±0.05
0.08 C
<AK8975C>
[mm]
1.96
1.5
4
3
2
1
1
D
B
3
4
D
8975C
XXXXX
0.5
C
1.5
1.96
C
2
B
A
A
0.27±0.03
0.40
0.5
0.65 max.
0.19
0.075 C
C
MS1187-E-02
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2010/05
[AK8975/C]
10.4. Recommended Foot Print Pattern
<AK8975>
[mm]
<AK8975C>
[mm]
4
3
2
1
D
0.5
C
B
A
0.5
0.25
MS1187-E-02
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2010/05
[AK8975/C]
11.
Relationship between the Magnetic Field and Output Code
The measurement data increases as the magnetic flux density increases in the arrow directions.
<AK8975>
<AK8975C>
Y
X
AKM
897
XXX 5
XX
Z
Y
897
5C
XXX
XX
X
Z
Important Notice
• These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of
Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the
products.
• AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the
application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or
other official approval under the law and regulations of the country of export pertaining to customs and
tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life
support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use,
except for the use approved with the express written consent by Representative Director of AKM. As
used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system
containing it, and which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to
function or perform may reasonably be expected to result in loss of life or in significant injury or
damage to person or property.
• It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or
otherwise places the product with a third party, to notify such third party in advance of the above content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for
and hold AKM harmless from any and all claims arising from the use of said product in the absence of
such notification
MS1187-E-02
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2010/05