[AK8963] AK8963 3-axis Electronic Compass 1. Features A 3-axis electronic compass IC with high sensitive Hall sensor technology. Best adapted to pedestrian city navigation use for cell phone and other portable appliance. Functions: • 3-axis magnetometer device suitable for compass application • Built-in A to D Converter for magnetometer data out • 14-/16-bit selectable data out for each 3 axis magnetic components - Sensitivity: 0.6 µT/LSB typ. (14-bit) 0.15µT/LSB typ. (16-bit) • Serial interface - I2C bus interface. Standard mode and Fast mode compliant with Philips I2C specification Ver.2.1 - 4-wire SPI • Operation modes: Power-down, Single measurement, Continuous measurement, External trigger measurement, Self test and Fuse ROM access. • DRDY function for measurement data ready • Magnetic sensor overflow monitor function • Built-in oscillator for internal clock source • Power on Reset circuit • Self test function with built-in internal magnetic source Operating temperatures: • -30°C to +85°C Operating supply voltage: • Analog power supply +2.4V to +3.6V • Digital Interface supply +1.65V to analog power supply voltage. Current consumption: • Power-down: 3 µA typ. • Measurement: - Average power consumption at 8 Hz repetition rate: 280µA typ. Package: AK8963C 14-pin WL-CSP (BGA): AK8963N 16-pin QFN package: MS1356-E-02 1.6 mm × 1.6 mm × 0.5 mm (typ.) 3.0 mm × 3.0 mm × 0.75 mm (typ.) -1- 2013/10 [AK8963] 2. Overview AK8963 is 3-axis electronic compass IC with high sensitive Hall sensor technology. Small package of AK8963 incorporates magnetic sensors for detecting terrestrial magnetism in the X-axis, Y-axis, and Z-axis, a sensor driving circuit, signal amplifier chain, and an arithmetic circuit for processing the signal from each sensor. Self test function is also incorporated. From its compact foot print and thin package feature, it is suitable for map heading up purpose in GPS-equipped cell phone to realize pedestrian navigation function. AK8963 has the following features: (1) Silicon monolithic Hall-effect magnetic sensor with magnetic concentrator realizes 3-axis magnetometer on a silicon chip. Analog circuit, digital logic, power block and interface block are also integrated on a chip. (2) Wide dynamic measurement range and high resolution with lower current consumption. Output data resolution: 14-bit (0.6 µT/LSB) 16-bit (0.15 µT/LSB) Measurement range: ± 4900 µT Average current at 8Hz repetition rate: 280µA typ. (3) Digital serial interface - I2C bus interface to control AK8963 functions and to read out the measured data by external CPU. A dedicated power supply for I2C bus interface can work in low-voltage apply as low as 1.65V. - 4-wire SPI is also supported. A dedicated power supply for SPI can work in low-voltage apply as low as 1.65V. (4) DRDY pin and register inform to system that measurement is end and set of data in registers are ready to be read. (5) Device is worked by on-chip oscillator so no external clock source is necessary. (6) Self test function with internal magnetic source to confirm magnetic sensor operation on end products. MS1356-E-02 -2- 2013/10 [AK8963] 3. Table of Contents 1. 2. 3. 4. Features ...................................................................................................................................... 1 Overview ..................................................................................................................................... 2 Table of Contents ........................................................................................................................ 3 Circuit Configuration.................................................................................................................... 5 4.1. Block Diagram...................................................................................................................... 5 4.2. Block Function ..................................................................................................................... 5 4.3. Pin Function ......................................................................................................................... 6 5. Overall Characteristics ................................................................................................................ 7 5.1. Absolute Maximum Ratings ................................................................................................. 7 5.2. Recommended Operating Conditions ................................................................................. 7 5.3. Electrical Characteristics ..................................................................................................... 7 5.3.1. DC Characteristics........................................................................................................ 7 5.3.2. AC Characteristics ........................................................................................................ 8 5.3.3. Analog Circuit Characteristics ...................................................................................... 9 5.3.4. 4-wire SPI ................................................................................................................... 10 5.3.5. I2C Bus Interface..........................................................................................................11 6. Functional Explanation .............................................................................................................. 12 6.1. Power States ...................................................................................................................... 12 6.2. Reset Functions ................................................................................................................. 12 6.3. Operation Modes ............................................................................................................... 13 6.4. Description of Each Operation Mode................................................................................. 14 6.4.1. Power-down Mode...................................................................................................... 14 6.4.2. Single Measurement Mode ........................................................................................ 14 6.4.3. Continuous Measurement Mode 1 and 2 ................................................................... 15 6.4.3.1. Data Ready.......................................................................................................... 15 6.4.3.2. Normal Read Sequence ...................................................................................... 15 6.4.3.3. Data Read Start During Measurement ................................................................ 16 6.4.3.4. Data Skip ............................................................................................................. 17 6.4.3.5. End Operation ..................................................................................................... 17 6.4.3.6. Magnetic Sensor Overflow .................................................................................. 18 6.4.4. External Trigger Measurement Mode ......................................................................... 18 6.4.5. Self-test Mode............................................................................................................. 19 6.4.6. Fuse ROM Access Mode ............................................................................................ 19 7. Serial Interface .......................................................................................................................... 20 7.1. 4-wire SPI .......................................................................................................................... 20 7.1.1. Writing Data ................................................................................................................ 20 7.1.2. Reading Data .............................................................................................................. 21 7.2. I2C Bus Interface ................................................................................................................ 22 7.2.1. Data Transfer .............................................................................................................. 22 7.2.1.1. Change of Data ................................................................................................... 22 7.2.1.2. Start/Stop Condition............................................................................................. 22 7.2.1.3. Acknowledge ....................................................................................................... 23 7.2.1.4. Slave Address ..................................................................................................... 23 7.2.2. WRITE Instruction ...................................................................................................... 24 7.2.3. READ Instruction ........................................................................................................ 25 7.2.3.1. One Byte READ .................................................................................................. 25 7.2.3.2. Multiple Byte READ ............................................................................................. 25 8. Registers ................................................................................................................................... 26 8.1. Description of Registers..................................................................................................... 26 8.2. Register Map...................................................................................................................... 27 8.3. Detailed Description of Registers ...................................................................................... 28 8.3.1. WIA: Device ID ........................................................................................................... 28 8.3.2. INFO: Information ....................................................................................................... 28 8.3.3. ST1: Status 1 .............................................................................................................. 28 8.3.4. HXL to HZH: Measurement Data................................................................................ 29 8.3.5. ST2: Status 2 .............................................................................................................. 30 8.3.6. CNTL1: Control1 ......................................................................................................... 30 MS1356-E-02 -3- 2013/10 [AK8963] 8.3.7. CNTL2: Control2 ......................................................................................................... 31 8.3.8. ASTC: Self Test Control.............................................................................................. 31 8.3.9. TS1, TS2: Test 1, 2 ..................................................................................................... 31 8.3.10. I2CDIS: I2C Disable .................................................................................................... 31 8.3.11. ASAX, ASAY, ASAZ: Sensitivity Adjustment values ................................................... 32 9. Example of Recommended External Connection ..................................................................... 33 9.1. I2C Bus Interface ................................................................................................................ 33 9.2. 4-wire SPI .......................................................................................................................... 34 10. Package .................................................................................................................................... 35 10.1. Marking .............................................................................................................................. 35 10.2. Pin Assignment .................................................................................................................. 35 10.3. Outline Dimensions ............................................................................................................ 36 10.4. Recommended Foot Print Pattern ..................................................................................... 37 11. Relationship between the Magnetic Field and Output Code .................................................... 38 MS1356-E-02 -4- 2013/10 [AK8963] 4. Circuit Configuration 4.1. Block Diagram 3-axis Hall sensor Chopper SW PreAMP Integrator & ADC MUX RSTN OSC1 HE-Drive Magnetic source Interface, Logic & Register Timing Control Voltage Reference SCL/SK SDA/SI CSB SO DRDY OSC2 POR CAD0 4.2. CAD1 TST1 TRIG VSS VDD RSV FUSE ROM VID Block Function Block 3-axis Hall sensor MUX Chopper SW HE-Drive Pre-AMP Integrator & ADC OSC1 OSC2 POR Interface Logic & Register Timing Control Magnetic Source FUSE ROM MS1356-E-02 Function Monolithic Hall elements. Multiplexer for selecting Hall elements. Performs chopping. Magnetic sensor drive circuit for constant-current driving of sensor Fixed-gain differential amplifier used to amplify the magnetic sensor signal. Integrates and amplifies pre-AMP output and performs analog-to-digital conversion. Generates an operating clock for sensor measurement. 12MHz(typ.) Generates an operating clock for sequencer. 128kHz(typ.) Power On Reset circuit. Generates reset signal on rising edge of VDD. Exchanges data with an external CPU. DRDY pin indicates sensor measurement end and data is ready to be read. 2 I C bus interface using two pins, namely, SCL and SDA. Standard mode and Fast mode are supported. The low-voltage specification can be supported by applying 1.65V to the VID pin. 4-wire SPI is also supported by SK, SI, SO and CSB pins. 4-wire SPI works in VID pin voltage down to 1.65V, too. Generates a timing signal required for internal operation from a clock generated by the OSC1. Generates magnetic field for self test of magnetic sensor. Fuse for adjustment -5- 2013/10 [AK8963] 4.3. Pin Function QFN Pin No. WLCSP Pin No. Pin name I/O Power supply system Type 1 A1 DRDY O VID CMOS Function Data Ready output pin. “H” active. Informs measurement ended and data is ready to be read. Chip select pin for 4-wire SPI. 2 A2 CSB I VID CMOS “L” active. Connect to VID when selecting I2C bus interface. When the I2C bus interface is selected (CSB pin is connected to VID) SCL: Control data clock input pin SCL 3 A3 I VID CMOS Input: Schmidt trigger When the 4-wire SPI is selected SK SK: Serial clock input pin When the I2C bus interface is selected (CSB pin is connected to VID) SDA 5 SDA: Control data input/output pin I/O A4 VID CMOS Input: Schmidt trigger, Output: Open drain When the 4-wire SPI is selected SI I SI: Serial data input pin 15 B1 VDD - - Power 4 B3 RSV O VID CMOS Analog Power supply pin. Reserved. Keep this pin electrically non-connected. When the I2C bus interface is selected (CSB pin is connected to VID) Hi-Z output. Keep this pin electrically non-connected. 6 B4 SO O VID CMOS When the 4-wire SPI is selected Serial data output pin 13 C1 VSS - - Power Ground pin. 14 C2 TST1 I VDD CMOS Pulled down by 100kΩ internal resister. Keep this pin electrically non-connected or connect to VSS. Test pin. External trigger pulse input pin. 7 C3 TRG I VID CMOS Enabled only in External trigger mode. Pulled down by 100kΩ internal resister. When External trigger mode is not in use, keep this pin electrically non-connected or connect to VSS. 8 C4 VID - - Power Digital interface positive power supply pin. When the I2C bus interface is selected (CSB pin is connected to VID) CAD0: Slave address 0 input pin 12 D1 CAD0 I VDD CMOS Connect to VSS or VDD. When the 4-wire serial interface is selected Connect to VSS. When the I2C bus interface is selected (CSB pin is connected to VID) CAD1: Slave address 1 input pin 11 D2 CAD1 I VDD CMOS Connect to VSS or VDD. When the 4-wire serial interface is selected Connect to VSS. 10 D4 MS1356-E-02 RSTN I VID CMOS Reset pin. Resets registers by setting to “L”. Connect to VID when not in use. -6- 2013/10 [AK8963] 5. Overall Characteristics 5.1. Absolute Maximum Ratings Vss=0V Parameter Symbol Min. Max. Unit V+ -0.3 +4.3 Power supply voltage V (Vdd, Vid) VIN -0.3 (V+)+0.3 Input voltage V IIN Input current ±10 mA TST -40 +125 Storage temperature °C (Note 1) If the device is used in conditions exceeding these values, the device may be destroyed. Normal operations are not guaranteed in such exceeding conditions. 5.2. Recommended Operating Conditions Vss=0V Parameter Operating temperature Power supply voltage 5.3. Remark VDD pin voltage VID pin voltage Symbol Ta Vdd Vid Min. -30 2.4 1.65 Typ. Max. +85 3.6 Vdd 3.0 Unit °C V V Electrical Characteristics The following conditions apply unless otherwise noted: Vdd=2.4V to 3.6V, Vid=1.65V to Vdd, Temperature range=-30°C to 85°C 5.3.1. DC Characteristics Parameter High level input voltage 1 Symbol VIH1 Low level input voltage 1 VIL1 High level input voltage 2 Low level input voltage 2 High level input voltage 3 Low level input voltage 3 Input current 1 VIH2 VIL2 VIH3 VIL3 IIN1 Input current 2 IIN2 Input current 3 Input current 4 Hysteresis input voltage (Note 2) IIN3 IIN4 VHS High level output voltage 1 Low level output voltage 1 Low level output voltage 2 (Note 3)(Note 4) Current consumption (Note 5) VOH1 VOL1 VOL2 SO DRDY SDA IDD1 VDD VID IDD2 IDD3 IDD4 Pin CSB RSTN TRG SK/SCL SI/SDA CAD0 CAD1 SK/SCL SI/SDA CSB RSTN CAD0 CAD1 TRG TST1 SCL SDA Condition Min. 70%Vid Typ. 70%Vid -0.5 70%Vdd Max. Unit V 30%Vid V Vid+0.5 30%Vid Vin=Vss or Vid -10 30%Vdd +10 V V V V µA Vin=Vss or Vdd -10 +10 µA 100 100 3 20%Vid 0.4 20%Vid 10 µA µA V V V V V V µA 5 10 mA 9 0.1 15 5 mA µA Vin=Vid Vin=Vdd Vid≥2V Vid<2V IOH≥-100µA IOL≤+100µA IOL≤3mA Vid≥2V IOL≤3mA Vid<2V Power-down mode Vdd=Vid=3.0V When magnetic sensor is driven Self-test mode (Note 6) 5%Vid 10%Vid 80%Vid (Note 2) Schmitt trigger input (reference value for design) (Note 3) Maximum load capacitance: 400pF (capacitive load of each bus line applied to the I2C bus interface) (Note 4) Output is open-drain. Connect a pull-up resistor externally. (Note 5) Without any resistance load (Note 6) (case1)Vdd=ON, Vid=ON, RSTN pin = “L”. (case2)Vdd=ON, Vid=OFF(0V),RSTN pin = “L”. MS1356-E-02 -7- 2013/10 [AK8963] (case3)Vdd=Off(0V), Vid=On. 5.3.2. AC Characteristics Parameter Power supply rise time (Note 7) Symbol PSUP POR completion time (Note 7) PORT Power supply turn off voltage Power supply turn on interval (Note 7) SDV Wait time before mode setting PSINT Pin VDD VID VDD VID VDD VID Condition Period of time that VDD (VID) changes from 0.2V to Vdd (Vid). (Note 8) Period of time after PSUP to Power-down mode (Note 8) Turn off voltage to enable POR to restart (Note 8) Period of time that voltage lower than SDV needed to be kept to enable POR to restart (Note 8) Twat Min. Typ. Max. 50 Unit ms 100 µs 0.2 V 100 µs 100 µs (Note 7) Reference value for design (Note 8) When POR circuit detects the rise of VDD/VID voltage, it resets internal circuits and initializes the registers. After reset, AK8963 transits to Power-down mode. Powe down mode Power down mode PORT:100µs VDD/(VID) SDV:0.2V 0V PSUP:50ms Parameter Trigger input effective pulse width Trigger input effective frequency (Note 9) PSINT:100µs Symbol tTRIGH Pin TRG tTRIGf TRG Condition Min. 200 Typ. Max. Unit ns 100 Hz (Note 9) The value when the period of time from the end of the measurement to the next trigger input is 1.3ms. tTRIGH VIH MS1356-E-02 -8- 2013/10 [AK8963] Parameter Reset input effective pulse width (“L”) Symbol tRSTL Pin RSTN Condition Min. 5 Typ. Max. Unit µs tRSTL VIL 5.3.3. Analog Circuit Characteristics Parameter Measurement data output bit Time for measurement Magnetic sensor sensitivity Symbol Condition DBIT BIT = “0” BIT = “1” TSM Single measurement mode BSE Tc=25°C (Note 10) BIT = “0” BIT = “1” Tc=25°C (Note 10) Min. 0.57 0.1425 ±4912 Typ. 14 16 7.2 Max. Unit bit 9 ms 0.6 0.15 0.63 0.1575 µT/LSB BRG Magnetic sensor measurement µT range (Note 11) Tc=25°C -500 500 LSB Magnetic sensor initial offset BIT = “0” (Note 12) (Note 10) Value after sensitivity is adjusted using sensitivity fine adjustment data stored in Fuse ROM. (Refer to 8.3.11 for how to adjust.) (Note 11) Reference value for design (Note 12) Value of measurement data register on shipment without applying magnetic field on purpose. MS1356-E-02 -9- 2013/10 [AK8963] 5.3.4. 4-wire SPI 4-wire SPI is compliant with mode 3 Parameter CSB setup time Data setup time Data hold time SK high time Symbol Tcs Ts Th Twh SK low time Condition Vid≥2.5V 2.5V>Vid≥1.65V Vid≥2.5V 2.5V>Vid≥1.65V Twl SK setup time Tsd SK to SO delay time Tdd (Note 13) CSB to SO delay time Tcd (Note 13) SK rise time (Note 14) Tr SK fall time (Note 14) Tf CSB high time Tch (Note 13) SO load capacitance: 20pF (Note 14) Reference value for design. Min. 50 50 50 100 150 100 150 50 Typ. Max. 50 Unit ns ns ns ns ns ns ns ns ns 50 ns 100 100 ns ns ns 150 [4-wire SPI] Tch Tcs Tsd CSB Ts Th Tdd Twh Tcd Twl SK SI Hi-Z Hi-Z SO [Rise time and fall time] Tr Tf 0.9Vid 0.1Vid SK MS1356-E-02 - 10 - 2013/10 [AK8963] 5.3.5. I2C Bus Interface CSB pin = “H” I2C bus interface is compliant with Standard mode and Fast mode. Standard/Fast mode is selected automatically by fSCL. (1) Standard mode fSCL≤100kHz Symbol fSCL tHIGH tLOW tR tF tHD:STA tSU:STA tHD:DAT tSU:DAT tSU:STO tBUF Parameter SCL clock frequency SCL clock "High" time SCL clock "Low" time SDA and SCL rise time SDA and SCL fall time Start Condition hold time Start Condition setup time SDA hold time (vs. SCL falling edge) SDA setup time (vs. SCL rising edge) Stop Condition setup time Bus free time Min. Typ. Max. 100 Unit kHz µs µs µs µs µs µs µs ns µs µs 4.0 4.7 1.0 0.3 4.0 4.7 0 250 4.0 4.7 (2) Fast mode 100kHz<fSCL≤400kHz Symbol fSCL tHIGH tLOW tR tF tHD:STA tSU:STA tHD:DAT tSU:DAT tSU:STO tBUF tSP Parameter SCL clock frequency SCL clock "High" time SCL clock "Low" time SDA and SCL rise time SDA and SCL fall time Start Condition hold time Start Condition setup time SDA hold time (vs. SCL falling edge) SDA setup time (vs. SCL rising edge) Stop Condition setup time Bus free time Noise suppression pulse width Min. Typ. Max. 400 Unit kHz µs µs µs µs µs µs µs ns µs µs ns 0.6 1.3 0.3 0.3 0.6 0.6 0 100 0.6 1.3 50 [I2C bus interface timing] 1/fSCL VIH2 SCL VIL2 VIH2 SDA VIL2 tLOW tBUF tR tHIGH tF tSP VIH2 SCL VIL2 tHD:STA Stop tHD:DAT tSU:DAT tSU:STA tSU:STO Start Stop Start MS1356-E-02 - 11 - 2013/10 [AK8963] 6. Functional Explanation 6.1. Power States When VDD and VID are turned on from Vdd=OFF (0V) and Vid=OFF (0V), all registers in AK8963 are initialized by POR circuit and AK8963 transits to Power-down mode. All the states in the table below can be set, although the transition from state 2 to state 3 and the transition from state 3 to state 2 are prohibited. Table 6.1 State 1 6.2. VDD OFF (0V) VID OFF (0V) 2 3 OFF (0V) 2.4V to 3.6V 1.65V to 3.6V OFF (0V) 4 2.4V to 3.6V 1.65V to Vdd Power state OFF (0V). It doesn’t affect external interface. Digital input pins other than SCL and SDA pin should be fixed to “L”(0V). OFF (0V). It doesn’t affect external interface. OFF (0V). It doesn’t affect external interface. Digital input pins other than SCL and SDA pin should be fixed to “L” (0V). ON Reset Functions When the power state is ON, always keep Vid≤Vdd. Power-on reset (POR) works until Vdd reaches to the operation effective voltage (about 1.4V: reference value for design) on power-on sequence. After POR is deactivated, all registers are initialized and transits to power down mode. When Vdd=2.4 ~ 3.6V, POR circuit and VID monitor circuit are active. When Vid=0V, AK8963 is in reset status and it consumes the current of reset state (IDD4). AK8963 has four types of reset; (1) Power on reset (POR) When Vdd rise is detected, POR circuit operates, and AK8963 is reset. (2) VID monitor When Vid is turned OFF (0V), AK8963 is reset. (3) Reset pin (RSTN) AK8963 is reset by Reset pin. When Reset pin is not used, connect to VID. (4) Soft reset AK8963 is reset by setting SRST bit. When AK8963 is reset, all registers are initialized and AK8963 transits to Power-down mode. MS1356-E-02 - 12 - 2013/10 [AK8963] 6.3. Operation Modes AK8963 has following seven operation modes: (1) Power-down mode (2) Single measurement mode (3) Continuous measurement mode 1 (4) Continuous measurement mode 2 (5) External trigger measurement mode (6) Self-test mode (7) Fuse ROM access mode By setting CNTL1 register MODE[3:0] bits, the operation set for each mode is started. A transition from one mode to another is shown below. MODE[3:0]=“0001” Power-down mode MODE[3:0]=“0000” Single measurement mode Sensor is measured for one time and data is output. Transits to Power-down mode automatically after measurement ended. Transits automatically MODE[3:0]=“0010” MODE[3:0]=“0000” MODE[3:0]=“0110” MODE[3:0]=“0000” MODE[3:0]=“0100” MODE[3:0]=“0000” MODE[3:0]=“1000 MODE[3:0]=“0000” Continuous measurement mode 1 Sensor is measured periodically in 8Hz. Transits to Power-down mode by writing MODE[3:0]=“0000”. Continuous measurement mode 2 Sensor is measured periodically in 100Hz. Transits to Power-down mode by writing MODE[3:0]=“0000”. External trigger measurement mode Sensor is measured for one time by external trigger. Waits for next trigger after data is output. Transits to Power-down mode by writing MODE[3:0]=“0000”. Self-test mode Sensor is self-tested and the result is output. Transits to Power-down mode automatically. Transits automatically MODE[3:0]=“1111 MODE[3:0]=“0000” Fuse ROM access mode Turn on the circuit needed to read out Fuse ROM. Transits to Power-down mode by writing MODE[3:0]=“0000”. Figure 6.1 Operation modes When power is turned ON, AK8963 is in power-down mode. When a specified value is set to MODE[3:0], AK8963 transits to the specified mode and starts operation. When user wants to change operation mode, transit to power-down mode first and then transit to other modes. After power-down mode is set, at least 100µs(Twat) is needed before setting another mode. MS1356-E-02 - 13 - 2013/10 [AK8963] 6.4. Description of Each Operation Mode 6.4.1. Power-down Mode Power to almost all internal circuits is turned off. All registers are accessible in power-down mode. However, fuse ROM data cannot be read correctly. Data stored in read/write registers are remained. They can be reset by soft reset. 6.4.2. Single Measurement Mode When single measurement mode (MODE[3:0]=“0001”) is set, sensor is measured, and after sensor measurement and signal processing is finished, measurement data is stored to measurement data registers (HXL to HZH), then AK8963 transits to power-down mode automatically. On transition to power-down mode, MODE[3:0] turnes to “0000”. At the same time, DRDY bit in ST1 register turnes to “1”. This is called “Data Ready”. When any of measurement data register (HXL to HZH) or ST2 register is read, DRDY bit turnes to “0”. It remains “1” on transition from Power-down mode to another mode. DRDY pin is in the same state as DRDY bit. (Refer to Figure 6.2.) When sensor is measuring (Measurement period), measurement data registers (HXL ~ HZH) keep the previous data. Therefore, it is possible to read out data even in measurement period. Data read out in measurement period are previous data. (Refer to Figure 6.3.) Operation Mode: Power-down Single measuremnet (1) (2) (3) Measurement period Measurement Data Register Last Data Measurement Data (1) Data(2) Data(3) DRDY Data read Data(1) Register Write Data(3) MODE[3:0]="0001" MODE[3:0]="0001" MODE[3:0]="0001" Figure 6.2 Single measurement mode: when data is read out of measurement period Operation Mode: Power-down Single measuremnet (1) (2) (3) Measurement period Measurement Data Register Last Data Measurement Data (1) Data(2) Data(3) DRDY Data read Data(1) Register Write MODE[3:0]="0001" MODE[3:0]="0001" MODE[3:0]="0001" Figure 6.3 Single measurement mode: when data read started during measurement period MS1356-E-02 - 14 - 2013/10 [AK8963] 6.4.3. Continuous Measurement Mode 1 and 2 When continuous measurement mode 1 (MODE[3:0]=“0010”) or 2 (MODE[3:0]=“0110”) is set, sensor is measured periodically at 8Hz or 100Hz respectively. When sensor measurement and signal processing is finished, measurement data is stored to measurement data registers (HXL ~ HZH) and all circuits except for the minimum circuit required for counting cycle lentgh are turned off (PD). When the next measurement timing comes, AK8963 wakes up automatically from PD and starts measurement again. Continuous measurement mode ends when power-down mode (MODE[3:0]=“0000”) is set. It repeats measurement until power-down mode is set. When continuous measurement mode 1 (MODE[3:0]=“0010”) or 2 (MODE[3:0]= “0110”) is set again while AK8963 is already in continuous measurement mode, a new measurement starts. ST1, ST2 and measurement data registers (HXL ~ HZH) will not be initialized by this. (N-1)th PD Nth Measurement (N+1)th Measurement PD PD 8Hz or 100Hz Figure 6.4 Continuous measurement mode 6.4.3.1. Data Ready When measurement data is stored and ready to be read, DRDY bit in ST1 register turnes to “1”. This is called “Data Ready”. DRDY pin is in the same state as DRDY bit. When measurement is performed correctly, AK8963 becomes Data Ready on transition to PD after measurement. 6.4.3.2. Normal Read Sequence (1) Check Data Ready or not by any of the following method. - Polling DRDY bit of ST1 register - Monitor DRDY pin When Data Ready, proceed to the next step. (2) Read ST1 register (not needed when polling ST1) DRDY: Shows Data Ready or not. Not when “0”, Data Ready when “1”. DOR: Shows if any data has been skipped before the current data or not. There are no skipped data when “0”, there are skipped data when “1”. (3) Read measurement data When any of measurement data register (HXL ~ HZH) or ST2 register is read, AK8963 judges that data reading is started. When data reading is started, DRDY bit and DOR bit turnes to “0”. (4) Read ST2 register (required) HOFL: Shows if magnetic sensor is overflown or not. “0” means not overflown, “1” means overflown. When ST2 register is read, AK8963 judges that data reading is finished. Stored measurement data is protected during data reading and data is not updated. By reading ST2 register, this protection is released. It is required to read ST2 register after data reading. MS1356-E-02 - 15 - 2013/10 [AK8963] (N-1)th PD Nth Measurement (N+1)th Measurement PD Measurement Data Register (N-1)th Nth PD (N+1) DRDY Data read ST1 Data(N) ST2 ST1 Data(N+1) ST2 Figure 6.5 Normal read sequesnce 6.4.3.3. Data Read Start During Measurement When sensor is measuring (Measurement period), measurement data registers (HXL ~ HZH) keep the previous data. Therefore, it is possible to read out data even in measurement period. If data is started to be read during measurement period, previous data is read. (N-1)th PD Nth Measurement (N+1)th Measurement PD PD Measurement Data Register (N-1)th Nth DRDY Data read ST1 Data(N) ST2 ST1 Data(N) ST2 Figure 6.6 Data read start during measuremnet MS1356-E-02 - 16 - 2013/10 [AK8963] 6.4.3.4. Data Skip When Nth data was not read before (N+1)th measurement ends, Data Ready remains until data is read. In this case, a set of measurement data is skipped so that DOR bit turnes to “1”. (Refer to Figure 6.7) When data reading started after Nth measurement ended and did not finish reading before (N+1)th measurement ended, Nth measurement data is protected to keep correct data. In this case, a set of measurement data is skipped and not stored so that DOR bit turnes to “1”. (Refer to Figure 6.8) In both case, DOR bit turnes to “0” at the next start of data reading. (N-1)th PD Nth Measurement (N+1)th Measurement PD Measurement Data Register (N-1)th Nth PD (N+1) DRDY DOR Data read ST1 Data(N+1) ST2 Figure 6.7 Data Skip: When data is not read (N-1)th PD Nth Measurement (N+1)th PD (N+2)th PD Measurement PD Measurement Measurement Data Register (N-1)th Nth (N+2) Data register is protedted because data is being read Not data ready because data is not updated DRDY (N+1)th data is skipped DOR Data read ST1 DataN ST2 ST1 Data(N+2) Figure 6.8 Data Skip: When data read has not been finished before the next measurement ends 6.4.3.5. End Operation Set power-down mode (MODE[3:0]=“0000”) to end continuous measurement mode. MS1356-E-02 - 17 - 2013/10 [AK8963] 6.4.3.6. Magnetic Sensor Overflow AK8963 has the limitation for measurement range that the sum of absolute values of each axis should be smaller than 4912μT. |X|+|Y|+|Z| < 4912μT When the magnetic field exceeded this limitation, data stored at measurement data are not correct. This is called Magnetic Sensor Overflow. When magnetic sensor overlow occurs, HOFL bit turns to “1”. When the next measurement starts, it returns to “0”. 6.4.4. External Trigger Measurement Mode When external trigger measurement mode (MODE[3:0]=“0100”) is set, AK8963 waits for trigger input. When a pulse is input from TRG pin, sensor measurement is started on the rising edge of TRG pin. When sensor measurement and signal processing is finished, measurement data is stored to measurement data registers (HXL to HZH) and all circuits except for the minimum circuit required for trigger input waiting are turned off (PD state). When the next pulse is input, AK8963 wakes up automatically from PD and starts measurement again. External trigger measurement mode ends when power-down mode (MODE[3:0]=“0000”) is set. AK8963 keeps waiting for the trigger input until the power-down mode is set. When external trigger measurement mode (MODE[3:0]=“0100”) is set again while AK8963 is already in external trigger measurement mode, it starts to wait for the trigger input again. The trigger input is ignored while sensor is measuring. Data read sequence and functions of read-only registers in external trigger measurement mode is the same as continuous measurement mode. MS1356-E-02 - 18 - 2013/10 [AK8963] 6.4.5. Self-test Mode Self-test mode is used to check if the sensor is working normally. When self-test mode (MODE[3:0]=“1000”) is set, magnetic field is generated by the internal magnetic source and sensor is measured. Measurement data is stored to measurement data registers (HXL to HZH), then AK8963 transits to power-down mode automatically. Before setting self-test mode, write “1” to SELF bit of ASTC register. Data read sequence and functions of read-only registers in self-test mode is the same as single measurement mode. When self-test is end, write “0” to SELF bit then proceed to other operation. <Self-test Sequence> (1) Set Power-down mode. (MODE[3:0]=“0000”) (2) Write “1” to SELF bit of ASTC register (other bits in this register should be kept “0”) (3) Set Self-test Mode. (MODE[3:0]=“1000”) (4) Check Data Ready or not by any of the following method. - Polling DRDY bit of ST1 register - Monitor DRDY pin When Data Ready, proceed to the next step. (5) Read measurement data (HXL to HZH) (6) Write “0” to SELF bit of ASTC register (7) Set Power-down mode. (MODE[3:0]=“0000”) <Self-test Judgement> When measurement data read by the above sequence is in the range of following table after sensitivity adjustment (refer to 8.3.11), AK8963 is working normally. 14-bit output(BIT=“0”) Criteria HX[15:0] HY[15:0] HZ[15:0] -50 =< HX =< 50 -50 =< HY =< 50 -800 =< HZ =< -200 HX[15:0] HY[15:0] HZ[15:0] -200 =< HX =< 200 -200 =< HY =< 200 -3200 =< HZ =< -800 16-bit output(BIT=“1”) Criteria 6.4.6. Fuse ROM Access Mode Fuse ROM access mode is used to read Fuse ROM data. Sensitivity adjustment data for each axis is stored in fuse ROM. Set Fuse ROM Access mode (MODE[3:0]=“1111”) before reading Fuse ROM data. When Fuse ROM Access mode is set, circuits reauired for reading fuse ROM are turned on. After reading fuse ROM data, set power-down mode (MODE[3:0]=“0000”) before the transition to another mode. MS1356-E-02 - 19 - 2013/10 [AK8963] 7. Serial Interface AK8963 supports I2C bus interface and 4-wire SPI. A selection is made by CSB pin. When used as 3-wire SPI, set SI pin and SO pin wired-OR externally. CSB pin=“L”: 4-wire SPI CSB pin=“H”: I2C bus interface 7.1. 4-wire SPI The 4-wire SPI consists of four digital signal lines: SK, SI, SO, and CSB, and is provided in 16bit protocol. Data consists of Read/Write control bit (R/W), register address (7bits) and control data (8bits). To read out all axes measuremen data (X, Y, Z), an option to read out more than one byte data using automatic increment command is available. (Sequencial read operation) CSB pin is low active. Input data is taken in on the rising edge of SK pin, and output data is changed on the falling edge of SK pin. (SPI MODE3) Communication starts when CSB pin transits to “L” and stops when CSB pin transits to “H”. SK pin must be “H” during CSB pin is in transition. Also, it is prohibited to change SI pin during CSB pin is “H” and SK pin is “H”. 7.1.1. Writing Data Input 16 bits data on SI pin in synchronous with the 16-bit serial clock input on SK pin. Out of 16 bits input data, the first 8 bits specify the R/W control bit (R/W=“0” when writing) and register address (7bits), and the latter 8 bits are control data (8bits). When any of addresses listed on Table 8.1 is input, AK8963 recognizes that it is selected and takes in latter 8 bits as setting data. If the number of clock pulses is less than 16, no data is written. If the number of clock pulses is more than 16, data after the 16th clock pulse on SI pin are ignored. It is not compliant with sereal write operation for multiple addresses. CSB 1 2 3 4 5 6 7 8 9 RW A6 A5 A4 A3 A2 A1 A0 D7 10 11 12 13 14 15 16 SK SI D6 D5 D4 D3 D2 D1 D0 (INPUT) SO Hi-Z (OUTPUT) Figure 7.1 4-wire SPI Writing Data MS1356-E-02 - 20 - 2013/10 [AK8963] 7.1.2. Reading Data Input the R/W control bit (R/W=“1”) and 7 bit register address on SI pin in synchronous with the first 8 bits of the 16 bits of a serial clock input on SK pin. Then AK8963 outputs the data held in the specified register with MSB first from SO pin. When clocks are input continuously after one byte of data is read, the address is incremented and data in the next address is output. Accordingly, after the falling edge of the 15th clock and CSB pin is “L”, the data in the next address is output on SO pin. When CSB pin is driven “L” to “H”, SO pin is placed in the high-impedance state. AK8963 has two incrementation lines; 00H ~ 0CH and 10H ~ 12H. For example, data is read as follows: 00H -> 01H ... -> 0BH -> 0CH -> 00H -> 01H ..., or 10H -> 11H -> 12H -> 10H … 0DH and 0EH are reserved addresses. Do not access to those addresses. When specified address is other than 00H ~ 12H, AK8963 recognizes that it is not selected and keeps SO pin in high-impedance state. Therefore, user can use other addresses for other devices. CSB 1 2 3 4 5 6 7 8 RW A6 A5 A4 A3 A2 A1 A0 9 10 11 12 13 14 15 16 SK SI (INPUT) SO (OUTPUT) Hi-Z Hi-Z D7 D6 D5 D4 D3 D2 D1 D0 Figure 7.2 4-wire SPI Reading Data MS1356-E-02 - 21 - 2013/10 [AK8963] 7.2. I2C Bus Interface The I2C bus interface of AK8963 supports the standard mode (100 kHz max.) and the fast mode (400 kHz max.). 7.2.1. Data Transfer To access AK8963 on the bus, generate a start condition first. Next, transmit a one-byte slave address including a device address. At this time, AK8963 compares the slave address with its own address. If these addresses match, AK8963 generates an acknowledgement, and then executes READ or WRITE instruction. At the end of instruction execution, generate a stop condition. 7.2.1.1. Change of Data A change of data on the SDA line must be made during "Low" period of the clock on the SCL line. When the clock signal on the SCL line is "High", the state of the SDA line must be stable. (Data on the SDA line can be changed only when the clock signal on the SCL line is "Low".) During the SCL line is "High", the state of data on the SDA line is changed only when a start condition or a stop condition is generated. SCL SDA DATA LINE STABLE : DATA VALID CHANGE OF DATA ALLOWED Figure 7.3 Data Change 7.2.1.2. Start/Stop Condition If the SDA line is driven to "Low" from "High" when the SCL line is "High", a start condition is generated. Every instruction starts with a start condition. If the SDA line is driven to "High" from "Low" when the SCL line is "High", a stop condition is generated. Every instruction stops with a stop condition. SCL SDA START CONDITION STOP CONDITION Figure 7.4 Start and Stop Conditions MS1356-E-02 - 22 - 2013/10 [AK8963] 7.2.1.3. Acknowledge The IC that is transmitting data releases the SDA line (in the "High" state) after sending 1-byte data. The IC that receives the data drives the SDA line to "Low" on the next clock pulse. This operation is referred as acknowledge. With this operation, whether data has been transferred successfully can be checked. AK8963 generates an acknowledge after reception of a start condition and slave address. When a WRITE instruction is executed, AK8963 generates an acknowledge after every byte is received. When a READ instruction is executed, AK8963 generates an acknowledge then transfers the data stored at the specified address. Next, AK8963 releases the SDA line then monitors the SDA line. If a master IC generates an acknowledge instead of a stop condition, AK8963 transmits the 8bit data stored at the next address. If no acknowledge is generated, AK8963 stops data transmission. Clock pulse for acknowledge SCL FROM MASTER 1 8 9 DATA OUTPUT BY TRANSMITTER not acknowledge DATA OUTPUT BY RECEIVER START CONDITION acknowledge Figure 7.5 Generation of Acknowledge 7.2.1.4. Slave Address The slave address of AK8963 can be selected from the following list by setting CAD0/1 pin. When CAD pin is fixed to VSS, the corresponding slave address bit is “0”. When CAD pin is fixed to VDD, the corresponding slave address bit is “1”. Table 7.1 Slave Address and CAD0/1 pin CAD1 CAD0 Slave Address 0 0 0CH 0 1 0DH 1 0 0EH 1 1 0FH MSB 0 LSB 0 0 1 1 CAD1 CAD0 R/W Figure 7.6 Slave Address The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is selected from the ICs on the bus according to the slave address. When a slave address is transferred, the IC whose device address matches the transferred slave address generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a R/W bit. When the R/W bit is set to "1", READ instruction is executed. When the R/W bit is set to "0", WRITE instruction is executed. MS1356-E-02 - 23 - 2013/10 [AK8963] 7.2.2. WRITE Instruction When the R/W bit is set to "0", AK8963 performs write operation. In write operation, AK8963 generates an acknowledge after receiving a start condition and the first byte (slave address) then receives the second byte. The second byte is used to specify the address of an internal control register and is based on the MSB-first configuration. MSB A7 LSB A6 A5 A4 A3 A2 A1 A0 Figure 7.7 Register Address After receiving the second byte (register address), AK8963 generates an acknowledge then receives the third byte. The third and the following bytes represent control data. Control data consists of 8 bits and is based on the MSB-first configuration. AK8963 generates an acknowledge after every byte is received. Data transfer always stops with a stop condition generated by the master. MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 Figure 7.8 Control Data AK8963 can write multiple bytes of data at a time. After reception of the third byte (control data), AK8963 generates an acknowledge then receives the next data. If additional data is received instead of a stop condition after receiving one byte of data, the address counter inside the LSI chip is automatically incremented and the data is written at the next address. The address is incremented from 00H to 0CH or from 10H to12H. When the address is in 00H~0CH, the address goes back to 00H after 0CH. When the address is in 10H~12H, the address goes back to 10H after 12H. Actual data is written only to Read/Write registers (refer to 8.2). S T A R T SDA S S T O P R/W="0" Slave Address Register Address(n) A C K Data(n) A C K Data(n+1) A C K Data(n+x) A C K A C K P A C K Figure 7.9 WRITE Instruction MS1356-E-02 - 24 - 2013/10 [AK8963] 7.2.3. READ Instruction When the R/W bit is set to "1", AK8963 performs read operation. If a master IC generates an acknowledge instead of a stop condition after AK8963 transfers the data at a specified address, the data at the next address can be read. Address can be 00H~0CH and/or 10H~12H.When address is counted up to 0CH in 00H~0CH, the next address returns to 00H. When address is counted up to 12H in 10H~12H, the next address returns to 10H. AK8963 supports one byte read and multiple byte read. 7.2.3.1. One Byte READ AK8963 has an address counter inside the LSI chip. In current address read operation, the data at an address specified by this counter is read. The internal address counter holds the next address of the most recently accessed address. For example, if the address most recently accessed (for READ instruction) is address "n", and a current address read operation is attempted, the data at address "n+1" is read. In one byte read operation, AK8963 generates an acknowledge after receiving a slave address for the READ instruction (R/W bit="1"). Next, AK8963 transfers the data specified by the internal address counter starting with the next clock pulse, then increments the internal counter by one. If the master IC generates a stop condition instead of an acknowledge after AK8963 transmits one byte of data, the read operation stops. S T A R T SDA S S T O P R/W="1" Slave Address Data(n) A C K Data(n+1) A C K Data(n+2) A C K Data(n+x) A C K P A C K Figure 7.10 One Byte READ 7.2.3.2. Multiple Byte READ By multiple byte read operation, data at an arbitrary address can be read. The multiple byte read operation requires to execute WRITE instruction as dummy before a slave address for the READ instruction (R/W bit="1") is transmitted. In random read operation, a start condition is first generated then a slave address for the WRITE instruction (R/W bit="0") and a read address are transmitted sequentially. After AK8963 generates an acknowledge in response to this address transmission, a start condition and a slave address for the READ instruction (R/W bit="1") are generated again. AK8963 generates an acknowledge in response to this slave address transmission. Next, AK8963 transfers the data at the specified address then increments the internal address counter by one. If the master IC generates a stop condition instead of an acknowledge after data is transferred, the read operation stops. S T A R T SDA S S T A R T R/W="0" Slave Address Register Address(n) A C K S A C K S T O P R/W="1" Data(n) Slave Address A C K Data(n+1) A C K Data(n+x) A C K P A C K Figure 7.11 Multiple Byte READ MS1356-E-02 - 25 - 2013/10 [AK8963] 8. Registers 8.1. Description of Registers AK8963 has registers of 20 addresses as indicated in Table 8.1. Every address consists of 8 bits data. Data is transferred to or received from the external CPU via the serial interface described previously. Table 8.1 Register Table Name Address WIA INFO ST1 HXL HXH HYL HYH HZL HZH ST2 CNTL1 CNTL2 ASTC 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH TS1 0DH TS2 0EH I2CDIS 0FH ASAX ASAY ASAZ RSV 10H 11H 12H 13H READ/ WRITE READ READ READ READ Description Device ID Information Status 1 Measurement data READ READ/ WRITE Status 2 Control 1 Control 2 READ/ WRITE READ/ WRITE READ/ WRITE READ/ WRITE READ READ READ READ Self-test Bit width 8 8 8 8 8 8 8 8 8 8 8 8 8 Explanation Data status X-axis data Y-axis data Z-axis data Data status Function Control Test 1 8 DO NOT ACCESS Test 2 8 DO NOT ACCESS I2C disable 8 X-axis sensitivity adjustment value Y-axis sensitivity adjustment value Z-axis sensitivity adjustment value Reserved 8 8 8 8 Fuse ROM Fuse ROM Fuse ROM DO NOT ACCESS Addresses 00H~0CH and 10H~12H are compliant with automatic increment function of serial interface respectively. Values of addresses 10H~12H can be read only in Fuse ROM access mode. In other modes, read data is not correct. MS1356-E-02 - 26 - 2013/10 [AK8963] 8.2. Register Map Register D7 Name Read-only Register 00H WIA 0 01H INFO INFO7 02H ST1 03H HXL HX7 04H HXH HX15 05H HYL HY7 06H HYH HY15 07H HZL HZ7 08H HZH HZ15 09H ST2 0 Write/read Register 0AH CNTL1 0 0BH CNTL2 0 0CH ASTC 0DH TS1 0EH TS2 0FH I2CDIS I2CDIS7 Read-only Register 10H ASAX COEFX7 11H ASAY COEFY7 12H ASAZ COEFZ7 13H RSV Addr D6 Table 8.2 Register Map D5 D4 D3 D2 D1 D0 0 INFO2 0 HX2 HX10 HY2 HY10 HZ2 HZ10 0 0 INFO1 DOR HX1 HX9 HY1 HY9 HZ1 HZ9 0 0 INFO0 DRDY HX0 HX8 HY0 HY8 HZ0 HZ8 0 1 INFO6 0 HX6 HX14 HY6 HY14 HZ6 HZ14 0 0 INFO5 0 HX5 HX13 HY5 HY13 HZ5 HZ13 0 0 INFO4 HX4 HX12 HY4 HY12 HZ4 HZ12 BITM 1 INFO3 0 HX3 HX11 HY3 HY11 HZ3 HZ11 HOFL 0 0 SELF I2CDIS6 0 0 I2CDIS5 BIT 0 I2CDIS4 MODE3 0 I2CDIS3 COEFX6 COEFY6 COEFZ6 - COEFX5 COEFY5 COEFZ5 - COEFX4 COEFY4 COEFZ4 - COEFX3 COEFX2 COEFX1 COEFX0 COEFY3 COEFY2 COEFY1 COEFY0 COEFZ3 COEFZ2 COEFZ1 COEFZ0 - MODE2 MODE1 MODE0 0 0 SRST I2CDIS2 I2CDIS1 I2CDIS0 When VDD is turned ON, POR function works and all registers of AK8963 are initialized regardless of VID status. To write data to or to read data from register, VID must be ON. TS1 and TS2 are test registers for shipment test. Do not use these registers. RSV is reserved register. Do not use this register. MS1356-E-02 - 27 - 2013/10 [AK8963] 8.3. Detailed Description of Registers 8.3.1. WIA: Device ID Register name Read-only register 00H WIA Addr D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 0 0 0 Device ID of AKM. It is described in one byte and fixed value. 48H: fixed 8.3.2. INFO: Information Register name Read-only register 01H INFO Addr D7 D6 D5 D4 D3 D2 D1 D0 INFO7 INFO6 INFO5 INFO4 INFO3 INFO2 INFO1 INFO0 INFO[7:0]: Device information for AKM. 8.3.3. ST1: Status 1 Register name Read-only register 02H ST1 Reset Addr D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 DOR 0 DRDY 0 DRDY: Data Ready "0": Normal "1": Data is ready DRDY bit turns to “1” when data is ready in single measurement mode, continuous measurement mode1, 2, external trigger measurement mode or self-test mode. It returns to “0” when any one of ST2 register or measurement data register (HXL~HZH) is read. DOR: Data Overrun "0": Normal "1": Data overrun DOR bit turns to “1” when data has been skipped in continuous measurement mode or external trigger measurement mode. It returns to “0” when any one of ST2 register or measurement data register (HXL~HZH) is read. MS1356-E-02 - 28 - 2013/10 [AK8963] 8.3.4. HXL to HZH: Measurement Data Addr Register name Read-only register 03H HXL 04H HXH 05H HYL 06H HYH 07H HZL 08H HZH Reset D7 D6 D5 D4 D3 D2 D1 D0 HX7 HX15 HY7 HY15 HZ7 HZ15 0 HX6 HX14 HY6 HY14 HZ6 HZ14 0 HX5 HX13 HY5 HY13 HZ5 HZ13 0 HX4 HX12 HY4 HY12 HZ4 HZ12 0 HX3 HX11 HY3 HY11 HZ3 HZ11 0 HX2 HX10 HY2 HY10 HZ2 HZ10 0 HX1 HX9 HY1 HY9 HZ1 HZ9 0 HX0 HX8 HY0 HY8 HZ0 HZ8 0 Measurement data of magnetic sensor X-axis/Y-axis/Z-axis HXL[7:0]: X-axis measurement data lower 8bit HXH[15:8]: X-axis measurement data higher 8bit HYL[7:0]: Y-axis measurement data lower 8bit HYH[15:8]: Y-axis measurement data higher 8bit HZL[7:0]: Z-axis measurement data lower 8bit HZH[15:8]: Z-axis measurement data higher 8bit Measuremnet data is stored in two’s complement and Little Endian format. Measurement range of each axis is -8190 ~ +8190 in decimal in 14-bit output, and -32760 ~ 32760 in 16-bit output. Table 8.3 Measurement data format Measurement data (each axis) [15:0] Two’s complement Hex Decimal 14-bit output 0001 1111 1111 1110 1FFE 8190 | | | 0000 0000 0000 0001 0001 1 0000 0000 0000 0000 0000 0 1111 1111 1111 1111 FFFF -1 | | | 1110 0000 0000 0010 E002 -8190 16-bit output 0111 1111 1111 1000 7FF8 32760 | | | 0000 0000 0000 0001 0001 1 0000 0000 0000 0000 0000 0 1111 1111 1111 1111 FFFF -1 | | | 1000 0000 0000 1000 8008 -32760 MS1356-E-02 - 29 - Magnetic flux density [µT] 4912(max.) | 0.6 0 -0.6 | -4912(min.) 4912(max.) | 0.15 0 -0.15 | -4912(min.) 2013/10 [AK8963] 8.3.5. ST2: Status 2 Register name Read-only register 09H ST2 Reset Addr D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 BITM 0 HOFL 0 0 0 0 0 0 0 HOFL: Magnetic sensor overflow "0": Normal "1": Magnetic sensor overflow occurred In single measurement mode, continuous measurement mode, external trigger measurement mode and self-test mode, magnetic sensor may overflow even though measurement data regiseter is not saturated. In this case, measurement data is not correct and HOFL bit turns to “1”. When next measurement stars, it returns to “0”. Refer to 6.4.3.6 for detailed information. BITM: Output bit setting (mirror) "0": 14-bit output "1": 16-bit output Mirror data of BIT bit of CNTL1 register. ST2 register has a role as data reading end register, also. When any of measurement data register is read in continuous measurement mode or external trigger measurement mode, it means data reading start and taken as data reading until ST2 register is read. Therefore, when any of measurement data is read, be sure to read ST2 register at the end. 8.3.6. CNTL1: Control1 Addr Register name Write/read register 0AH CNTL1 Reset D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 BIT 0 MODE3 0 MODE2 0 MODE1 0 MODE0 0 MODE[3:0]: Operation mode setting "0000": Power-down mode "0001": Single measurement mode "0010": Continuous measurement mode 1 "0110": Continuous measurement mode 2 "0100": External trigger measurement mode "1000": Self-test mode "1111": Fuse ROM access mode Other code settings are prohibited BIT: Output bit setting "0": 14-bit output "1": 16-bit output When each mode is set, AK8963 transits to the set mode. Refer to 6.3 for detailed information. MS1356-E-02 - 30 - 2013/10 [AK8963] 8.3.7. CNTL2: Control2 Addr Register name Write/read register 0BH CNTL2 Reset D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SRST 0 SRST: Soft reset "0": Normal "1": Reset When “1” is set, all registers are initialized. After reset, SRST bit turns to “0” automatically. 8.3.8. ASTC: Self Test Control Addr Register name Write/read register 0CH ASTC Reset D7 D6 D5 D4 D3 D2 D1 D0 0 SELF 0 0 0 0 0 0 0 SELF: Self test control "0": Normal "1": Generate magnetic field for self-test Do not write “1” to any bit other than SELF bit in ASTC register. If “1” is written to any bit other than SELF bit, normal measurement can not be done. 8.3.9. TS1, TS2: Test 1, 2 Addr Register name Write/read register 0DH TS1 0EH TS2 Reset D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 TS1 and TS2 registers are test registers for shipment test. Do not use these registers. 8.3.10. I2CDIS: I2C Disable Addr Register name D7 D6 D5 D4 D3 D2 D1 D0 Write/read register 0FH I2CDIS I2CDIS7 I2CDIS6 I2CDIS5 I2CDIS4 I2CDIS3 I2CDIS2 I2CDIS1 I2CDIS0 Reset 0 0 0 0 0 0 0 0 This register disables I2C bus interface. I2C bus interface is enabled in default. To disable I2C bus interface, write “00011011” to I2CDIS register. Then I2C bus interface is disabled. Once I2C bus interface is disabled, it is impossible to write other value to I2CDIS register. To enable I2C bus interface, reset AK8963 or input start condition 8 times continuously. MS1356-E-02 - 31 - 2013/10 [AK8963] 8.3.11. ASAX, ASAY, ASAZ: Sensitivity Adjustment values Register name Read-only register 10H ASAX 11H ASAY 12H ASAZ Reset Addr D7 D6 D5 D4 D3 D2 D1 D0 COEFX7 COEFX6 COEFX5 COEFX4 COEFX3 COEFX2 COEFX1 COEFX0 COEFY7 COEFY6 COEFY5 COEFY4 COEFY3 COEFY2 COEFY1 COEFY0 COEFZ7 COEFZ6 COEFZ5 COEFZ4 COEFZ3 COEFZ2 COEFZ1 COEFZ0 - Sensitivity adjustment data for each axis is stored to fuse ROM on shipment. ASAX[7:0]: Magnetic sensor X-axis sensitivity adjustment value ASAY[7:0]: Magnetic sensor Y-axis sensitivity adjustment value ASAZ[7:0]: Magnetic sensor Z-axis sensitivity adjustment value <How to adjust sensitivity> The sensitivity adjustment is done by the equation below; ( ASA − 128) × 0.5 Hadj = H × + 1 , 128 where H is the measurement data read out from the measurement data register, ASA is the sensitivity adjustment value, and Hadj is the adjusted measurement data. MS1356-E-02 - 32 - 2013/10 [AK8963] 9. Example of Recommended External Connection 9.1. 2 I C Bus Interface <AK8963C> VID POWER 1.65V~Vdd VDD POWER 2.4V~3.6V Slave address select CAD1 CAD0 address VSS VSS 0 0 0 1 1 0 0 R/W VSS VDD 0 0 0 1 1 0 1 R/W VDD VSS 0 0 0 1 1 1 0 R/W VDD VDD 0 0 0 1 1 1 1 R/W Host CPU Power for i/f GPIB RSTN CAD1 CAD0 AK8963C VID TST2 TRG C TST1 2 RSV SDA /SI SCL /SK CSB 4 3 2 0.1µF 0.1µF VSS (Top view) SO D B VDD DRDY A I C i/f 1 Interrupt Pins of dot circle should be kept non-connected. <AK8963N> Same as AK8963C. MS1356-E-02 - 33 - 2013/10 [AK8963] 9.2. 4-wire SPI <AK8963C> VID POWER 1.65V~Vdd VDD POWER 2.4V~3.6V Host CPU Power for i/f GPIB RSTN CAD1 CAD0 AK8963C VID TST2 TRG C TST1 SPI i/f RSV SDA /SI SCL /SK CSB 4 3 2 0.1µF 0.1µF VSS (Top view) SO D B VDD DRDY A 1 Interrupt Pins of dot circle should be kept non-connected. <AK8963N> Same as AK8963C. MS1356-E-02 - 34 - 2013/10 [AK8963] 10. Package 10.1. Marking <AK8963N> • Company logo: AKM • Product name: 8963 • Date code: X1X2X3X4X5 X1 = ID = Year code X2 X3X4 = Week code = Lot X5 <AK8963C> • Product name: 8963 • Date code: X1X2X3X4X5 = ID X1 X2 = Year code X3X4 = Week code X5 = Lot 8963 AKM 8963 X1X2X3X4X5 X1X2X3X4X5 <Top view> <Top view> 10.2. Pin Assignment <AK8963C> D C B A 4 RSTN VID SO SDA/SI 3 2 CAD1 TST1 TRG RSV SCL/SK <Top view> 1 CAD0 VSS VDD DRDY CSB <AK8963N> CAD0 CAD1 RSTN NC 12 11 10 9 8 VID 7 TRG VDD 15 6 SO NC 16 5 SDA/SI VSS 13 AK8963N <Top view> TST1 14 4 RSV CSB 3 SCL/SK 2 DRDY MS1356-E-02 1 - 35 - 2013/10 [AK8963] 10.3. Outline Dimensions <AK8963C> [mm] 1.59±0.03 1.2 4 3 2 1 1 2 3 4 D 1.59±0.03 0.4 1.2 C B A 0.4 0.24±0.03 0.40 0.57 max. 0.13 0.05 C C <AK8963N> [mm] 3.00±0.05 B A 9 13 8 16 5 1.8±0.10 0.45 REF. 9 12 0.25 REF. 8 13 1.8±0.10 3.00±0.05 12 C0.25 16 5 0.35±0.10 1 4 4 0.50 REF. 1 0.25±0.05 16X 0.10 M C A B 0.05 C MS1356-E-02 0.75±0.05 - 36 - 2013/10 [AK8963] 10.4. Recommended Foot Print Pattern <AK8963C> [mm] <AK8963N> [mm] 2.25 0.575 0.50 MS1356-E-02 0.30 - 37 - 2013/10 [AK8963] 11. Relationship between the Magnetic Field and Output Code The measurement data increases as the magnetic flux density increases in the arrow directions. <AK8963C> Z <AK8963N> Y Y X 896 3 XXX XX A KM 896 XXX 3 XX X Z Important Notice • These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. • AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. • Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. • AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. • It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS1356-E-02 - 38 - 2013/10