Circuit

5
4
2
1
LINK
PHY_LINKSTS
TXER
PHY_TXER
D
3
D
TXD3
TXD2
TXD1
TXD0
TXEN
TXCLK
PHY_TXD3
PHY_TXD2
PHY_TXD1
PHY_TXD0
PHY_TXEN
PHY_TXCLK
VCC3
VCC3
R23
RN2
1.5K
R0603
LINK_ACT
MDC
MDIO
MDC
DVDD
TXCLK/ISOLATE
TXEN
TXD0
TXD1
TXD2
TXD3
TXER/TXD4
DGND
CABLESTS/LINKSTS
LINK/ACTLED#/OP2
VCC3
C
R25
2.2K
R0603
7
5
3
1
25
26
27
28
29
30
31
32
33
34
35
36
RXD3
RXD2
RXD1
RXD0
PHY_RXD3
PHY_RXD2
PHY_RXD1
PHY_RXD0
MDINTR#
PHY_MDINTR#
RXCLK
CRS
COL
PHY_RXCLK
PHY_CRS
PHY_COL
MDIO
RXD3/PHYAD3
RXD2/PHYAD2
RXD1/PHYAD1
RXD0/PHYAD0
DVDD
RXEN
MDINTR#
DGND
RXCLK/SCRAMEN/10BTSER
CRS/PHYAD4
COL/RMII
U5
DM9161A/LQFP48
SPEED
C
SPEEDLED#/OP1
FDX/COLLED#/OP0
PWRDWN
AVDD
TXTX+
AGND
AGND
RXRX+
AVDD
AVDD
VCC3
RN4
12
11
10
9
8
7
6
5
4
3
2
1
FDX_COL
2
LED1A
1
LEDX2
LINK/ACT (AVDD
TXOTXOTXO+
TXO+
RXIRXI+
8
6
4
2
4.7KX4
GND
L1
F.B/120/S0603
RXIRXI+
+
Near Pin1&2
C11
C28
0.1UF 100UF/16V
CE5MM
C0603
AGND AGND
+
C21
0.1UF
C0603
AGND AGND
B
37
38
39
40
41
42
43
44
45
46
47
48
B
AVDD_2.5V
for TX)
(AVDD for RX)
C27
100UF/16V
CE5MM
RXDV/TESTMODE
RXER/RXD4/RPTR
AUTO-MDIX#
RESET#
DVDD
XT2
XT1
DGND
NC
AGND
BGRESG
BGRES
TXER
7
5
3
1
VCC3
LED1B
3
LEDX2
10/100M
4
Near Pin9
RXD0
RXCLK
8
6
4
2
1KX4
24
23
22
21
20
19
18
17
16
15
14
13
PHY_MDC
PHY_MDIO
LED2
1
2
RXDV
PHY_RXDV
RXER
RESETB
PHY_RXER
R21
6.80K/1%
R0603
GND
VCC3
AGND
X2
Y1
X1
R24
100K
R0603
+
25MHZ/49US
XTAL
C23
10UF/16V
CE5MM
GND
C4
22PF
C0603
C5
22PF
C0603
GND
A
A
GND
Title
DM9161A with AUTO-MDIX transformer
Size
Date:
5
4
3
2
Document Number
DM9161A-MII-V01
Thursday, May 26, 2005
Rev
2.0
Sheet
1
1
of
2
5
4
3
2
1
D
D
VCC5
VCC3
Q2
G910/SOT89
VIN
GND
3
VCC3
VOUT
1
SOT-89
L3
+
2
C17
0.1UF
C0603
C29
100UF/16V
CE5MM
C24
0.1UF
C0603
C25
0.1UF
C0603
F.B/120/S0603
C26
0.1UF
C0603
AGND
GND
C
C
GND
GND
C13
0.1UF
C0603
R4
49.9/1%
R0603
R10
49.9/1%
R0603
AGND
VCC5
U1
TXO+
TXOAVDD_2.5V
RXI+
RXI-
B
R1
49.9/1%
R0603
R3
49.9/1%
R0603
C9
0.1UF
C0603
1
TD+/RD+
TX+/RX+
16
2
CT(163112) CT(112)
15
3
TD-/RD-
TX-/RX-
14
5
CT
MCT
13
6
RD+/TD+
RX+/TX+
11
7
CT(163112) CT(112)
10
8
RD-/TD-
9
RX-/TX-
CON2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
JP1
1
2
3
4
5
6
7
8
RJ-45
RJ8-45
PH163539
AGND
R28
75/1%
R0603
C2
0.1UF
C0603
AGND
R29
75/1%
R0603
R30
75/1%
R0603
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CRS/PHYAD[4]
COL/RMII
TXD3
TXD2
TXD1
TXD0
TXEN
TXCLK
TXER
RXER/RPTR
RXCLK/SCRAMEN
RXDV/TESTMODE
RXD0/PHYAD[0]
RXD1/PHYAD[1]
RXD2/PHYAD[2]
RXD3/PHYAD[3]
MDC
MDIO
PHY_CRS
PHY_COL
PHY_TXD3
PHY_TXD2
PHY_TXD1
PHY_TXD0
PHY_TXEN
PHY_TXCLK
PHY_TXER
PHY_RXER
PHY_RXCLK
PHY_RXDV
PHY_RXD0
PHY_RXD1
PHY_RXD2
PHY_RXD3
PHY_MDC
PHY_MDIO
B
MII CON
GND
C1
0.1UF
C0603
C10
C20
0.1UF
C0603
0.01UF/2KV
C0603
CHASIS_GROUND
AGND
A
A
Title
DM9161A with AUTO-MDIX Transformer
Size
Date:
5
4
3
2
Document Number
DM9161A-MII-V01
Thursday, May 26, 2005
Rev
2.0
Sheet
2
1
of
2