5 4 3 2 1. Reserve R2 for DM9161A/C and further application. (Reserve R2 and delete Q1, Q4, R5, R7, R8,LED3) 1 2.When pin14 is pulled down internally (R6=NC) (Reserve Q1, LED4, R8 and delete R2, Q4, R5, R7, LED3) VCC3 LINK Note: please refer page 8 and 12 of datasheet for how to choose " pull down(R6=NC) /pull up(R6=10K) " D LED4 VCC3 R6 NC/10K R0603 2 R8 6.2K 1 R7 LINK LINK Q4 Q1 MMBT3906 10K TXER R5 TXD3 TXD2 TXD1 TXD0 TXEN TXCLK R2 NC/0 D 2N3904 LED3 1 SPEED 2 470 VCC3 3.When pin14 is pulled up (R6=10K) (Reserve Q4, R5, R7, LED3, and delete R2, R8, Q1, LED4 ) VCC3 R23 1.5K R0603 RN2 LED2 LINK_ACT 2 7 5 3 1 1 24 23 22 21 20 19 18 17 16 15 14 13 MDC MDIO MDC DVDD TXCLK/ISOLATE TXEN TXD0 TXD1 TXD2 TXD3 TXER/TXD4 DGND CABLESTS/LINKSTS LINK/ACTLED#/OP2 VCC3 C R31 10K 10K R33 10K VCC3 330RX4 NEW ADDITIONAL PULL-UPS USED TO SET LATCH STATE TO AUTONEGOTIATION R0603 R32 8 6 4 2 R0603 C R0603 R25 2.2K R0603 25 26 27 28 29 30 31 32 33 34 35 36 RXD3 RXD2 RXD1 RXD0 MDINTR# RXCLK CRS COL MDIO RXD3/PHYAD3 RXD2/PHYAD2 RXD1/PHYAD1 RXD0/PHYAD0 U5 DVDD RXEN DM9161A/B/C_LQFP48 MDINTR# DGND RXCLK/SCRAMEN/10BTSER CRS/PHYAD4 COL/RMII SPEEDLED#/OP1 FDX/COLLED#/OP0 PWRDWN AVDD TXTX+ AGND AGND RXRX+ AVDD AVDD SPEED FDX_COL 12 11 10 9 8 7 6 5 4 3 2 1 LED1 2 (AVDD for TX) Near Pin9 L1 F.B/120/S0603 RXIRXI+ GND C11 100UF/16V CE5MM RXDV/TESTMODE RXER/RXD4/RPTR AUTO-MDIX# RESET# DVDD XT2 XT1 DGND NC AGND BGRESG BGRES 7 5 3 1 C28 0.1UF C0603 + GND Near Pin1&2 VCC3 TXER C27 100UF/16V CE5MM (AVDD for RX) RN4 RXD0 RXCLK 1 AVDD_1.8V TXOTXO+ 8 6 4 2 4.7KX4 GND GND R10 C13 49.9/1% 0.1UF R0603 C0603 GND R4 49.9/1% R0603 37 38 39 40 41 42 43 44 45 46 47 48 GND C21 0.1UF C0603 + B RXDV VCC3 AVDD_1.8V R24 100K R0603 GND RXER RESETB C23 10UF/16V CE5MM X1 X2 GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CRS COL TXD3 TXD2 TXD1 TXD0 TXEN TXCLK TXER RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MDC MDIO C4 22PF C0603 GND TD+/RD+ TX+/RX+ 16 2 CT(163112) CT(112) 15 3 TD-/RD- TX-/RX- 14 5 CT MCT 13 6 RD+/TD+ RX+/TX+ 11 7 CT(163112) CT(112) 10 8 RD-/TD- 9 RX-/TX- PH163539 1 2 3 4 5 6 7 8 B RJ-45 RJ8-45 R28 75/1% R0603 R29 75/1% R0603 R30 75/1% R0603 C1 0.1UF C0603 C10 C2 0.1UF C0603 C5 22PF C0603 C20 0.1UF C0603 0.01UF/2KV C0603 GND GND CHASIS_GROUND Q2 G910/SOT89 VCC5 3 VIN SOT-89 VCC3 VOUT GND VCC3 1 A C17 0.1UF C0603 C29 + 100UF/16V CE5MM C24 0.1UF C0603 C25 0.1UF C0603 C26 0.1UF C0603 Davicom Semiconductor Inc. Title DM9161A/B/C with AUTO-MDIX transformer MII CON GND GND Size GND Date: 5 JP1 GND 2 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 C9 0.1UF C0603 R3 49.9/1% R0603 25MHZ/49US XTAL CON2 A R1 49.9/1% R0603 Y1 VCC5 GND + GND R21 6.80K/1% R0603 U1 1 4 3 2 Document Number DM9161C-MII-V05-M Friday, May 21, 2010 Rev 0.5-M Sheet 1 1 of 4 5 4 3 2 1 D D TXER TXD3 TXD2 TXD1 TXD0 TXEN TXCLK VCC3 VCC3 R23 1.5K R0603 LED4 LINK_ACT 2 R25 2.2K R0603 25 26 27 28 29 30 31 32 33 34 35 36 RXD3 RXD2 RXD1 RXD0 MDINTR# RXCLK CRS COL 2 SPEEDLED#/OP1 FDX/COLLED#/OP0 PWRDWN AVDD TXTX+ AGND AGND RXRX+ AVDD AVDD SPEED FDX_COL 12 11 10 9 8 7 6 5 4 3 2 1 (AVDD for TX) AVDD_2.5V TXOTXO+ DM9161A CIRCUIT Near Pin9 L1 0R FB/120/S0603/20mA RXIRXI+ C27 100UF/16V CE5MM C28 0.1UF C0603 + (AVDD for RX) GND GND Near Pin1&2 C11 100UF/16V CE5MM RXDV/TESTMODE RXER/RXD4/RPTR AUTO-MDIX# RESET# DVDD XT2 XT1 DGND NC AGND BGRESG BGRES 7 5 3 1 8 6 4 2 4.7KX4 C21 0.1UF C0603 + GND GND R10 C13 49.9/1% 0.1UF R0603 C0603 GND R4 49.9/1% R0603 37 38 39 40 41 42 43 44 45 46 47 48 GND B RXDV VCC3 AVDD_2.5V R24 100K R0603 GND X1 X2 GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CRS COL TXD3 TXD2 TXD1 TXD0 TXEN TXCLK TXER RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MDC MDIO C4 22PF C0603 GND U1 1 TD+/RD+ TX+/RX+ 16 2 CT(163112) CT(112) 15 3 TD-/RD- TX-/RX- 14 5 CT MCT 13 6 RD+/TD+ RX+/TX+ 11 7 CT(163112) CT(112) 10 8 RD-/TD- 9 RX-/TX- PH163539 1 2 3 4 5 6 7 8 B RJ-45 RJ8-45 R28 75/1% R0603 R29 75/1% R0603 R30 75/1% R0603 C1 0.1UF C0603 C10 C2 0.1UF C0603 C5 22PF C0603 C20 0.1UF C0603 0.01UF/2KV C0603 GND GND CHASIS_GROUND Q2 G910/SOT89 VCC5 3 VIN SOT-89 VCC3 VOUT GND VCC3 1 A C17 0.1UF C0603 C29 + 100UF/16V CE5MM C24 0.1UF C0603 C25 0.1UF C0603 C26 0.1UF C0603 Davicom Semiconductor Inc. Title DM9161A with AUTO-MDIX transformer MII CON GND GND Size GND Date: 5 JP1 GND 2 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 C9 0.1UF C0603 R3 49.9/1% R0603 25MHZ/49US XTAL CON2 A R1 49.9/1% R0603 Y1 VCC5 GND C23 10UF/16V CE5MM GND R21 6.80K/1% R0603 RXER RESETB + VCC3 C MDIO RXD3/PHYAD3 RXD2/PHYAD2 RXD1/PHYAD1 RXD0/PHYAD0 U5 DVDD RXEN DM9161A_LQFP48 MDINTR# DGND RXCLK/SCRAMEN/10BTSER CRS/PHYAD4 COL/RMII VCC3 TXER 1 8 6 4 2 330RX4 RN4 RXD0 RXCLK 7 5 3 1 LED1 MDC DVDD TXCLK/ISOLATE TXEN TXD0 TXD1 TXD2 TXD3 TXER/TXD4 DGND CABLESTS/LINKSTS LINK/ACTLED#/OP2 VCC3 C RN2 1 1 24 23 22 21 20 19 18 17 16 15 14 13 MDC MDIO SPEED LED2 2 4 3 2 Document Number DM9161C-MII-V05-M Friday, May 21, 2010 Rev 0.5-M Sheet 1 2 of 4 5 4 3 2 1.When pin14 is pulled up (R6=10K) VCC3 Note: please refer page 8 and 12 of datasheet for how to choose " pull down(R6=NC) /pull up(R6=10K) " 1 2.When pin14 is pulled down internally (R6=NC) (Reserve Q4, R5, R7, LED3, and delete R2, R8, Q1, LED4 ) (Reserve Q1, LED4, R8 and delete R2, Q4, R5, R7, LED3) LINK LED4 VCC3 R6 NC/10K R0603 2 R8 6.2K 1 R7 LINK D LINK Q4 Q1 MMBT3906 10K TXER R5 TXD3 TXD2 TXD1 TXD0 TXEN TXCLK 1 D 2N3904 LED3 SPEED 2 470 VCC3 VCC3 R23 1.5K R0603 RN2 LED2 LINK_ACT 2 1 24 23 22 21 20 19 18 17 16 15 14 13 MDC MDIO R25 2.2K R0603 25 26 27 28 29 30 31 32 33 34 35 36 RXD3 RXD2 RXD1 RXD0 MDINTR# RXCLK CRS COL SPEEDLED#/OP1 FDX/COLLED#/OP0 PWRDWN AVDD TXTX+ AGND AGND RXRX+ AVDD AVDD SPEED FDX_COL 12 11 10 9 8 7 6 5 4 3 2 1 LED1 2 (AVDD for TX) DM9161B CIRCUIT Near Pin9 L1 0R FB/120/S0603/20mA RXIRXI+ C27 100UF/16V CE5MM C28 0.1UF C0603 + (AVDD for RX) GND GND Near Pin1&2 C11 100UF/16V CE5MM RXDV/TESTMODE RXER/RXD4/RPTR AUTO-MDIX# RESET# DVDD XT2 XT1 DGND NC AGND BGRESG BGRES 7 5 3 1 1 AVDD_1.8V TXOTXO+ VCC3 TXER 8 6 4 2 4.7KX4 C21 0.1UF C0603 + GND GND R10 C13 49.9/1% 0.1UF R0603 C0603 GND R4 49.9/1% R0603 37 38 39 40 41 42 43 44 45 46 47 48 GND B RXDV VCC3 AVDD_1.8V R24 100K R0603 GND X1 X2 GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CRS COL TXD3 TXD2 TXD1 TXD0 TXEN TXCLK TXER RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MDC MDIO C4 22PF C0603 GND U1 1 TD+/RD+ TX+/RX+ 16 2 CT(163112) CT(112) 15 3 TD-/RD- TX-/RX- 14 5 CT MCT 13 6 RD+/TD+ RX+/TX+ 11 7 CT(163112) CT(112) 10 8 RD-/TD- 9 RX-/TX- PH163539 1 2 3 4 5 6 7 8 B RJ-45 RJ8-45 R28 75/1% R0603 R29 75/1% R0603 R30 75/1% R0603 C1 0.1UF C0603 C10 C2 0.1UF C0603 C5 22PF C0603 C20 0.1UF C0603 0.01UF/2KV C0603 GND GND CHASIS_GROUND Q2 G910/SOT89 VCC5 3 VIN SOT-89 VCC3 VOUT GND VCC3 1 A C17 0.1UF C0603 C29 + 100UF/16V CE5MM C24 0.1UF C0603 C25 0.1UF C0603 C26 0.1UF C0603 Davicom Semiconductor Inc. Title DM9161B with AUTO-MDIX transformer MII CON GND GND Size GND Date: 5 JP1 GND 2 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 C9 0.1UF C0603 R3 49.9/1% R0603 25MHZ/49US XTAL CON2 A R1 49.9/1% R0603 Y1 VCC5 GND C23 10UF/16V CE5MM GND R21 6.80K/1% R0603 RXER RESETB + VCC3 C MDIO RXD3/PHYAD3 RXD2/PHYAD2 RXD1/PHYAD1 RXD0/PHYAD0 U5 DVDD RXEN DM9161B_LQFP48 MDINTR# DGND RXCLK/SCRAMEN/10BTSER CRS/PHYAD4 COL/RMII RN4 RXD0 RXCLK 8 6 4 2 330RX4 MDC DVDD TXCLK/ISOLATE TXEN TXD0 TXD1 TXD2 TXD3 TXER/TXD4 DGND CABLESTS/LINKSTS LINK/ACTLED#/OP2 VCC3 C 7 5 3 1 4 3 2 Document Number DM9161C-MII-V05-M Friday, May 21, 2010 Rev 0.5-M Sheet 1 3 of 4 5 4 3 2 1 D D TXER TXD3 TXD2 TXD1 TXD0 TXEN TXCLK LED4 VCC3 SPEED VCC3 2 R23 1.5K R0603 1 RN2 LED2 LINK_ACT 2 7 5 3 1 1 24 23 22 21 20 19 18 17 16 15 14 13 MDC MDIO MDC DVDD TXCLK/ISOLATE TXEN TXD0 TXD1 TXD2 TXD3 TXER/TXD4 DGND CABLESTS/LINKSTS LINK/ACTLED#/OP2 VCC3 C R31 10K 10K R33 10K VCC3 330RX4 PULL-UP RESISTORS USED TO SET LATCH STATE TO AUTONEGOTIATION R0603 R32 8 6 4 2 R0603 C R0603 R25 2.2K R0603 25 26 27 28 29 30 31 32 33 34 35 36 RXD3 RXD2 RXD1 RXD0 MDINTR# RXCLK CRS COL MDIO RXD3/PHYAD3 RXD2/PHYAD2 RXD1/PHYAD1 RXD0/PHYAD0 U5 DVDD RXEN DM9161C_LQFP48 MDINTR# DGND RXCLK/SCRAMEN/10BTSER CRS/PHYAD4 COL/RMII SPEEDLED#/OP1 FDX/COLLED#/OP0 PWRDWN AVDD TXTX+ AGND AGND RXRX+ AVDD AVDD SPEED FDX_COL 12 11 10 9 8 7 6 5 4 3 2 1 LED1 2 (AVDD for TX) RXIRXI+ C28 0.1UF C0603 + GND GND Near Pin1&2 C11 100UF/16V CE5MM RXDV/TESTMODE RXER/RXD4/RPTR AUTO-MDIX# RESET# DVDD XT2 XT1 DGND NC AGND BGRESG BGRES 7 5 3 1 C27 100UF/16V CE5MM (AVDD for RX) VCC3 TXER DM9161C CIRCUIT Near Pin9 L1 0R FB/120/S0603/20mA RN4 RXD0 RXCLK 1 AVDD_1.8V TXOTXO+ 8 6 4 2 4.7KX4 GND GND R10 C13 49.9/1% 0.1UF R0603 C0603 GND R4 49.9/1% R0603 37 38 39 40 41 42 43 44 45 46 47 48 GND C21 0.1UF C0603 + B RXDV VCC3 AVDD_1.8V R24 100K R0603 GND RXER RESETB C23 10UF/16V CE5MM X1 X2 GND 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CRS COL TXD3 TXD2 TXD1 TXD0 TXEN TXCLK TXER RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MDC MDIO C4 22PF C0603 GND TD+/RD+ TX+/RX+ 16 2 CT(163112) CT(112) 15 3 TD-/RD- TX-/RX- 14 5 CT MCT 13 6 RD+/TD+ RX+/TX+ 11 7 CT(163112) CT(112) 10 8 RD-/TD- 9 RX-/TX- PH163539 1 2 3 4 5 6 7 8 B RJ-45 RJ8-45 R28 75/1% R0603 R29 75/1% R0603 R30 75/1% R0603 C1 0.1UF C0603 C10 C2 0.1UF C0603 C5 22PF C0603 C20 0.1UF C0603 0.01UF/2KV C0603 GND GND CHASIS_GROUND Q2 G910/SOT89 VCC5 3 VIN SOT-89 VCC3 VOUT GND VCC3 1 A C17 0.1UF C0603 C29 + 100UF/16V CE5MM C24 0.1UF C0603 C25 0.1UF C0603 C26 0.1UF C0603 Davicom Semiconductor Inc. Title DM9161C with AUTO-MDIX transformer MII CON GND GND Size GND Date: 5 JP1 GND 2 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 C9 0.1UF C0603 R3 49.9/1% R0603 25MHZ/49US XTAL CON2 A R1 49.9/1% R0603 Y1 VCC5 GND + GND R21 6.80K/1% R0603 U1 1 4 3 2 Document Number DM9161C-MII-V05-M Friday, May 21, 2010 Rev 0.5-M Sheet 1 4 of 4