8 7 6 5 4 3 2 1 DVDD JP6 DVDD JP7 1 2 3 HEADER 3 PWRDWN R22 1 2 3 PWRDWN 1 2 3 RXD0/PHYAD[0] HEADER 3 PHYAD[0] NORMAL PULL LOW DGND JP9 10K DGND HEADER 3 PHYAD[2] NORMAL PULL LOW DVDD JP11 R24 10K DGND 10K DGND R42 1 2 3 RXDV/TESTMODE HEADER 3 TESTMODE NORMAL PULL LOW DVDD JP18 R28 1 2 3 CRS/PHYAD[4] HEADER 3 PHYAD[4] NORMAL PULL LOW DVDD JP13 R26 1 2 3 RXD2/PHYAD[2] 10K DGND DVDD LINK 10K DGND HEADER 3 LINK NORMAL PULL LOW NORMAL PULL LOW XT1 D +VDD 1 GND 7 R40 100K DGND 25MHz R39 1K OSCIN C15 10UF AGND R41 6.80K 1 2 3 RXD1/PHYAD[1] HEADER 3 PHYAD[1] NORMAL PULL LOW DGND JP10 R23 1 2 3 10K DGND HEADER 3 PHYAD[3] NORMAL PULL LOW RXDV/TESTMODE RXER/RPTR DVDD RESET# DVDD XT2 XT1 DGND 14 VCC NC DVDD JP8 DVDD R25 JP12 10K DGND C10 22PF DGND DGND U17 1 2 3 4 5 6 7 8 9 10 11 12 AVDD AVDD RX+ RXAGND AGND TX+ TXAVDD PWRDWN FDX/COLLED#/OP0 SPEEDLED#/OP1 COL/RMII CRS/PHYAD[4] RXCLK/SCRAMEN DGND MDINTR# RXEN DVDD RXD[0]/PHYAD[0] RXD[1]/PHYAD[1] RXD[2]/PHYAD[2] RXD[3]/PHYAD[3] MDIO DVDD R30 FDX/COL/OP0 DVDD R31 SPEED/OP1 JP17 RJ45 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VCC TXD0 TXD1 TXEN RXD0/PHYAD[0] RXD1/PHYAD[1] RXER/RPTR RXDV/TESTMODE MDC MDIO RESET# OSCIN C12 0.1UF/2KV U5 DGND R5 J20 DVDD VCC RST91181 CRS/PHYAD[4]1 COL/RMII1 TXD31 TXD21 TXD11 TXD01 TXEN1 TXCLK1 MDINTR#1 RXER/RPTR1 RXCLK/SCRAMEN1 RXDV/TESTMODE1 RXD0/PHYAD[0]1 RXD1/PHYAD[1]1 RXD2/PHYAD[2]1 RXD3/PHYAD[3]1 MDC1 MDIO1 LINK1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 R6 75 1% R7 75 1% 75 1% 9161 MDC DVDD TXCLK TXEN TXD0 TXD1 TXD2 TXD3 TXER DGND LINK LINK&ACT/OP2 B D DVDD R38 1.5K 13 14 15 16 17 18 19 20 21 22 23 24 10K RXER/RPTR 10K DGND HEADER 3 RPTR NORMAL PULL LOW CON14 FOR RMII OPTION COL/RMII CRS/PHYAD[4] RXCLK/SCRAMEN DGND MDINTR# RXEN DVDD RXD0/PHYAD[0] RXD1/PHYAD[1] RXD2/PHYAD[2] RXD3/PHYAD[3] MDIO 36 35 34 33 32 31 30 29 28 27 26 25 LINKACTLED#/OP2 CABLESTS/LINK DGND TXER/TXD[4] TXD[3] TXD[2] TXD[1] TXD[0] TXEN TXCLK DVDD MDC AVDD AVDD RXIP RXIN AGND AGND TXOP TXON AVDD PWRDWN FDX/COL/OP0 SPEED/OP1 C 10K DGND VCC TXD0 TXD1 TXEN RXD0 RXD1 RXER/(RPTR/NODE) CRS_DV MDC MDIO RESET# REF_CLK(50MHz) DGND NC BGRES BGRESG AGND NC DGND XT1 XT2 DVDD RESET# DVDD RXER/RXD4/RPTR RXDV/TESTMODE 25MHz C14 22PF R29 1 2 3 COL/RMII J19 48 47 46 45 44 43 42 41 40 39 38 37 XT2 DVDD JP14 R27 HEADER 3 RMII NORMAL PULL LOW Y1 XT1 DVDD 1 2 3 RXD3/PHYAD[3] 1 2 3 4 5 6 7 8 RST9161 DVDD 5V OSCILLATOR OSC1 8 OUT RST9118 CRS/PHYAD[4] COL/RMII TXD3 C11 TXD2 0.1UF TXD1 TXD0 TXEN TXCLK MDINTR# RXER/RPTR RXCLK/SCRAMEN RXDV/TESTMODE RXD0/PHYAD[0] RXD1/PHYAD[1] RXD2/PHYAD[2] RXD3/PHYAD[3] MDC MDIO LINK R36 50 R37 50 8 8 9 9 7 7 10 10 6 6 11 11 5 5 12 12 GNDCH R4 75 1% 4 4 13 13 3 3 14 14 AVDD RXIN 2 TXON 50 15 15 R34 2 RXIP 1 TXOP R35 50 16 16 1 C PE68515 C13 0.1UF AGND B CON40A +5V 10K JP15 JP16 DVDD DVDD JUMPER JP16 IS USED FOR MAC +3.3V R32 LINK&ACT/OP2 DGND 10K D1 R18 LINK&ACT/OP2 LED D2 1K R19 SPEED/OP1 DGND 100M LED D3 1K R20 FDX/COL/OP0 DVDD JP2 A 1 2 3 HEADER 3 SCRAMEN R33 LED 1K RXCLK/SCRAMEN CABLESTS FOR OPTION 10K 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CRS/PHYAD[4] COL/RMII TXD3 TXD2 TXD1 TXD0 TXEN TXCLK TXER RXER/RPTR RXCLK/SCRAMEN RXDV/TESTMODE RXD0/PHYAD[0] RXD1/PHYAD[1] RXD2/PHYAD[2] RXD3/PHYAD[3] MDC MDIO A MII CON R21 D4 CABLESTS LINK DGND NORMAL PULL HIGH DGND 1K LED DAVICOM Semiconductor, Inc Title DM9161 BENCH BOARD_Auto-negotiation For Reference Only 8 7 6 5 4 3 Size Custom Document Number DM9161 BENCH BOARD Date: Friday, December 20, 2002 2 Sheet Rev 1.1 1 of 1 1