AO4449

AO4449
30V P-Channel MOSFET
General Description
Product Summary
The AO4449 uses advanced trench technology to provide
excellent RDS(ON), and ultra-low low gate charge. This
device is suitable for use as a load switch or in PWM
applications.
ID (at VGS=-10V)
-30V
-7A
RDS(ON) (at VGS=-10V)
< 34mΩ
RDS(ON) (at VGS = -4.5V)
< 54mΩ
VDS
100% UIS Tested
100% Rg Tested
SOIC-8
Top View
D
D
D
Bottom View
D
D
G
G
S
S
S
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TA=25°C
Continuous Drain
Current
C
Units
V
±20
V
-7
ID
TA=70°C
Maximum
-30
-5.5
A
IDM
-40
Avalanche Current C
IAS, IAR
23
A
Avalanche energy L=0.1mH C
TA=25°C
EAS, EAR
26
mJ
Pulsed Drain Current
Power Dissipation B
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev 3: Nov 2011
3.1
PD
TA=70°C
TJ, TSTG
Symbol
t ≤ 10s
Steady-State
Steady-State
W
2
RθJA
RθJL
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-55 to 150
Typ
31
59
16
°C
Max
40
75
24
Units
°C/W
°C/W
°C/W
Page 1 of 6
AO4449
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=-250µA, VGS=0V
-30
Typ
Max
Units
V
VDS=-30V, VGS=0V
-1
TJ=55°C
-5
µA
VDS=0V,
VGS= ±20V
Gate-Body
leakagetrench
current
The AO4449
uses advanced
technology to provide
excellent
RDS(ON), and ultra-low low gate charge.
±100 This
nAdevice is suitable for u
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-1.3
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-40
-1.85
-2.4
21
34
31.5
38
VGS=-4.5V, ID=-5A
33
54
18
VGS=-10V, ID=-7A
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
gFS
Forward Transconductance
VDS=-5V, ID=-7A
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
A
-0.8
DYNAMIC PARAMETERS
Ciss
Input Capacitance
VGS=0V, VDS=-15V, f=1MHz
V
mΩ
mΩ
S
-1
V
-3.5
A
760
pF
140
pF
95
pF
3.2
5
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
13.6
16
nC
Qg(4.5V) Total Gate Charge
6.7
8
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
VGS=0V, VDS=0V, f=1MHz
VGS=-10V, VDS=-15V, ID=-7A
1.5
2.5
nC
3.2
nC
8
ns
6
ns
17
ns
5
ns
15
ns
nC
VGS=-10V, VDS=-15V,
RL=2.15Ω, RGEN=3Ω
IF=-7A, dI/dt=100A/µs
Body Diode Reverse Recovery Charge IF=-7A, dI/dt=100A/µs
9.7
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 3: Nov 2011
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Page 2 of 6
AO4449
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
30
-10V
-6V
-5V
-4.5V
VDS=-5V
35
25
30
-ID(A)
-ID (A)
20
-4V
25
20
15
-3.5V
15
10
10
125°C
5
VGS=-3V
5
0
0
0
1
2
3
4
5
1
50
2
2.5
3
3.5
4
4.5
5
1.8
Normalized On-Resistance
45
VGS=-4.5V
40
RDS(ON) (mΩ
Ω)
1.5
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
35
30
25
20
VGS=-10V
15
10
VGS=-10V
ID=-7A
1.6
1.4
17
5
VGS=-4.5V
ID=-5A2
10
1.2
1
0.8
0
5
10
15
20
0
25
50
75
100
125
150
175
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
-ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
80
1.0E+02
ID=-7A
1.0E+01
40
60
1.0E+00
125°C
40
-IS (A)
RDS(ON) (mΩ
Ω)
25°C
125°C
25°C
1.0E-01
1.0E-02
1.0E-03
20
25°C
1.0E-04
1.0E-05
0
2
6
8
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 3: Nov 2011
4
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 6
AO4449
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1200
10
VDS=-15V
ID=-7A
1000
Ciss
Capacitance (pF)
-VGS (Volts)
8
6
4
800
600
400
2
200
0
0
0
2
4
6
8
10
12
Qg (nC)
Figure 7: Gate-Charge Characteristics
Coss
Crss
0
14
100.0
5
10
15
20
25
-VDS (Volts)
Figure 8: Capacitance Characteristics
30
10.0
TA=25°C
TA=150°C
TA=100°C
-ID (Amps)
-IAR (A) Peak Avalanche Current
100.0
1ms
1.0
10ms
0.1
TA=125°C
10µs
100µs
RDS(ON)
limited
TJ(Max)=150°C
TA=25°C
10s
DC
0.0
10.0
0.01
1
10
100
1000
Time in avalanche, tA (µ
µs)
Figure 9: Single Pulse Avalanche capability (Note C)
0.1
1
10
-VDS (Volts)
Figure 10: Maximum Forward Biased Safe
Operating Area (Note F)
100
10000
TA=25°C
Power (W)
1000
100
10
1
0.00001
0.001
0.1
10
1000
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
Rev 3: Nov 2011
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Page 4 of 6
AO4449
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=75°C/W
The AO4449
uses advanced trench technology to provide excellent RDS(ON), and ultra-low low gate charge. This device is suitable fo
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 3: Nov 2011
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Page 5 of 6
AO4449
AO4449
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgd
Qgs
Vds
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
Vgs
-
DUT
Vgs
VDC
td(on)
t d(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
E AR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev 3: Nov 2011
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 6 of 6