0.8% Accurate Quad Voltage Monitor ADM1184 FEATURES Powered from 2.7 V to 5.5 V on the VCC pin Monitors 4 supplies via 0.8% accurate comparators 4 inputs can be programmed to monitor different voltage levels with external resistor dividers 3 open-drain enable outputs (OUT1, OUT2, and OUT3) Open-drain power-good output (PWRGD) Internal 190 ms delay associated with assertion of PWRGD 10-lead MSOP FUNCTIONAL BLOCK DIAGRAM VCC ADM1184 POWER AND REF = 0.6V REFERENCE GENERATOR OUT1 VIN1 REF = 0.6V OUT2 VIN2 REF = 0.6V APPLICATIONS OUT3 REF = 0.6V PWRGD VIN4 REF = 0.6V GND 07352-001 Monitor and alarm functions Telecommunications Microprocessor systems PC/servers INTERNAL LOGIC VIN3 Figure 1. GENERAL DESCRIPTION The ADM1184 is an integrated, 4-channel voltage-monitoring device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device. Four precision comparators monitor four voltage rails. Each comparator has a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails. The ADM1184 has four open-drain outputs. OUT1 to OUT3 can be used to enable power supplies, and PWRGD is a common power-good output. OUT1 to OUT3 are dependent on their associated VINx input (that is, VIN1, VIN2, or VIN3). If a supply monitored by VINx drops below its programmed threshold, the associated OUTx pin and PWRGD are disabled. PWRGD is a common power-good output indicating the status of all monitored supplies. There is an internal 190 ms (typical) delay associated with the assertion of the PWRGD output. If VIN1, VIN2, VIN3, or VIN4 drops below its programmed threshold, PWRGD is deasserted immediately. The ADM1184 is available in a 10-lead mini small outline package (MSOP). Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. ADM1184 TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................5 Applications....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................9 General Description ......................................................................... 1 Input Configuration......................................................................9 Revision History ............................................................................... 2 Output Configuration...................................................................9 Specifications..................................................................................... 3 Voltage Monitoring and Sequencing Application.................. 11 Absolute Maximum Ratings............................................................ 4 Outline Dimensions ....................................................................... 12 Thermal Resistance ...................................................................... 4 Ordering Guide .......................................................................... 12 ESD Caution.................................................................................. 4 REVISION HISTORY 2/08—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADM1184 SPECIFICATIONS VCC = 2.7 V to 5.5 V, TA = −40°C to +85°C. Table 1. Parameter VCC Pin Operating Voltage Range, VCC Supply Current, IVCC VIN1 to VIN4 (VINx) Pins Input Current, IVINLEAK Input Threshold, VTH OUT1 to OUT3 (OUTx), PWRGD Pins Output Low Voltage, VOUTL Leakage Current, IALERT VCC that Guarantees Valid Outputs TIMING DELAYS VIN1 to OUT1, VIN2 to OUT2, VIN3 to OUT3 Low-to-High Propagation Delay High-to-Low Propagation Delay, All Inputs All Inputs High to PWRGD Rising Delay Min Typ Max Unit 2.7 3.3 24 5.5 80 V μA +20 0.6048 nA V VVINx = 0.7 V 0.6000 0.4 0.4 +1 V V μA V VCC = 2.7 V, ISINK = 2 mA VCC = 1 V, ISINK = 100 μA −20 0.5952 −1 1 100 30 30 190 280 Rev. 0 | Page 3 of 12 μs μs ms Conditions All outputs are guaranteed to be either low or to give a valid output level from VCC = 1 V Refer to the timing diagrams in Figure 18 and Figure 19 VCC = 3.3 V VCC = 3.3 V VCC = 3.3 V ADM1184 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 2. θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Parameter VCC Pin VINx Pins OUTx, PWRGD Pins Storage Temperature Range Operating Temperature Range Lead Temperature Soldering (10 sec) Junction Temperature Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to +6 V −65°C to +125°C −40°C to +85°C 300°C 150°C Table 3. Thermal Resistance Package Type 10-Lead MSOP ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 12 θJA 137.5 Unit °C/W ADM1184 GND 1 VIN1 2 VIN2 3 VIN3 4 VIN4 5 10 VCC ADM1184 9 OUT1 TOP VIEW (Not to Scale) 8 OUT2 7 OUT3 6 PWRGD 07352-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 Mnemonic GND VIN1 3 VIN2 4 VIN3 5 VIN4 6 PWRGD 7 OUT3 8 OUT2 9 OUT1 10 VCC Description Chip Ground Pin. Noninverting Input of Comparator 1. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. Noninverting Input of Comparator 2. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. Noninverting Input of Comparator 3. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. Noninverting Input of Comparator 4. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. Active High, Open-Drain Output. When the voltage on each VINx input exceeds 0.6 V, PWRGD is asserted after a 190 ms delay. Once PWRGD has been asserted, if the voltage monitored by VIN1, VIN2, VIN3, or VIN4 falls below 0.6 V, the PWRGD output is deasserted immediately. Active High, Open-Drain Output. When the voltage on VIN3 exceeds 0.6 V, OUT3 is asserted. OUT3 remains asserted until the voltage monitored by VIN3 falls below 0.6 V, and then it is driven low. Active High, Open-Drain Output. When the voltage on VIN2 exceeds 0.6 V, OUT2 is asserted. OUT2 remains asserted until the voltage monitored by VIN2 falls below 0.6 V, and then it is driven low. Active High, Open-Drain Output. When the voltage on VIN1 exceeds 0.6 V, OUT1 is asserted. OUT1 remains asserted until the voltage monitored by VIN1 falls below 0.6 V, and then it is driven low. Positive Supply Input Pin. The operating supply voltage range is 2.7 V to 5.5 V. Rev. 0 | Page 5 of 12 ADM1184 TYPICAL PERFORMANCE CHARACTERISTICS 50 280 100mV OVERDRIVE 45 260 240 35 RISING DELAY (ms) SUPPLY CURRENT (µA) 40 30 25 20 15 220 200 180 160 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 120 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V) Figure 6. All Inputs High to PWRGD Rising Delay vs. Supply Voltage 50 45 45 40 40 35 VCC = 5V 30 RISING DELAY (µs) 50 VCC = 3.3V 25 20 VCC = 2.7V 15 30 25 20 15 10 5 5 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) Figure 4. Supply Current vs. Temperature VCC = 3.3V, 100mV OVERDRIVE 35 10 0 –40 –30 –20 –10 07352-004 SUPPLY CURRENT (µA) Figure 3. Supply Current vs. Supply Voltage 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) 07352-007 0 07352-003 0 07352-006 140 5 Figure 7. VIN1/VIN2/VIN3 to OUT1/OUT2/OUT3 Rising Delay vs. Temperature 280 50 VCC = 3.3V, 100mV OVERDRIVE 100mV OVERDRIVE 45 260 40 RISING DELAY (µs) 220 200 180 35 30 25 20 15 160 10 140 5 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) Figure 5. All Inputs High to PWRGD Rising Delay vs. Temperature 0 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V) 07352-008 120 –40 –30 –20 –10 07352-005 RISING DELAY (ms) 240 Figure 8. VIN1/VIN2/VIN3 to OUT1/OUT2/OUT3 Rising Delay vs. Supply Voltage Rev. 0 | Page 6 of 12 ADM1184 60 180 FALLING DELAY (µs) 50 40 30 20 0 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 SUPPLY VOLTAGE (V) Figure 9. VINx to Output Falling Delay vs. Supply Voltage 120 100 80 60 40 20 0 10 20 30 40 50 60 70 80 90 100 INPUT OVERDRIVE (mV) Figure 12. Trip Threshold Maximum Transient Duration vs. Input Overdrive 50 200 VCC = 3.3V, 100mV OVERDRIVE APPLICABLE TO CHANNEL 1, CHANNEL 2, AND CHANNEL 3 180 PROPAGATION DELAY (µs) 40 FALLING DELAY (µs) 140 0 07352-009 10 160 07352-012 MAXIMUM TRANSIENT DURATION (µs) 100mV OVERDRIVE 30 20 10 160 140 120 100 80 60 40 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) 0 07352-010 0 –40 –30 –20 –10 0 20 30 40 50 60 70 80 90 100 INPUT OVERDRIVE (mV) Figure 10. VINx to Output Falling Delay vs. Temperature Figure 13. Propagation Delay vs. Input Overdrive 0.610 400 0.608 350 OUTPUT LOW VOLTAGE (mV) 0.606 0.604 0.602 0.600 0.598 0.596 0.594 300 250 200 150 100 0.590 –40 –30 –20 –10 0 10 20 30 40 50 60 70 TEMPERATURE (°C) 80 90 Figure 11. VINx Trip Threshold vs. Temperature 0 0 2 4 6 8 10 12 14 16 18 20 22 OUTPUT SINK CURRENT (mA) Figure 14. Output Low Voltage vs. Output Sink Current Rev. 0 | Page 7 of 12 24 07352-014 50 0.592 07352-011 VINx TRIP THRESHOLD (V) 10 07352-013 20 ADM1184 100 80 70 60 50 40 1mA SINK 30 20 10 0 1.0 100µA SINK 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 07352-015 OUTPUT LOW VOLTAGE (mV) 90 Figure 15. Output Low Voltage vs. Supply Voltage Rev. 0 | Page 8 of 12 ADM1184 THEORY OF OPERATION The ADM1184 is an integrated, 4-channel voltage-monitoring device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device. VCC = 2.7V TO 5.5V 3.3V 2.5V 1.8V 1.2V OUT1 VIN2 OUT2 VIN3 OUT3 ENABLE SIGNALS When all four monitored supplies exceed 0.6 V, a system powergood signal (PWRGD) is asserted. There is an internal 190 ms (typical) delay associated with the assertion of the PWRGD output. After PWRGD is asserted, if any of the four monitored supplies drops below its programmed threshold, the corresponding OUTx output and the PWRGD output are deasserted. If only the supply monitored by VIN4 drops below its programmed threshold, just the PWRGD output is deasserted. PWRGD POWER GOOD 07352-016 VIN4 GND Figure 16. Typical Applications Circuit INPUT CONFIGURATION Four precision comparators monitor four voltage rails. Each comparator has a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails. The ADM1184 functional truth table is shown in Table 5. Note that the functional operation described in Table 5 applies to the operation both before and after the assertion of PWRGD. Typically, the threshold voltage at each of the four adjustable inputs (that is, VIN1, VIN2, VIN3, and VIN4) is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor divider network to the circuit as depicted in Figure 17. Table 5. Functional Truth Table V 3.3V 2.9V t 4.6kΩ 2.9V SUPPLY GIVES 0.6V AT VIN1 PIN ADM1184 VIN1 1.2kΩ 0.6V TO LOGIC CORE 07352-017 0V The ADM1184 has four open-drain, active high outputs. Of these outputs, OUT1 to OUT3 can be used to enable power supplies, and PWRGD is a common power-good output. Output OUT1 to Output OUT3 are dependent on their associated input (that is, VIN1, VIN2, or VIN3). Before the voltage on a VINx input reaches 0.6 V, the corresponding output is switched to ground if there is 1 V on the VCC pin of the ADM1184. When VINx detects 0.6 V, OUTx is asserted after a 30 μs (typical) delay. VCC ADM1184 VIN1 OUTPUT CONFIGURATION Figure 17. Setting the Undervoltage Threshold In this example, the VIN1 pin monitors a 3.3 V supply. An external resistor divider scales this voltage down for monitoring at the VIN1 pin. The resistor ratio is chosen so that the VIN1 voltage is 0.6 V when the main voltage rises to the preferred level at startup (a voltage below the nominal 3.3 V level). R1 is 4.6 kΩ and R2 is 1.2 kΩ; therefore, a voltage level of 2.9 V corresponds to 0.6 V on the noninverting input of the first comparator (see Figure 17). VIN1 01 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 2 VIN2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VIN3 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VIN4 0 12 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUT1 Low Low Low Low Low Low Low Low High High High High High High High High OUT2 Low Low Low Low High High High High Low Low Low Low High High High High OUT3 Low Low High High Low Low High High Low Low High High Low Low High High PWRGD Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low High <VTH = 0. >VTH = 1. Figure 18 and Figure 19 show waveforms that illustrate the behavior of the ADM1184. Rev. 0 | Page 9 of 12 ADM1184 VTH ALL INPUTS, VINx 30µs OUT1 OUT2 07352-018 OUT3 190ms PWRGD Figure 18. Power-Up Waveforms VIN1/VIN2/VIN3 VTH 30µs 30µs VIN4 VTH OUT1/OUT2/OUT3 30µs PWRGD 190ms 190ms Figure 19. Waveforms Showing Reaction to a Temporary Low Glitch on VIN1, VIN2, VIN3, or VIN4 Rev. 0 | Page 10 of 12 07352-019 30µs ADM1184 VOLTAGE MONITORING AND SEQUENCING APPLICATION 3.3V IN VCC IN REGULATOR 1 ADM1184 VIN1 OUT1 VIN2 OUT2 VIN3 OUT3 EN IN REGULATOR 2 EN VIN4 GND 2.5V OUT OUT GND PWRGD 1.8V OUT OUT GND IN REGULATOR 3 EN POWER GOOD OUT GND 1.2V OUT 07352-020 2.5V OUT 1.8V OUT 1.2V OUT Figure 20. Voltage-Monitoring and Sequencing Application Diagram Figure 20 depicts an application in which the ADM1184 monitors four separate voltage rails, turns on three regulators in a sequence, and generates a power-good signal to turn on a controller when all power supplies are up and stable. The main supply, in this case 3.3 V, powers up the device via the VCC pin. The VIN1 pin monitors the main 3.3 V supply. In this example application, OUT1 is connected to the enable pin of a regulator. Before the voltage on VIN1 reaches 0.6 V, this output is switched to ground, disabling Regulator 1. The 2.5 V output of this regulator begins to rise and is detected by input Pin VIN2. When VIN2 detects the 2.5 V rail rising above its voltage threshold point, it asserts OUT2, which turns on Regulator 2. The same scheme is implemented with the other input and output pins. Every rail that is turned on via an output pin, OUTx, is monitored via an input pin, VIN(x + 1). When all four monitored supplies are above their programmed threshold levels PWRGD asserts after a 190 ms (typical) delay. When the main system voltage reaches 2.9 V, VIN1 detects 0.6 V. This causes OUT1 to assert, which drives the enable pin of Regulator 1 high, thus turning on its output. Rev. 0 | Page 11 of 12 ADM1184 OUTLINE DIMENSIONS 3.10 3.00 2.90 10 3.10 3.00 2.90 1 6 5 5.15 4.90 4.65 PIN 1 0.50 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.05 0.33 0.17 SEATING PLANE 0.23 0.08 8° 0° 0.80 0.60 0.40 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 21. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters ORDERING GUIDE Model ADM1184ARMZ 1 ADM1184ARMZ-REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] Z = RoHS Compliant Part. ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07352-0-2/08(0) Rev. 0 | Page 12 of 12 Package Option RM-10 RM-10 Branding MB0 MB0