Quad Voltage Monitor and Sequencer ADM1185 FEATURES FUNCTIONAL BLOCK DIAGRAM VCC Powered from 2.7 V to 5.5 V on the VCC pin Monitors 4 supplies via 0.8% accurate comparators Logical core with internal timeouts provides power supply sequencing and fault protection 4 inputs can be programmed to monitor different voltage levels with resistor dividers 3 open-drain enable outputs Open-drain power-good output (PWRGD) 10-lead MSOP VIN1 APPLICATIONS VIN3 ADM1185 POWER AND REF = 0.6V REFERENCE GENERATOR OUT1 REF = 0.6V OUT2 VIN2 REF = 0.6V STATE MACHINE CORE OUT3 REF = 0.6V Monitor and alarm functions Power supply sequencing Telecommunication and data communication equipment PC/servers PWRGD VIN4 REF = 0.6V 06196-001 GND Figure 1. GENERAL DESCRIPTION The ADM1185 is an integrated, four-channel, voltage monitoring and sequencing device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device. Internal time delays can be used for sequencing the startup of subsequent power supplies enabled by the outputs. Supplies falling out of range are also detected and, as a result, appropriate outputs are disabled. Four precision comparators monitor four voltage rails. All comparators have a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails. The ADM1185 has four open-drain outputs. In a typical configuration, OUT1 to OUT3 are used to enable power supplies, while PWRGD is a common power-good output indicating the status of all monitored supplies. A digital core interprets the status of the comparator outputs. The ADM1185 is available in a 10-lead mini small outline package (MSOP). APPLICATIONS DIAGRAM 3.3V IN VCC ADM1185 VIN1 OUT1 VIN2 OUT2 VIN3 OUT3 IN REGULATOR1 EN IN REGULATOR2 EN VIN4 GND 2.5V OUT OUT GND PWRGD 1.8V OUT OUT GND IN REGULATOR3 EN POWER GOOD OUT GND 1.2V OUT 06196-002 2.5V OUT 1.8V OUT 1.2V OUT Figure 2. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. ADM1185 TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................5 Applications....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................9 General Description ......................................................................... 1 Power-On Sequencing and Monitoring .....................................9 Applications Diagram ...................................................................... 1 Voltage Monitoring after Power-On ........................................ 10 Revision History ............................................................................... 2 Cascading Multiple Devices...................................................... 12 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 13 Absolute Maximum Ratings............................................................ 4 Ordering Guide .......................................................................... 13 ESD Caution.................................................................................. 4 REVISION HISTORY 3/07—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADM1185 SPECIFICATIONS VCC = 2.7 V to 5.5 V, TA = −40°C to +85°C. Table 1. Parameter VCC Pin Operating Voltage Range, VCC Supply Current, IVCC VIN1 to VIN4 (VINx) Pins Input Current, IVINLEAK Input Rising Threshold, VTHR OUT1 to OUT3 (OUTx), PWRGD Pins Output Low Voltage, VOUTL Leakage Current, IALERT VCC that Guarantees Valid Outputs Min Typ Max Unit 2.7 3.3 24 5.5 80 V μA +20 0.6048 nA V VVINx = 0.7 V 0.6000 0.4 0.4 +1 V V μA V VCC = 2.7 V, ISINK = 2 mA VCC = 1 V, ISINK =100 μA −20 0.5952 −1 1 ms ms All outputs are guaranteed to be either low or giving a valid output level from VCC = 1 V Delays only applicable to certain operations states; refer to state diagram (Figure 19) for more details VCC = 3.3 V, see Figure 7 VCC = 3.3 V, see Figure 7 μs μs VCC = 3.3 V, see Figure 9 VCC = 3.3 V, see Figure 10 TIMING DELAYS VIN1 to OUT1 Rising Delay VIN4 to PWRGD Rising Delay VIN2 to OUT2, VIN3 to OUT3 Low-to-High Propagation Delay High-to-Low Propagation Delay, All Inputs 100 100 190 190 280 280 30 30 Rev. 0 | Page 3 of 16 Conditions ADM1185 ABSOLUTE MAXIMUM RATINGS Ambient temperature = 25°C, unless otherwise noted. Table 3. Thermal Resistance Table 2. Parameter VCC Pin VINx Pins OUTx, PWRGD Pins Storage Temperature Range Operating Temperature Range Lead Temperature Soldering (10 sec) Junction Temperature Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to +6 V −65°C to +125°C −40°C to +85°C 300°C 150°C Package Type 10-Lead MSOP ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 16 θJA 137.5 Unit °C/W ADM1185 GND 1 VIN1 2 VIN2 3 VIN3 4 10 VCC ADM1185 9 OUT1 TOP VIEW (Not to Scale) 8 OUT2 7 OUT3 6 PWRGD VIN4 5 06196-003 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Table 4. Pin Function Descriptions Pin No. 1 2 Mnemonic GND VIN1 3 VIN2 4 VIN3 5 VIN4 6 PWRGD 7 OUT3 8 OUT2 9 OUT1 10 VCC Description Chip Ground Pin. Noninverting Input of Comparator 1. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core. This input can also be driven by a logic signal to initiate a power-up sequence. Noninverting Input of Comparator 2. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core. Noninverting Input of Comparator 3. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core. Noninverting Input of Comparator 4. The voltage on this pin is compared with a 0.6 V reference. Can be used to monitor a voltage rail via a resistor divider. The output of this comparator is monitored by the state machine core. Active-High, Open-Drain Output. This output is pulled low once VCC = 1 V. When the voltage on each VINx input exceeds 0.6 V, the state machine moves from STATE4 to STATE5, and PWRGD is asserted. Once in State 5 (the PWRGD state), this output is driven low if the voltage on VIN1, VIN2, VIN3, or VIN4 falls below 0.6 V. Active-High, Open-Drain Output. This output is pulled low once VCC = 1 V. When the voltage on VIN3 exceeds 0.6 V, the state machine moves from STATE3 to STATE4, and OUT3 is asserted. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V. Active-High, Open-Drain Output. This output is pulled low once VCC = 1 V. When the voltage on VIN2 exceeds 0.6 V, the state machine moves from STATE2 to STATE3, and OUT2 is asserted. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V. Active-High, Open-Drain Output. This output is pulled low once VCC = 1 V. When the voltage on VIN1 exceeds 0.6 V, the state machine moves from STATE1 to STATE2, and OUT1 is asserted. A time delay of 190 ms (typical) is included before the assertion of this pin. Once the power-up sequence is complete and STATE5 (the PWRGD state) is reached, this output is driven low if the voltage on VIN1 falls below 0.6 V. Positive Supply Input Pin. The operating supply voltage range is 2.7 V to 5.5 V. Rev. 0 | Page 5 of 16 ADM1185 TYPICAL PERFORMANCE CHARACTERISTICS 50 280 100mV OVERDRIVE 45 260 240 35 30 DELAY (ms) SUPPLY CURRENT (µA) 40 25 20 VIN4 TO PWRGD DELAY 220 200 VIN1 TO OUT1 DELAY 180 15 160 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 120 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VOLTAGE (V) Figure 7. VIN1/VIN4 to OUT1/PWRGD Rising Delay vs. Supply Voltage 50 50 45 45 40 40 35 30 VIN3 TO OUT3 DELAY DELAY (µs) VCC = 3.3V 25 20 VCC = 2.7V 15 30 25 15 10 5 5 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) 0 –40 –30 –20 –10 50 VCC = 3.3V, 100mV OVERDRIVE 20 30 40 50 60 70 80 90 100mV OVERDRIVE 45 260 40 240 DELAY (µs) 35 DELAY (ms) 10 Figure 8. VIN2/VIN3 to OUT2/OUT3 Rising Delay vs. Temperature 280 VIN4 TO PWRGD DELAY 200 180 0 TEMPERATURE (°C) Figure 5. Supply Current vs. Temperature 220 VIN2 TO OUT2 DELAY 20 10 0 –40 –30 –20 –10 VCC = 3.3V, 100mV OVERDRIVE 35 VCC = 5V 06196-005 SUPPLY CURRENT (µA) Figure 4. Supply Current vs. Supply Voltage 06196-013 0 06196-004 0 06196-012 140 5 VIN1 TO OUT1 DELAY VIN3 TO OUT3 DELAY 30 25 VIN2 TO OUT2 DELAY 20 15 160 10 140 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) Figure 6. VIN1/VIN4 to OUT1/PWRGD Rising Delay vs. Temperature 0 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VOLTAGE (V) Figure 9. VIN2/VIN3 to OUT2/OUT3 Rising Delay vs. Supply Voltage Rev. 0 | Page 6 of 16 06196-014 5 06196-011 120 –40 –30 –20 –10 ADM1185 60 180 50 DELAY (µs) 40 30 20 0 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VOLTAGE (V) Figure 10. VIN1 to OUT1 Falling Delay vs. Supply Voltage (100 mV Overdrive) 140 120 100 80 60 40 20 0 06196-016 10 160 0 10 20 30 40 50 60 70 80 90 100 OVERDRIVE (mV) 06196-007 MAXIMUM TRANSIENT DURATION (µs) 100mV OVERDRIVE Figure 13. Trip Threshold Maximum Transient Duration vs. Input Overdrive 50 200 VCC = 3.3V, 100mV OVERDRIVE APPLICABLE ONLY TO CHANNEL 2 AND CHANNEL 3 180 40 160 30 DELAY (µs) DELAY (µs) 140 20 120 100 80 60 10 40 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (°C) 0 06196-015 0 –40 –30 –20 –10 0 20 30 40 50 60 70 80 90 100 OVERDRIVE (mV) Figure 11. VINx to Output Falling Delay vs. Temperature Figure 14. Propagation Delay vs. Input Overdrive 0.610 400 0.608 350 OUTPUT LOW VOLTAGE (mV) 0.606 0.604 0.602 0.600 0.598 0.596 0.594 300 250 200 150 100 0.590 –40 –30 –20 –10 0 10 20 30 40 50 60 70 TEMPERATURE (°C) 80 90 Figure 12. VINx Trip Threshold vs. Temperature 0 0 2 4 6 8 10 12 14 16 18 20 22 OUTPUT SINK CURRENT (mA) Figure 15. Output Low Voltage vs. Output Sink Current Rev. 0 | Page 7 of 16 24 06196-018 50 0.592 06196-006 VINx TRIP THRESHOLD (V) 10 06196-017 20 ADM1185 100 80 70 60 50 40 1mA SINK 30 20 10 0 1.0 100µA SINK 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 06196-019 OUTPUT LOW VOLTAGE (mV) 90 Figure 16. Output Low Voltage vs. Supply Voltage Rev. 0 | Page 8 of 16 ADM1185 THEORY OF OPERATION The operation of the ADM1185 is explained in this section in the context of the device in a voltage monitoring and sequencing application (see Figure 18). In this application, the ADM1185 monitors four separate voltage rails, turns on three regulators in a predefined sequence, and generates a power-good signal to turn on a controller when all power supplies are up and stable. POWER-ON SEQUENCING AND MONITORING The main supply, in this case 3.3 V, powers up the device via the VCC pin as the voltage rises. A supply voltage of 2.7 V to 5.5 V is needed to power the device. The VIN1 pin monitors the main 3.3 V supply. An external resistor divider scales this voltage down for monitoring at the VIN1 pin. The resistor ratio is chosen so that the VIN1 voltage is 0.6 V when the main voltage rises to the preferred level at startup (a voltage below the nominal 3.3 V level). R1 is 4.6 kΩ and R2 is 1.2 kΩ, so a voltage level of 2.9 V corresponds to 0.6 V on the noninverting input of the first comparator (see Figure 17). V OUT1 is an open-drain active high output. In this application, OUT1 is connected to the enable pin of a regulator. Before the voltage on VIN1 has reached 0.6 V, this output is switched to ground, disabling Regulator 1. Note that all outputs are driven to ground as long as there is 1 V on the VCC pin of the ADM1185. When the main system voltage reaches 2.9 V, VIN1 detects 0.6 V. This causes OUT1 to assert after a 190 ms (typical) delay. When this occurs, the open-drain output switches high, and the external pull-up resistor pulls the voltage on the Regulator 1 enable pin above its turn-on threshold, turning on the output of Regulator 1. The assertion of OUT1 turns on Regulator 1. The 2.5 V output of this regulator begins to rise. This is detected by input VIN2 (with a similar resistor divider scheme as shown in Figure 18). When VIN2 detects the 2.5 V rail rising above its UV point, it asserts output OUT2, which turns on Regulator 2. A capacitor can be placed on the VIN2 pin to slow the rise of the voltage on this pin. This effectively sets a time delay between the 2.5 V rail powering up and the next enabled regulator. The same scheme is implemented with the other input and output pins. Every rail that is turned on via an output pin, OUTx, is monitored via an input pin VIN(x+1). 3.3V 2.9V The final comparator inside the VIN4 pin detects the final supply turning on, which is 1.2 V in this case. The output pins, OUT1 to OUT3 are logically AND’ed together to generate a system power-good signal (PWRGD). There is an internal 190 ms delay (typical) associated with the assertion of the PWRGD output. t 4.6kΩ 2.9V SUPPLY GIVES 0.6V AT VIN1 PIN ADM1185 VIN1 1.2kΩ TO LOGIC CORE 0.6V 06196-020 0V Table 5 is a truth table that steps through the power-on sequence of the outputs. Any associated internal time delays are also shown. Figure 17. Setting the Undervoltage Threshold with an External Resistor Divider 3.3V IN VCC IN REGULATOR1 ADM1185 VIN1 OUT1 VIN2 OUT2 VIN3 OUT3 EN IN REGULATOR2 EN VIN4 GND 2.5V OUT OUT GND 1.8V OUT OUT GND PWRGD IN REGULATOR3 EN POWER GOOD OUT GND 1.2V OUT 06196-021 2.5V OUT 1.8V OUT 1.2V OUT Figure 18. Voltage Monitoring and Sequencing Application Diagram Table 5. Truth Table State 1 2 3 4 5 State Name Reset OUT1 On OUT1, OUT2 On OUT1, OUT2, OUT3 On Power Good OUT1 0 1 1 1 1 OUT2 0 0 1 1 1 OUT3 0 0 0 1 1 OUT4 0 0 0 0 1 Next Event VIN1 high for 190 ms VIN1 and VIN2 high for 30 μs VIN1 and VIN3 high for 30 μs All high for 190 ms VIN2 , VIN3, or VIN4 low for 30 μs Rev. 0 | Page 9 of 16 Next State OUT1 On OUT1, OUT2 On OUT1, OUT2, OUT3 On Power Good OUT1, OUT2, OUT3 On ADM1185 VOLTAGE MONITORING AFTER POWER-ON Once PWRGD is asserted, the logical core latches into a different mode of operation. During the initial power-up phase, each output directly depends on an input (for example, VIN3 asserting causes OUT3 to assert). When power-up is complete, this function is redundant. STATE1 VIN1 = OK (DELAY = 190ms TYP) STATE2 Once in the PWRGD state, the following behavior can be observed: • VIN1 = FAULT If the main 3.3 V supply monitored via VIN1 faults in the power-good state, the PWRGD output is deasserted to warn the downstream controller. All outputs (OUT1 to OUT3) are immediately turned off, disabling all locally generated supplies. If a supply monitored by VIN2 to VIN4 fails, the PWRGD output is deasserted to warn the controller, but the other outputs are not deasserted. VIN2 = OK STATE3 VIN1 = FAULT VIN1 = FAULT OUT1, OUT2, OUT3 ON VIN4 = OK (DELAY = 100ms MIN) STATE5 VIN1 = FAULT OUT1, OUT2 ON VIN3 = OK STATE4 Figure 20 and Figure 21 are waveforms that highlight the behavior of the ADM1185 under various fault situations during normal operation (that is, in the mode of operation after PWRGD is asserted). OUT1 ON PWRGD VIN2. VIN3. VIN4 = FAULT 06196-022 • START Figure 19. Flow Diagram Highlighting the Different Modes of Operation of the Logical Core Rev. 0 | Page 10 of 16 ADM1185 VT (RISING) VT (RISING) VIN1 VT (FALLING) = 0.6V VIN1 tPROP tPROP OUT1 tPROP 190ms 190ms OUT2 OUT2 OUT3 OUT3 PWRGD PWRGD 190ms 190ms NOTES 1. THE RISING THRESHOLD ON THE VIN1 TO VIN4 PINS IS SLIGHTLY HIGHER THAN 0.6V AS THERE IS HYSTERESIS ON THIS PIN. 06196-023 NOTES 1. THE RISING THRESHOLD ON THE VIN1 TO VIN4 PINS IS SLIGHTLY HIGHER THAN 0.6V AS THERE IS HYSTERESIS ON THIS PIN. Figure 21. Waveforms Showing Reaction to a Temporary Low Glitch on the Main Supply Figure 20. Power-Up Waveforms OUT1 1 OUT2 2 OUT3 3 PWRGD CH1 1.00V CH3 1.00V CH2 1.00V CH4 1.00V M50.0ms CH1 380mV 06196-029 4 Figure 22. Plot of OUT1, OUT2, OUT3, and PWRGD Outputs at Startup in an Application Similar to that Shown in Figure 18 Rev. 0 | Page 11 of 16 06196-024 OUT1 ADM1185 CASCADING MULTIPLE DEVICES Multiple ADM1185 devices can be cascaded in situations where a large number of supplies must be monitored and/or sequenced. There are numerous configurations for interconnecting devices. The most suitable configuration depends on the application. Figure 23 and Figure 24 show two methods for cascading multiple ADM1185 devices. 3.3V 3.3V VCC ADM1185-A SUPPLIES SCALED DOWN WITH RESISTOR DIVIDERS 3.3V VIN1 V1 VIN2 V2 VIN3 V3 VIN4 OUT1 REGULATOR1 EN1 EN2 OUT2 REGULATOR3 EN3 OUT3 GND V1 REGULATOR2 V2 V3 PWRGD 3.3V VCC ADM1185-B VIN1 V4 VIN2 V5 VIN3 V6 VIN4 REGULATOR4 EN4 EN5 OUT2 REGULATOR6 EN6 OUT3 GND V4 REGULATOR5 V5 V6 PWRGD POWER GOOD 06196-026 SUPPLIES SCALED DOWN WITH RESISTOR DIVIDERS OUT1 Figure 23. Cascading Multiple ADM1185 Devices, Option 1 3.3V 3.3V VCC ADM1185-A SUPPLIES SCALED DOWN WITH RESISTOR DIVIDERS 3.3V VIN1 V1 VIN2 V2 VIN3 3.3V VIN4 GND OUT1 REGULATOR1 EN1 V1 REGULATOR2 EN2 OUT2 REGULATOR3 EN3 OUT3 V2 V3 PWRGD 3.3V VCC ADM1185-B VIN1 V4 VIN2 V5 VIN3 V6 VIN4 GND OUT1 OUT2 REGULATOR4 EN4 V4 REGULATOR5 EN5 OUT3 REGULATOR6 EN6 V5 V6 PWRGD POWER GOOD Figure 24. Cascading Multiple ADM1185 Devices, Option 2 Rev. 0 | Page 12 of 16 06196-027 SUPPLIES SCALED DOWN WITH RESISTOR DIVIDERS V3 ADM1185 OUTLINE DIMENSIONS 3.10 3.00 2.90 10 3.10 3.00 2.90 1 6 5 5.15 4.90 4.65 PIN 1 0.50 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.05 0.33 0.17 SEATING PLANE 0.23 0.08 8° 0° 0.80 0.60 0.40 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 25. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters ORDERING GUIDE Model ADM1185ARMZ-1 1 ADM1185ARMZ-1REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 10-Lead Mini Small Outline Package [MSOP] 10-Lead Mini Small Outline Package [MSOP] Z = RoHS compliant part. Rev. 0 | Page 13 of 16 Package Option RM-10 RM-10 Branding M9W M9W ADM1185 NOTES Rev. 0 | Page 14 of 16 ADM1185 NOTES Rev. 0 | Page 15 of 16 ADM1185 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06196-0-3/07(0) Rev. 0 | Page 16 of 16