BCM8129 ® MULTIRATE 10-GBPS SONET/SDH/10GE/FEC DEMUX SUMMARY OF BENEFITS FEATURES • 10-Gigabit MSA (Multi-Source Agreement) compliant • Fully integrated CDR and demultiplexer with limiting amplifier 1:16 DEMUX with LVDS data outputs Phase adjustment (Typical 35 ps range with 2.5ps granularity) Decision Threshold Level adjustment Serial data polarity invert Bit order reversal Lock detect Telcordia, ITU-T, ANSI, and IEEE 802.3ae industry standards. • Reduces design cycle and time to market. • High level of integration allows for higher port density solutions. • Uses the most effective silicon economy of scale for CMOSbased devices. • Low-power consumption eliminates the need for external cooling sources. Exceeds SONET jitter requirements APPLICATIONS Core power supply: 1.8V I/O power supply: CML and LVDS at 1.8V, CMOS at 1.8V or 3.3V • Power consumption: 950 mW • Standard CMOS fabrication process • 143-pin BGA package available in standard and Pb-free version • • • • • • • • OC-192/STM-64/10GE transmission equipment SONET/SDH optical modules ADD/DROP multiplexers Digital cross-connects ATM switch backbones SONET test equipment Terabit routers Edge routers Network Interface Processor BCM8129 Functional Block Diagram BCM8128 ORX ORX BCM8129 10-Gb Serial Data BCM8129 XSBI (16-Bits) Parallel Data ORX ORX BCM8128 Network Interface Processor • • • • • • • • • • Compliant with Optical Internetworking Forum (OIF), XSBI (16-Bits) Parallel Data OVERVIEW RB_LD TH_LOS0/1/2 RB_SLOS LOS DETECT LOSB POLSEL RxDOUT0P OUTPUT REGISTER RDINP CML 10 G Serial Input 1:16 DEMUX RDINN RB_OFFSETP/N ENB_OFFSET RxDOUT0N LVDS 16-Bit XSBI Output RxDOUT15P RxDOUT15N LSBSEL RxPOCLKP RxREFCLKP Divide-by-16 Divide by 16 or 64 LVPECL Reference Clock Divide by 16 LVDS Clock Output RxPOCLKN RxREFCLKN RxRATESEL0/1 CDR RxMUTEDOUT RxMCLKP VCP VCN Divide by 16 or 64 LVDS Clock Output Divide-by-4 RxLCKREF RxMCLKN RxREFSEL RxMUTEPOCLK RxMUTEMCLK RxLOCKERR RxPHSADJ0/1/2 The BCM8129 is a fully integrated MSA-compliant quad-rate SONET/ SDH/10GE receiver operating at OC-192 (9.953 Gbps), 10GE (10.3125 Gbps), 10GFC (10.315 Gbps), and different FEC (Forward Error Correction) data rates (10.664/10.709, 11.096, or 11.31 Gbps) with deserializer, clock and data recovery (CDR), loss-of-signal (LOS) detection circuitry and advanced feature set. The BCM8129 provides high-jitter tolerance and low-jitter generation to comply with Optical Internetworking Forum (OIF), IEEE 802.3ae, Telcordia, ANSI, and ITU-T standards. The BCM8129 reference clock input frequency is user-selectable to the line rate divided by either 16 or 64. The reference clock output and the LVDS receive parallel bus output can be squelched under user control. The BCM8129 can be powered with a single 1.8V supply or dual 1.8/ 3.3V supply without any special power supply sequencing requirements. The BCM8129 comes in a 15 x 15 mm, 143-pin BGA package. Broadcom®, the pulse logo, Connecting everything®, and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners. ® BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013 © 2006 by BROADCOM CORPORATION. All rights reserved. 8129-PB03-R 02/06/06 Phone: 949-450-8700 Fax: 949-450-8710 E-mail: [email protected] Web: www.broadcom.com