Eval Board

IS31PW8200 Multi-Function I/O Driver Evaluation Board Guide
DESCRIPTION
RECOMMENDED EQUIPMENT
The IS31PW8200 is a highly integrated IC to serve as
the control logic for a system with multiple power
sources. It integrates a mini-charger’s path power
MOS with a switchable bulk and saves the external
diode in mini-charger path. Also, it directly drives the
internal P-channel MOSFETs to select the power path
for the system and manages dual battery sources for
charge and discharge. The power path selection is
made based on the present voltage of the power
sources and the state of charge of the batteries.
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

FEATURES
PROCEDURE



The IS31PW8200 evaluation board is fully assembled
and tested. Follow the steps listed below to verify
board operation.




2.4V to 5.5V supply voltage
I2C interface
Complete power path management for dual
battery systems
Dual battery status monitor
Integrated charger path switches
Hardware reset function
QFN-20 (3mm × 3mm) package
ABSOLUTE MAXIMUM RATINGS

≤ 5.5V power supply
Caution: Do not exceed the conditions listed above, otherwise
the board will be damaged.
Caution: Do not turn on the power supply until all connections
are completed.
1)
2)
QUICK START
3)
4)
5)
6)
Figure 1: Photo of IS31PW8200 Evaluation Board
3V~5.5V, 2A power supply
2 Batteries
5V Charger
7)
8)
Please charge the batteries A and B both full
before test.
Connect the anode of Battery A to BATA terminal
and the anode of Battery B to BATB terminal.
Connect the power supply ground, PCB ground to
GND terminal and connect VBAT terminal to the
anode of power supply.
Connect the BAT_ID between IS31PW8200 and
corresponding Battery A/B. Ensure the BAT_ID of
batteries is low level. (There is a 10kΩ resistor
connect BAT_ID to GND)
INTB is an interrupt signal output port which
shows the state of batteries. The MCU should
provide interrupt port and connect a 10kΩ resistor
to VDD.
The SCL line is uni-directional. The SDA line is
bi-directional (open-collector) with a pull-up
resistor (typically 4.7kΩ).
When Close=Reset, the IC enters into hardware
reset mode. In this mode batteries will disconnect
to VBAT.
AD0 and AD1 are the slave address. When
AD1/AD0 connects to VDD, AD1/AD0=1; when
AD1/AD0 connect to GND, AD1/AD0=0. It can be
configured by the jumper JP1 and JP2.
Connect the corresponding anode of adapter to
AC terminal and cathode to GND if charging
batteries by the internal charger of IS31PW8200.
ORDERING INFORMATION
Part No.
Temperature Range
Package
IS31PW8200-QFLS2-EB
-40°C to +85°C
QFN-20, Lead-free
Table1: Ordering Information
For pricing, delivery, and ordering information, please contacts ISSI’s analog marketing team at
[email protected] or (408) 969-6600.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. A, 05/05/2014
1
IS31PW8200 Multi-Function I/O Driver Evaluation Board Guide
SOFTWARE SUPPORT
Please refer to the datasheet to get more information
about IS31PW8200.
U1
VCC
4
C3
1uF
12
VCC
AC
GND
SEL
VCC
VBAT
R2
4.7K
INTB
R1
4.7K
2
16
17
SDA
SCL
INTB
AD0
14
TP10
INTB
SDA
BATA
BATA
TP6
5,7
C5
10uF
SCL
VCC JP1
TP12
AD0
BATA_ID
BATA_ID
TP7
20
R5
100K
VCC JP2
TP11
2
1
AD1
AD0
AD1
15
19
TP1
C1
10uF
TP2
VBAT
TP9
8,9
C6
10uF
18
SCL
AC
C2
0.1uF
R3
4.7K
SDA
3
2
1
3,13
TP13
BATB
BATB
TP3
10,11
AD1
TP8
C4
10uF
RSTB
BATB_ID
JP3
Close=Reset
BATB_ID
TP4
1
R4
100K
IS31PW8200
TP5
Figure 2: IS31PW8200 Application Schematic
BILL OF MATERIALS
Name
Symbol
Power IC
U1
Resistors
Description
Qty
Supplier
Part No.
Power Manage
1
ISSI
IS31PW8200
R1,R2,R3
RES,4.7k,1/16W,±5%,SMD
3
Resistors
R4,R5
RES,100k,1/16W,±5%,SMD
2
Capacitors
C1,C4,C5,C6
CAP, 10µF,16V,±20%,SMD
4
Capacitor
C2
CAP, 0.1µF,16V,±20%,SMD
1
Capacitor
C3
CAP,1µF,16V,±20%,SMD
1
Table 2: Bill of Materials, refer to Figure 2 above
Integrated Silicon Solution, Inc. – www.issi.com
Rev. A, 05/05/2014
2
IS31PW8200 Multi-Function I/O Driver Evaluation Board Guide
0
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3
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0
Figure 3: Board Component Placement Guide -Top Layer
Figure 4: Board PCB Layout- Top Layer
Integrated Silicon Solution, Inc. – www.issi.com
Rev. A, 05/05/2014
3
IS31PW8200 Multi-Function I/O Driver Evaluation Board Guide
0
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Figure 5: Board Component Placement Guide -Bottom Layer
Figure 6: Board PCB Layout-Bottom Layer
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its
products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services
described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information
and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction
of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness.
Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction,
that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev. A, 05/05/2014
4