LF3370 Application Note DEVICES INCORPORATED YCbCr to RGB 10-Bit Multiplexed [4:2:2] CCIR-601 YcbCr to Full Range 10-Bit RGB [Input Cb/Cr Interleaved onto One Channel Overview The LF3370 Format Converter is a High Performance Video Processing Engine that has been designed to perform a variety of Format Conversions. The following discussion is meant to give clear and precise guidance in order to configure the LF3370 to perform a YCbCr to RGB format conversion. The LF3370 performs this conversion by employing the use of input bias (offset) adders, Halfband Decimation Filters, and a Matrix Multiplier function, as seen in Figure 1 of the datasheet. The Input De-Multiplexer first separates the interleaved Cb/Cr input data into 2 unique Cb and Cr channels and passes them to the Input Offset (bias) adders B and C respectively. The offset contained in the de-multiplexed YCbCr input data is then removed by the Input Bias Adders. After this, the Cb’ and Cr’ words are fed into the Halfband Interpolator Filters, whereby their resulting data rate is doubled. The Y’ channel data rate does not need to be altered, it simply passes through a programmable delay that is matched to the latency of the Halfband Filters. The Matrix Multiplier takes the intermediate Y’, Cb’, and Cr’ channels and mixes them with the coefficients. RGB data emerges at its output. Input/Output Formats Table 1 outlines the Input and Output formats and their inclusive ranges for this application. (Alternative Input/Output Word Size Applications Can be Derived From This Application Note) Table 1 Color Space Y Cb Cr Y’ (internal) Cb’ (internal) Cr’ (internal) RGB Input Data Word Alignment Range 64-940 64-960 64-960 0-876 +-448 +-448 0-1023 Format Unsigned Unsigned Unsigned Unsigned Signed Signed Unsigned Word Size 10-Bits 10-Bits 10-Bits 10-Bits 10-Bits 10-Bits 10-Bits The 10-bit Y, Cb, and Cr input words should be aligned on the A, B, and C input ports respectively, in a manner that preserves their non-signed format. Table 2 illustrates the suggested alignment of the Y input channel. The same alignment is true for the Cb and Cr input words. Table 2 Input Pin A12 A11 A10 Input Data GND Y9 Y8 LOGIC Devices Incorporated A09 Y7 1 A08 A07 Y6 Y5 A06 A05 Y4 Y3 A04 Y2 A03 Y1 A02 A01 A00 Y0 GND GND 1/31/2001 AppNote 3370 A LF3370 Application Note DEVICES INCORPORATED YCbCr to RGB Input Cb/Cr De-Multiplexing The Input De-Multiplexer separates the alternating Cb/Cr input data on B12-0 into 2 unique Cb and Cr channels. The synchronous SYNCB pin synchronizes the interleaved Cb/Cr data with the LF3370. Figure 4 of the datasheet illustrates how SYNCB should be brought from HIGH to LOW on an input Cb sample and then held there - or SYNCB can toggle from HIGH to LOW on every Cb sample. This HIGH to LOW SYNCB event also initializes the Halfband Interpolation function. Input Offset Adjustment The LF3370 handles the offset removal in the conversion equations by using the ‘Input Bias’ adders. The input bias adder configuration and a detailed description of the loading method appear near the end of this document. Interpolation From 4:2:2 to 4:4:4 In this application, the LF3370 uses its 2 Halfband Filters to increase the data rate (Interpolate) the intermediate Cb’ and Cr’ data by 2. The input 4:2:2 data becomes 4:4:4 data. To this end, the ‘Functional Arrangement’ should be configured such that the Halfband Filter feeds data to the Matrix Multiplier (see Figure 1of the datasheet ). The bit weighting of the Halfband output and the configuration of the Round/Select/Limit circuit is illustrated in Table 4. A detailed description of the RSL loading method appears later in this document. Matrix Multiply At the heart of the Color-Space Conversion is the Matrix-Multiply calculation. The Multiplier coefficients depend on two variables: the range of the RGB output word and the range of the YCbCr input word. (Note: the removal of the 64 and 512 offsets indicated in these equations are accomplished in a separate ‘bias adder’ function near the input) The YcbCr to RGB Matrix-Multiply And Offset Equations are as follows: Y’ = Y - 64 Cb’ = Cb - 512 Cr’ = Cr - 512 R = (RGB Range /Y Range)(1Y’) + (RGB Range /Cr Range)(1.402Cr’) G = (RGB Range /Y Range)(1Y’) + (RGB Range /Cb Range)(-0.3441Cb’ - 0.714Cr’) B = (RGB Range /Cr Range) (1Y’) + (RGB Range /Cb Range)(1.772Cb’) Since the RGB Output Range is 1023 (1023-0), the Y Input Range is 876 (940-64), and the Cb/Cr Input Range is 896 (960-64), the equation for this application becomes: R = (1.1678Y’ + 0 + 1.6007Cr’) G = (1.1678Y’ - 0.3929Cb’ - 0.81532Cr’) B = (1.1678Y’+ 2.0232Cb’ + 0) The 13-bit coefficients, their bit weighting with respect to the Y’Cb’Cr’ data, and the configuration of the Round/Select/Limit circuit is illustrated in Table 4. A detailed description of the loading method appears later in this document. LOGIC Devices Incorporated 2 1/31/2001 AppNote 3370 A LF3370 Application Note DEVICES INCORPORATED YCbCr to RGB Gamma Correction Newly created RGB data is typically passed through the output Gamma correction stage. It is assumed that it is not needed in this application in order to reduce the size of this Application Note. Output Word Alignment Table 3 illustrates the alignment of the 10-bit Red output word on the W output port. (Please note that the same alignment is true for the Green and Blue output words on the X and Y output ports respectively) Table 3 Output Pin Output Data Configuration Register Loading W12 W11 W10 W09 W08 W07 W06 W05 W04 W03 W02 W01 W00 NC NC NC R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 The following tables refer to the addresses and data that need to be loaded into the LF interface in order to configure the part to perform this YcbCr to RGB Conversion. Loading the entire sequence of address and data words from these tables into the CF12-0 bus will achieve the desired configuration. (For more information on the LFinterface please refer to the LF3370 data sheet) Note: For this application we assume that the Blanking Feature, Core Bypass Feature and the Key Channel are not being used. (If these features are required, please refer to the LF3370 data sheet for their descriptions) Address/Data 0000 04AB 0000 0667 04AB 1E6E 1CBE 04AB 0817 0000 Description Matrix Coefficient Address 0 1.1678 = Bank 0 0 = Bank 1 1.6007 = Bank 2 1.1678 = Bank 3 -0.3929= Bank 4 -0.81532 = Bank 5 1.1678 = Bank 6 2.0232 = Bank 7 0 = Bank 8 Address/Data 0201 1000 Description Gamma LUT, Blanking, and Bias Enables Disable LUT, No Blanking, Enable Input Offset Address/Data 0200 00AE Description Input/Output Format and Functional Arrangement 2 Ch. In /3 Ch. Out, Halfband to Matrix, Interpolation LOGIC Devices Incorporated 3 1/31/2001 AppNote 3370 A LF3370 Application Note DEVICES INCORPORATED YCbCr to RGB Address/Data 0203 0021 Description Y Channel Filter Bypass Delay 35-2 = 33 Address/Data 0600 1F00 0700 1800 0800 1800 Description Input Bias For Y Channel Input Bias = -64 Input Bias For Cb Channel Input Bias = -512 Input Bias For Cr Channel Input Bias = -512 Address/Data 0E00 0008 0000 03FF 0000 Description Matrix RSL For Y Channel LSB Rounding Select Window = 0 Upper Limit = 1023 Lower Limit = 0 Address/Data 0F00 0008 0000 03FF 0000 Description Matrix RSL For Cb Channel LSB Rounding Select Window = 0 Upper Limit = 1023 Lower Limit = 0 Address/Data 1000 0008 0000 03FF 0000 Description Matrix RSL For Cr Channel LSB Rounding Select Window = 0 Upper Limit = 1023 Lower Limit = 0 Address/Data 1200 0020 0200 0700 1900 Description Halfband Filter RSL For Cb Channel LSB Rounding Select Window = 2 Upper Limit = +448 Lower Limit = -448 Address/Data 1300 0020 0200 0700 1900 Description Halfband Filter RSL For Cr Channel LSB Rounding Select Window = 2 Upper Limit = +448 Lower Limit = -448 LOGIC Devices Incorporated 4 1/31/2001 AppNote 3370 A LF3370 Application Note DEVICES INCORPORATED t YCbCr to RGB Table 4. 16 15 14 10 Bit YCbCR CCIR-601 to 10 Bit RGB Format Conversion 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -1 -2 A8 Y A7 Y A6 Y A5 Y A4 Y A3 Y A2 Y INPUT PINS A12 A11 A10 A9 0 Y Y Y A1 0 A0 0 INPUT PINS B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 0 CB CB CB CB CB CB CB CB CB CB 0 B0 0 INPUT PINS C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 0 CR CR CR CR CR CR CR CR CR CR 0 0 Y 1 Y 1 Y 0 Y 0 Y 0 -7 0 0 0 0 -64 1F0 INPUT BIAS B 0 1 CB CB CB CB CB CB CB CB CB CB 0 1 0 0 0 0 0 0 0 0 0 0 0 0 -51 180 INPUT BIAS C 0 1 CR CR CR CR CR CR CR CR CR CR 0 1 0 0 0 0 0 0 0 0 0 0 0 0 -51 180 MATRIX MULT INPUT WORDS Y’ Y’ Y’ Y’ Y’ Y’ Y’ Y’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ COEFFICIENT FORMAT Y 0 -6 Y 1 Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ 0 0 0 0 0 0 0 SEL Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ 1 1 1 0 0 0 0 0 0 1 0 0 0 0 Y 0 -5 0 1 R/G/B MATRIX OUTPUT R’ R’ R’ R’ R’ R 0 0 0 0 0 S R’ R’ UL 0 0 LL 0 0 Y 0 -4 INPUT BIAS A Cb’Cr’ HALFBAND OUTPUT Cb’ Cb’ Cb’ R 0 0 0 S Cb’ Cb’ UL 0 0 LL 1 1 Y 1 -3 -10 -11 -12 Y’ Cb’ Cb’ C12 Y’ Cb’ Cb’ C11 Y’ Cb’ Cb’ C10 Y’ Cb’ Cb’ C9 Y’ Cb’ Cb’ C8 C7 C6 C5 C4 C3 C2 C1 C0 R’ 0 SEL R’ 1 0 R’ 0 R’ 1 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 R’ 0 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 1 0 R’ 0 102 0 R’ 0 RND=00008 3FF 0 W12 W11 W10 W9 W8 W7 W6 W5 W4 W3 W2 W1 W0 NC NC NC R R R R R R R R R R R OUTPUT WORD OUTPUT PINS X12 X11 X10 X9 NC NC NC G X8 G X7 G X6 G X5 G X4 G X3 G X2 G X1 G X0 G G OUTPUT WORD OUTPUT PINS Y12 Y11 Y10 Y9 NC NC NC B Y8 B Y7 B Y6 B Y5 B Y4 B Y3 B Y2 B Y1 B Y0 B B OUTPUT WORD 5 -9 Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ Cb’ 0 0 0 0 1 0 0 0 0 0 RND=00020 Cb’ Cb’ Cb’ Cb’ 0 0 0 0 448 700 0 0 0 0 -44 19000 OUTPUT PINS LOGIC Devices Incorporated -8 1/31/2001 AppNote 3370 A