LSI/CSI UL ® LS7501-7510 LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (516) 271-0400 FAX (516) 271-0405 A3800 TONE ACTIVATED TELEPHONE LINE SWITCH CONTROLLERS FEATURES: DTO 1 TIME BASE Nov. 1993 16 V DD (+V) 2 15 X2 VF OUT 3 14 X1 VI OUT 4 13 DIGITAL TONE FDEN 5 12 AMP IN DTEN INPUT 6 11 AMP OUT SET RELAY PULSE 7 10 8 9 LSI • Circuit activated by Tone with specific Frequency and Time Duration. • Frequency and Time Duration values are mask programmable. • Small Signal (as low as - 30 DBM) and Digital Level Tone signals accommodated. • On-chip active oscillator network and 32,768 Hz Crystal generates timing. • Low power consumption. • +4.0V to +6V operation (VDD - VSS). CONNECTION DIAGRAM - TOP VIEW STANDARD 16 PIN PLASTIC DIP APPLICATIONS: • Remote telephone line testing • Remote meter reading • Security system dialers. GENERAL DESCRIPTION: The LS7501 - LS7510 are CMOS frequency discriminator circuits designed to respond to a specific frequency TONE signal when that frequency is maintained within +10Hz during a continuous 4.5 second Sample Interval Time. When a valid TONE occurs the Set Relay Level output goes high for 20 seconds. A typical application will use the Set Relay Level output to temporarily switch the telephone line connection. Valid Frequencies are mask programmable from 11Hz to 4095 Hz, in 1 Hz steps. Valid Sample Interval Times are mask-programmable from 0.5 seconds to 8.0 seconds, in 0.5 second steps. Table 1 shows mask programmable options for the available LS7501 - LS7510 part numbers. Table 1. MASK PROGRAMMED OPTIONS Part # LS7501 LS7502 LS7503 LS7504 LS7505 Frequency (Hz) 2683 2713 2743 2773 2833 Part # LS7506 LS7507 LS7508 LS7509 LS7510 Frequency (Hz) 2863 2893 2923 2953 2983 NOTE: All Part Numbers are programmed with a Sample Interval Time of 4.5 seconds. Referring to the LS75XX Block Diagram (Figure 2) each Part Number has the Set Relay Level option on Pin 8. The 32 KHz option is on Pin 2 with one exception. LS7502 has the 8Hz option. SET RELAY LEVEL RESET V SS (-V) FIGURE 1 CIRCUIT OPERATION: Referencing Figure 2, an external C is used to generate a Power-On Reset pulse at Pin 10. When the Frequency Discriminator samples a valid frequency at Pin 13 for an entire 0.5 second sample period, Pin 3 goes high and the Sample Interval Timer begins timing. If the Pin 13 frequency is not valid during any subsequent sample period, Pin 3 goes low and resets the Sample Interval Timer. When Pin 13 frequency is valid for the programmed period of the Sample Interval Timer, a high-going pulse occurs at Pin 4. Normally, Pin 4 externally connects to Pin 6 and the pulse will cause the Frequency Discriminator to be disabled, enable the Disconnect Timer and bring Set Relay Level high at Pin 8. When the Disconnect Timer times out (20 seconds) a highgoing pulseoccurs at Pin 1. Normally, Pin 1 externally connects to Pin 5 and the pulse will cause the Frequency Discriminator to be enabled, disable the Disconnect Timer and bring Set Relay Level low at Pin 8. The circuit operating sequence begins again. A digital level Tone signal connects to Pin 13. A small-signal Tone frequency should be AC coupled to Pin 12 with Pin 11 externally connected to Pin 13. The 32,768 Hz crystal connects between Pin 14 and Pin 15. Pin 10 has an internal pull-down resistor. INPUT/OUTPUT DESCRIPTION: Pin 1 (DTO) : A 500ms positive output pulse occurring when Disconnect Timer times out. Pin 2 (TIME BASE) : 32,768Hz or 8Hz pulses. (Maskprogrammable selection). Pin 3 (VF): A normally low output which goes high whena Valid Frequency is detected. Pin 8 (SET RELAY LEVEL) or (RESET RELAY PULSE): A normally low output which goes high when Pin 6 transitions high and goes low again when Pin 5 transitions high. IfRESET RELAY PULSE is mask programmed, this signal will be a 3.9 ms pulse occurring when Pin 5 transitions high. Pin 9 (VSS): Supply Voltage negative terminal. Pin 10 (RESET): A logic high applied to this pin will reset the circuit. This input has an internal pull-down resistor. Pin 4 (VI): A 125ms positive output pulse occurring when the Sample Interval Timer times out. Pin 11 (AMP OUT): Output of amplifier. Pin5 (FDEN): A high-going transition input will cause the Pin 12 (AMP IN): Input of amplifier. Frequency Discriminator to be enabled. Pin 13 (DIGITAL TONE): Digital level frequency input to the Pin 6 (DTEN ): A high-going transition input will cause Frequency Discriminator. theDisconnect Timer to be enabled. Pin 7 (SET RELAY PULSE ): A 3.9 ms positive output pulse occuring when Pin 6 transitions high. Pin 14 (X1): Input terminal of active oscillator network. Pin 15 (X2): Output terminal of active oscillator network. Pin 16 (VDD ): Supply Voltage positive terminal. ABSOLUTE MAXIMUM RATINGS: PARAMETER Voltage at any input Operating Temperature Storage Temperature SYMBOL VIN TA TSTG VALUE VSS-.5 to VDD+.5 -25 to +70 -65 to +150 UNIT Volts °C °C DC ELECTRICAL CHARACTERISTICS: (All voltages referenced to VSS, TA = -25°C to + 70°C) PARAMETER Supply Voltage Supply Current SYMBOL VDD IDD MIN 4.0 - MAX 6.0 30 UNIT V µA CONDITION VDD = +5.0V Input Voltage: (except AMP IN) High VIH 3.50 - V VDD = +5.0V Low VIL - 1.50 V VDD = +5.0V Output Current: (except AMP OUT) Source IOH 1000 - µA Vo = 0.7V, VDD = 5.0V µA Vo = 0.25V, VDD = 5.0V Sink IOL 500 NOTE: Reset input has internal pull-down resistor of about 100K ohms. AC ELECTRICAL CHARACTERISTICS: PARAMETER SYMBOL MAX UNIT AMP IN Sensitivity* A Is -20 * Amplifier Input is AC coupled from a 300Ω source impedance. Output Switching: (except AMP OUT) Rise time TR 500 DBM Fall time TF MIN - 125 CONDITION VDD = +5.0V ns VDD = +5.0V, CL = 50pF ns VDD = +5.0V, CL = 50pF * NOTE: MASK PROGRAMMABLE OPTION 3 VALID FREQUENCY * * FREQUENCY DISCRIMINATOR TONE 13 R SAMPLE INTERVAL TIMER EN R EN CLK3 X1 14 CLK 2 CLK3 2Hz CLOCK GENERATOR X2 15 R VALID 4 INTERVAL TIMEOUT CLK 2 CLK 1 CLK 0 8Hz 256H z 32KHz CLK 3 DISCONNECT 1 TIMER TIMEOUT DISCONNECT TIMER EN R RESET RELAY PULSE RESET 10 * 8 SET RELAY LEVEL SET RELAY LEVEL CLK 1 AMP OUT 11 3.9ms ONE SHOT FREQUENCY 5 DISCRIMINATOR ENABLE R 7 SET RELAY PULSE AMP IN 12 CLK 1 V DD 16 +V CLK 2 CLK 1 3.9ms ONE SHOT R DISCONNECT 6 TIMER ENABLE * V SS 9 TIME 2 BASE -V FIGURE 2. LS75XX BLOCK DIAGRAM FIGURE 3. TELEPHONE LINE INTERROGATOR The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. TIP NETWORK RING R1 Q1 D1 D2 R4 R3 R2 XTAL D4 D3 RESET SET RELAY LEVEL 13 C2 TONE R5 R6 DIFFERENTIAL AMP AND BAND PASS FILTER 4 LS7502 VI DESCRIPTION: This application shows a method for interrogating a telephone line to detect a 2713Hz (+10Hz) tone for a minimum of 4.5 seconds. (The LS7502 Circuit.) At the end of the 4.5 second sample period, an oscillator is energized and generates a tone back signal which modulates the Tip/Ring telephone line. As shown in Figure 3, the differential op-amp is connected to the telephone lines through .001µF coupling capacitors. This eliminates the DC component and acts as the first filter for 60Hz. The differential amplifier stage is followed by a band pass filter centered around 2713Hz. This filter should be designed for high Q's (Q > 10) and yet utilize current efficient op-amps. 10 TONE BACK OSCILLATOR CIRCUIT 8 R7 5 C1,C2 =.001µF, 400V C3 = 2.2µF,10V C4 =10µF, 10V C4 DTEN VSS 9 R4 = 1kΩ, 1/4W R5,R6 =100kΩ, 1/4W R7 = 200kΩ, 1/4W FDEN - + 6 R1 = 50kΩ, 1/4W R2 = 15kΩ, 1/4W R3 = 10kΩ, 1/4W C3 X2 POWER SUPPLY C1 + 15 16 14 VDD X1 AMP IN - 12 D1-D4 = IN4002 Q1 = MPSA42 XTAL = 32,768Hz The band pass output is then squared up and connected to the Digital Tone input (Pin 13). The input signal is sampled by the digital discrimination section of the LS7502. If 2713Hz (+10Hz) is present for 4.5 seconds, a 125 millisecond pulse at Pin 4 is applied to the DTEN input (Pin 6) causing an internal flip-flop to set and the Set Relay Level output (Pin 8) to go high, activating the tone back oscillator. As the 10µF capacitor (C4) builds up stored charge, it biases the FDEN input (Pin 5) through R7, until it is sufficient to reset the internal flip-flop and bring the circuit back to its idle state and turn the tone back oscillator off. By varying the R7-C4 network, the time constant for the tone back duration can be varied.