SD5000/5001/5400/5401 QUAD N-CHANNEL LATERAL DMOS SWITCH ZENER PROTECTED Product Summary Part Number V(BR)DS Min (V) VGS(th) Max (V) rDS(on) Max (Ω) Crss Max (pF) tON Max (ns) SD5000I 20 1.5 70 @ VGS = 5 V 0.5 2 SD5000N 20 1.5 70 @ VGS = 5 V 0.5 2 SD5001N 10 1.5 70 @ VGS = 5 V 0.5 2 SD5400CY 20 1.5 75 @ VGS = 5 V 0.5 2 SD5401CY 10 1.5 75 @ VGS = 5 V 0.5 2 Features Benefits Applications Quad SPST Switch with Zener Input Protection Low Interelectrode Capacitance and Leakage Ultra-High Speed Switching―tON: 1 ns Ultra-Low Reverse Capacitance: 0.2 pF Low Guaranteed rDS @5 V Low Turn-On Threshold Voltage High-Speed System Performance Low Insertion Loss at High Frequencies Low Transfer Signal Loss Simple Driver Requirement Single Supply Operation Fast Analog Switch Fast Sample-and-Holds Pixel-Rate Switching Video Switch Multiplexer DAC Deglitchers High-Speed Driver Description The SD5000/5400 series of monolithic switches features four individual double-diffused enhancement-mode MOSFETs built on a common substrate. These bidirectional devices provide low on-resistance and low interelectrode capacitances to minimize insertion loss and crosstalk. ultra-fast switching speeds. For manufacturing reliability, these devices feature poly-silicon gates protected by Zener diodes Built on Siliconix’ proprietary DMOS process, the SD5000/5400 series utilizes lateral construction to achieve low capacitance and For similar products packaged in TO-206AF (TO-72) and TO253 (SOT-143) see the SD211DE/SST211 series. The SD 5000/5400 are rated to handle ±10-V analog signals, while the SD5001/5401 are rated for ±5-V signals. Dual-In-Line D1 Narrow Body SOIC D4 SUBSTRATE S2 NC G1 G4 S1 S4 S2 S3 G2 G3 NC NC D2 D3 Top View S1 NC SUBSTRATE Plastic: SD5000N SD5001N Sidebraze: SD5000I G2 G1 D2 D1 D3 D4 G3 G4 S3 S4 Top View SD5400CY SD5401CY Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 20113 6/20/2013 Rev#A9 ECN# SD5000/5001/5400/5401 Absolute Maximum Ratings (TA = 25ºC Unless Otherwise Noted) Drain Current…………………………………………………….…...........50 mA Lead Temperature (1/16” from case for 10 seconds)……………………….300ºC Storage Temperature…………………………………………….…..-65 to 150ºC Operating Junction Temperature…..…………………………….…..-55 to 150ºC Power Dissipation”: (Package)…………………………….………500 mW (each Device)…..…………………….………300 mW Gate-Drain, Gate-Source Voltage (SD5000, SD5400)……………………………….……………+30V/-25V (SD5001, SD5401)……………………………………….……+25V/-15V Gate-Substrate Voltage (SD5000, SD5400)………+30V/-0.3V (SD5001I, SD5401)...….…+25V/-0.3V Drain-Source Voltage (SD5000, SD5400)……………….20V (SD5001I, SD5401)……………….10V Drain-Source-Substrate Voltage (SD5000, SD5400)……………….25V (SD5001I, SD5401)……………….15V Notes: a. SD5000/SD5001I derate 5 mW/C above 25ºC b. SD5400/SD5401 derate 4 mW/C above 25ºC a. Specificationsa SD5000 SD5400 Parameter Symbolb Limits SD5001 SD5401 Test Conditionsb Typc Min VGS=VBS=-5V, ID=10nA 30 20 10 Max Min Max Unit Static Drain-Source Breakdown Voltage V(BR)DS Source-Drain Breakdown Voltage V(BR)SD VGD=VBD=-5V, IS=10nA 22 20 10 Drain-Substrate Breakdown Voltage V(BR)DBO VGB=0 V, ID=10µA, Source Open 35 25 15 Source-Substrate Breakdown Voltage V(BR)SBO VGB=0 V, IS=10µA, Drain Open 35 25 15 Drain-Source Leakage Source-Drain Leakage IDS(off) ISD(off) Gate Leakage IGBS Threshold Voltage VGS(th) Drain-Source On-Resistance Resistance Match rDS(on) VDS= 10 V 0.4 VDS= 15 V 0.7 VDS= 20 V 0.9 VSD= 10 V 0.5 VSD= 15 V 0.8 VSD= 20 V 1 10 VDB = VSB = 0 V, VGB =30V 0.01 100 VDS = VGS, ID = I µA, VSB =0V 0.8 VGS= VBS=-5 V VGD= VBD=-5 V SD5000 Series VGS = 5 V SD5400 Series VGS = 5 V VGS = 10 V VSB = 0 V ID = 1 mA 10 10 10 0.1 1.5 nA 100 0.1 1.5 58 70 70 60 75 75 38 V Ω VGS = 15 V 30 VGS = 20 V 26 VGS = 5 V 1 SD5000 Series 12 10 10 SD5400 Series 11 9 9 ∆rDS(on) V 5 5 Dynamic Forward Transconductance gfs Gate Node Capacitance C(GS+GD+GB) Drain Node Capacitance C(GD+DB) Source Node Capacitance C(GS+SB) Reverse Transfer Capacitance VDS = 10 V VSB = 0 V lD = 20 mA f = 1 kHz VDS = 10 V f = 1 MHz VGS = VBS = -15V mS SD5000 Series Crss Crosstalk Linear Integrated Systems f = 3 kHz 2.5 3.5 3.5 2.0 3 3 3.7 5 5 0.2 0.5 0.5 -107 pF dB • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 20113 6/20/2013 Rev#A9 ECN# SD5000/5001/5400/5401 Specificationsa SD5000 SD5400 Parameter Symbolb Test Conditionsb Typc Min Limits SD5001 SD5401 Max Min Max Unit Switching Turn-On Time Turn-Off Time td(on) tr td(off) VSB= 1-5 Vin, VGN 0 to 5 V, RG = 25 Ω VDD = 5 V, RL = 680 Ω tf 0.5 1 1 0.6 1 1 2 ns 6 Notes: a. TA = 25ºC unless otherwise noted. b. B is the body (substrate) and V(BR) is breakdown. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. DMCA Switching Time Test Circuit Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 20113 6/20/2013 Rev#A9 ECN# SD5000/5001/5400/5401