MX23L12811

PRELIMINARY
MX23L12811
NEW 128M-BIT (16M x 8 / 8M x 16) MASK ROM WITH PAGE MODE
(TSOP PACKAGE)
FEATURES
• Bit organization
- 16M x 8 (byte mode)
- 8M x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page size
- 8 words per page
• Current
- Operating:40mA
- Standby:15uA
• Supply voltage
- 2.7V~3.6V for 120ns
- 3.0V~3.6V for 100ns
• Package
- 48 pin TSOP (12mm x 20mm)
- 48 pin TSOP reverse type
• Temperature
- 0 ~ 70°C
PIN CONFIGURATION
48 TSOP (Normal Type)
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MX23L12811
(Normal Type)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
A22
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48 TSOP (Reverse Type)
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
A22
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L12811
(Reverse Type)
P/N:PM0594
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
REV. 1.9, NOV. 07, 2006
1
MX23L12811
PIN DESCRIPTION
Symbol
A0~A22
D0~D14
D15/A-1
Pin Function
Address Inputs
Data Outputs
D15 (Word Mode)/ LSB Address
(Byte Mode)
Chip Enable Input
CE
Symbol
OE
Byte
VCC
VSS
NC
Pin Function
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
No Connection
ORDER INFORMATION
Part No.
Access Time
Page Time
Package
VCC
MX23L12811TC-10
100ns
30ns
48 pin TSOP
3.0V~3.6V
MX23L12811TC-12
120ns
30ns
48 pin TSOP
3.0V~3.6V
*MX23L12811TC-12
120ns
30ns
48 pin TSOP
2.7V~3.6V
(under development)
MX23L12811RC-10
100ns
30ns
48 pin TSOP (Reverse type)
3.0V~3.6V
MX23L12811RC-12
120ns
30ns
48 pin TSOP (Reverse type)
3.0V~3.6V
*MX23L12811RC-12
120ns
30ns
48 pin TSOP (Reverse type)
2.7V~3.6V
(under development)
MODE SELECTION
CE
OE
Byte
D15/A-1
D0~D7
D8~D15
Mode
Power
H
X
X
X
High Z
High Z
-
Stand-by
L
H
X
X
High Z
High Z
-
Active
L
L
H
Output
D0~D7
D8~D15
Word
Active
L
L
L
Input
D0~D7
High Z
Byte
Active
BLOCK DIAGRAM
A0/(A-1)
A2
A3
Address
Buffer
Memory
Array
Page
Decoder
Page
Buffer
A22
Word/
Byte
Output
Buffer
D0
D15/(D7)
CE
BYTE
OE
P/N:PM0594
REV. 1.9, NOV. 07, 2006
2
MX23L12811
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on any Pin Relative to VSS
Ambient Operating Temperature
Storage Temperature
Symbol
VIN
Topr
Tstg
Ratings
-1.3V to VCC+2.0V (Note)
0°C to 70°C
-65°C to 125°C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to 1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions,
inputs may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC =2.7V~3.6V)
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC
MIN.
2.4V
2.2V
-0.3V
-
MAX.
0.4V
VCC+0.3V
0.2 x VCC
5uA
5uA
40mA
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
ISTB1
ISTB2
CIN
COUT
-
1mA
15uA
10pF
10pF
Conditions
IOH = -0.4mA
IOL = 1.6mA
0V, VCC
0V, VCC
f=5MHz, all outputs open,
CE=VIL(Chip Enable)
OE=VIH(Output Disabled)
CE = VIH
CE>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item
Symbol
Read Cycle Time
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
tRC
tAA
tACE
tPA
tOE
tOH
tHZ
23L12811-10
MIN.
MAX.
100ns
100ns
100ns
30ns
30ns
0ns
20ns
23L12811-12
MIN.
MAX.
120ns
120ns
120ns
30ns
30ns
0ns
20ns
Note: Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.
P/N:PM0594
REV. 1.9, NOV. 07, 2006
3
MX23L12811
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~2.4V
10ns
1.4V
1.4V
See Figure
IOH (load)=-0.4mA
DOUT
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
ADD
ADD
tRC
tACE
CE
tOE
OE
tOH
tAA
VALID
DATA
VALID
tHZ
VALID
PAGE READ
VALID ADD
A3-A22
(A-1),A0,A1,A2
2'nd ADD
1'st ADD
tAA
DATA
3'rd ADD
tPA
VALID
VALID
P/N:PM0594
VALID
REV. 1.9, NOV. 07, 2006
4
MX23L12811
PACKAGE INFORMATION
P/N:PM0594
REV. 1.9, NOV. 07, 2006
5
MX23L12811
P/N:PM0594
REV. 1.9, NOV. 07, 2006
6
MX23L12811
REVISION HISTORY
Revision #
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Description
DC Characteristics ISTB2(CMOS Standby Current) 5uA-->15uA
AC Characteristics TPA(Page Mode Access Time) 50ns-->30ns
AC Characteristics TOE(Output Enable Time) 50ns-->30ns
Del Package 44-pin SOP
Modify Current Operating:60mA-->40mA
Modify ICC1:60mA-->40mA, f=5MHz, all outputs open
Del ICC2
Modify Current Operating:40mA-->50mA
Modify ICC1:40mA-->50mA
1.Modify Fast access time:120ns-->100ns
2.Modify Operating:50mA-->40mA
3.Added Temperature:0~70°C
4.Modify Supply Voltage : 3.3V±10%-->2.7V~3.6V
5.Modify Package Information
1.Add Supply Voltage: 2.7~3.6V for 120ns, 3.0~3.6V for 100ns
2.Modify Order Information
3.Add CE=VIL, OE=VIH in DC Characteristics
Modify Package Information
1. Added statement
P/N:PM0594
Page
P3
P3
P3
P1,5
P1
P3
P3
P1
P3
P1,3
P1
P1
P1,3
P5,6
P1,2
P2
P3
P5~6
P8
Date
DEC/15/1999
JUL/14/2000
DEC/12/2000
DEC/14/2000
AUG/28/2001
OCT/12/2001
NOV/22/2002
NOV/07/2006
REV. 1.9, NOV. 07, 2006
7
MX23L12811
Macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure
of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or
property, such as life-support systems, high temperature automotive, medical, aircraft and military application. Macronix
and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due
to use of Macronix's products in the prohibited applications.
MACRONIX INTERNATIONAL CO., LTD.
Headquarters
Macronix, Int'l Co., Ltd.
Taipei Office
Macronix, Int'l Co., Ltd.
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Hsinchu, Taiwan, R.O.C.
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Fax: +886-3-5632888
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Taipei, Taiwan, R.O.C.
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Fax: +886-2-2509-2200
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Email: [email protected]
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MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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