RENESAS HD74HC4538FPEL

HD74HC4538
Dual Precision Retriggerable/Resettable Monostable Multivibrators
REJ03D0654-0200
(Previous ADE-205-543)
Rev.2.00
Mar 30, 2006
Description
Each multivibrator features both a negative, A, and a positive, B, transition triggered input, either of which can be used
as an inhibit input. Also included is a clear input that when taken low resets the one short. The HD74HC4538 is
retriggerable. That is, it may be triggered repeatedly while their outputs are generating a pulse and the pulse will be
extended.
Pulse width stability over a wide range of temperature. The output pulse equation is simply: tw = 0.7 (R) (C).
Features
•
•
•
•
•
•
High Speed Operation: tpd (A or B to Y) = 22 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current
Ordering Information
Part Name
Package Type
HD74HC4538P
DILP-16 pin
HD74HC4538FPEL
SOP-16 pin (JEITA)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
Package
Abbreviation
P
—
FP
EL (2,000 pcs/reel)
PRSP0016DG-A
RP
(FP-16DNV)
Note: Please consult the sales office for the above package availability.
HD74HC4538RPEL
Taping Abbreviation
(Quantity)
SOP-16 pin (JEDEC)
EL (2,500 pcs/reel)
Function Table
X :
CD
L
H
H
H
H
Irrelevant
Inputs
A
X
L
Outputs
B
X
Q
H
Q
L
H
H
Rev.2.00 Mar 30, 2006 page 1 of 13
L
Not triggered
Not triggered
HD74HC4538
Pin Arrangement
T1A
1
16 VCC
T2A
2
T1
T2
T1
15 T1B
CDA
3
CD
T2
14 T2B
AA
4
A
CD
13 CDB
BA
5
B
A
12 AB
QA
6
Q
B
11 BB
QA
7
Q
Q
10 QB
GND
8
Q
9
QB
(Top view)
Logic Diagram
CX
RX
VCC
T1A
T2A
QA
AA
BA
QA
CDA
CX
RX
VCC
T1B
T2B
QB
AB
BB
QB
CDB
RX and CX are external components
Rev.2.00 Mar 30, 2006 page 2 of 13
HD74HC4538
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage
Output voltage
DC input diode current
DC input diode current pin 2, 14
DC output diode current
DC current drain per pin
DC current drain per VCC, GND
Power dissipation per package
Storage temperature
Symbol
VCC
Vin
Vout
IIK
IIK
IOK
Iout
ICC, IGND
PT
Tstg
Rating
–0.5 to +7.0
–0.5 to VCC + 0.5
–0.5 to VCC + 0.5
±20
±30
±20
±25
±50
500
–65 to +150
Unit
V
V
V
mA
mA
mA
mA
mA
mW
°C
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Symbol
VCC
VIN, VOUT
Ta
*1
Input rise / fall time
Note:
Ratings
2 to 6
0 to VCC
–40 to 85
0 to 1000
Unit
V
V
°C
0 to 500
ns
tr, tf
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0 to 400
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item
Input voltage
Symbol VCC (V)
VIH
Quiescent supply
current
(standby state)
Current drain
(active state)
Ta = –40 to+85°C
Unit
Min
Max
Test Conditions
1.5
3.15
4.2
—
—
—
—
—
—
—
—
—
—
0.5
1.35
1.5
3.15
4.2
—
—
—
—
—
0.5
1.35
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
—
1.9
4.4
5.9
4.18
5.68
—
—
—
—
—
—
2.0
4.5
6.0
—
—
0.0
0.0
0.0
—
—
1.8
—
—
—
—
—
0.1
0.1
0.1
0.26
0.26
—
1.9
4.4
5.9
4.13
5.63
—
—
—
—
—
1.8
—
—
—
—
—
0.1
0.1
0.1
0.33
0.33
Iin
ICC
6.0
6.0
—
—
—
—
±0.1
130
—
—
±1.0
220
µA Vin = VCC or GND
µA Vin = VCC or GND,
QA = QB = GND, Iout = 0 µA
ICC
6.0
—
—
130
—
220
µA Vin = VCC or GND,
QA = QB = VCC
Pin 2, 14 = 0.5 VCC
VOH
VOL
Input current
Ta = 25°C
Typ Max
2.0
4.5
6.0
2.0
4.5
VIL
Output voltage
Min
Rev.2.00 Mar 30, 2006 page 3 of 13
V
V
V
Vin = VIH or VIL IOH = –20 µA
V
IOH = –4 mA
IOH = –5.2 mA
Vin = VIH or VIL IOL = 20 µA
IOL = 4 mA
IOL = 5.2 mA
HD74HC4538
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Item
Ta = 25°C
Min
Typ Max
Symbol VCC (V)
Propagation delay
time
tPLH
tPHL
tPHL
tPLH
Pulse width
tw
Output pulse width
Pulse width match
between circuits in
the same package
tWQ
∆tWQ
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
3.0
5.0
3.0
5.0
3.0
5.0
3.0
5.0
5.0
—
—
—
—
—
—
—
—
—
—
—
—
80
16
14
—
—
—
—
—
—
—
—
—
—
22
—
—
23
—
—
17
—
—
—
—
—
—
—
150
100
—
1.3
—
9
—
70
±0.1
235
47
40
260
52
44
235
47
40
235
47
40
—
—
—
—
—
—
—
—
—
—
—
—
Ta = –40 to +85°C
Min
Max
—
—
—
—
—
—
—
—
—
—
—
—
100
20
17
—
—
—
—
—
—
—
—
—
295
59
50
325
65
55
295
59
50
295
59
50
—
—
—
—
—
—
—
—
—
—
—
—
Unit
Test Conditions
ns
A or B to Q
ns
A or B to Q
ns
CD to Q
ns
CD to Q
ns
A, B, CD
ns
RX = 1 kΩ, CX = 12 pF
µs
RX = 10 kΩ, CX = 100 pF
µs
RX = 10 kΩ, CX = 1000 pF
µs
RX = 10 kΩ, CX = 10000 pF
%
RX = 10 kΩ, CX = 1000 pF
Caution in use: In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor
between VCC and GND, and keep the wiring between the External components and Cext, Rext/Cext pins
as short as possible.
Test Circuit
VCC
VCC
Cext Rext
Input A
Input B
Pulse Generator
Zout = 50 Ω
Input Clear
Pulse Generator
Zout = 50 Ω
Cext Rext/Cext
Q
See Function Table
Pulse Generator
Zout = 50 Ω
Output
CL =
50 pF
Output
Q
Clear
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 4 of 13
CL =
50 pF
HD74HC4538
Circuit Operation
Figure 3 shows the HC4538 configured in the retriggerable mode. Briefly, the device operates as follows (refer to
figure 1): In the quiescent state, the external timing capacitor, CX, is charged to VCC. When a trigger occurs, the Q
output goes high and CX discharges quickly to the lower references voltage (Vref Lower ≈ 1/3 VCC). CX then charges,
through RX, back up to the upper reference voltage (Vref Upper ≈ 2/3 VCC), at which point the one-shot has timed out
and the Q output goes low.
The following, more detailed description of the circuit operation refers to both the function diagram (figure 1) and the
timing diagram (figure 2)
Quiescent State
In the quiescent state, before an input trigger appears; the output latch is high and the reset latch is high (1 in figure 2).
Thus the Q output (pin 6 or 10) of the monostable multivibrator is low (2 figure 2).
The output of the trigger-control circuit is low (3), and transistors M1, M2, and M3 are turned off. The external timing
capacitor, CX, is charged to VCC (4), and the upper reference circuit has a low output (5). Transistor M4 is turned on
and analog switch S1 is turned off. Thus the lower reference circuit has VCC at the noninverting input and a resulting
low output (6).
In addition, the output of the trigger-control reset circuit is low.
Trigger Operation
The HC4538 is triggered by either a rising-edge signal as input A (7) or a falling-edge signal at input B (8), with the
unused trigger input and the Reset input held at the voltage levels shown in the Function Table. Either trigger signal
will cause the output of the trigger-control circuit to go high (9). The trigger-control circuit going high simultaneously
initiates three events. First, the output latch goes low, thus taking the Q output of the HC4538 to a high state (10).
Second, transistor M3 is turned on, which allows the external timing capacitor, CX, to rapidly discharge toward ground
(11). (Note that the voltage across CX appears at the input of the upper reference circuit comparator). Third, transistor
M4 is turned off and analog switch S1 is turned on, thus allowing the voltage across CX to also appear at the input of the
lower reference circuit comparator.
When CX discharges to the reference voltage of the lower reference circuit (12), the outputs of both reference circuits
will be high (13). The trigger-control circuit flip-flop to a low state (14). This turns transistor M3 off again, allowing
CX to begin to charge back up toward VCC, with a time constant t = RXCX (15). In addition, transistor M4 is turned on
and analog switch S1 is turned off. Thus a high voltage level is applied to the input of the lower reference circuit
comparator, causing its output to go low (16). The monostable multivibrator may be retriggered at any time after the
trigger-control circuit goes low.
When CX charges up to the reference voltage of the upper reference circuit (17), the output of the upper reference circuit
goes low (18). This causes the output latch to toggle, taking the Q output of the HC4538 to a low state (19), and
completing the time-out cycle.
Reset Operation
A low voltage applied to the Reset pin always forces the Q output of the HC4538 to a low state.
The timing diagram illustrates the case in which reset occurs (20) while CX is charging up toward the reference voltage
of the upper reference circuit (21). When a reset occurs, the output of the reset latch goes low (22), turning on transistor
M1. Thus CX is allowed to quickly charge up to VCC (23) to await the next trigger signal.
Retrigger Operation
When used in the retriggerable mode (figure 3), the HC4538 may be retriggered during timing out of the output pulse at
any time after the trigger-control circuit flip-flop has been reset (24). Because the trigger-control circuit flip-flop resets
shortly after CX has discharged to the reference voltage of the lower reference circuit (25), the minimum retrigger time,
trr (Switching Waveform 1) is a function of internal propagation delays and the discharge time of CX:
Figure 4 shows the device configured in the non-retriggerable mode.
Rev.2.00 Mar 30, 2006 page 5 of 13
HD74HC4538
Power-Down Considerations
Large values of CX may cause problems when powering down the HC4538 because of the amount of energy stored in
the capacitor. When a system containing this device is powered down, the capacitor may discharge from VCC through
the input protection diodes at pin 2 or pin 14. Current through the protection diodes must be limited to 30 mA;
therefore, the turn-off time of the VCC power supply must not be faster than t = VCC•CX/(30 mA). For example, if VCC =
5 V and CX = 15 µF, the VCC supply must turn off no faster than t = (5 V)•(15 µF)/30 mA = 2.5 ms. This is usually not
a problem because power supplies are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of VCC to zero voltage occurs, the HC4538 may sustain damage. To avoid this possibility,
use an external clamping diode.
VCC
RX
2, 14
T2
CX
VCC
M1
M2
Upper Reference
Circuit
2k
Output Latch
+
–
M3
Vref Upper
6, 10
S1
VCC
M4
7, 9
+
–
4, 12
Trigger-Control Circuit
A
Vref Lower
C Q
B
CR
5, 11
Trigger-Control
Reset Circuit
3, 13
CD
Reset Latch
Figure 1. Function Diagram
Rev.2.00 Mar 30, 2006 page 6 of 13
Q
Lower Reference
Circuit
Q
HD74HC4538
Quiescent
State
Trigger Cycle (A Input)
Trigger Cycle (B Input)
Retrigger
Reset
trr
7
Trigger Input A
(Pin 4 or 12)
Trigger Input B
(Pin 5 or 11)
8
Reset Input CD
(Pin 3 or 13)
21
24
9
14
3
Trigger-Control
Circuit Output
11
4
T2 Input
(Pin 2 or 14)
15
20 23
17
12
Vref Upper
Vref Lower 13
Upper Reference
Circuit Output
5
Lower Reference
Circuit Output
6
Reset Latch
Output
1
Q Output
(Pin 6 or 10)
2
25
13
16
22
10
19
tWQ
tWQ
tWQ+trr
tW (H)
50%
A
tW (L)
B
50%
tWQ
tPLH
Q
tPLH
50%
tPHL
Q
tPHL
50%
A
trr
B
50%
tf
tr
50%
CD
tW (L)
tPHL
50%
tTLH
90%
10%
Q
tTHL
Q
90%
10%
90%
10%
tWQ+trr
50%
(Retriggered Pulse)
tPLH
50%
Figure 2. Timing Diagram
Rev.2.00 Mar 30, 2006 page 7 of 13
HD74HC4538
CX
RX
VCC
T1
T2
Q
A
Rising-Edge
Trigger
B
Q
CD
CX
RX
VCC
T1
T2
Q
A
B
Q
Falling-Edge
Trigger
CD
Figure 3. Retriggerable Monostable Circuitry
Rev.2.00 Mar 30, 2006 page 8 of 13
HD74HC4538
CX
RX
VCC
T1
T2
Q
A
Rising-Edge
Trigger
B
Q
CD
CX
RX
VCC
T1
T2
Q
A
B
Q
Falling-Edge
Trigger
CD
Figure 4. Nonritriggerable Monostable Circuitry
Application Data
Vcc = 2.5 V
Output Pulse Width twQ (µs)
10000.0
1000.0
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
102
103
104
105
106
Timing Capacitance Cext (pF)
Rev.2.00 Mar 30, 2006 page 9 of 13
107
HD74HC4538
Vcc = 3.3 V
twQ (µs)
10000.0
1000.0
Output Pulse Width
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
102
103
104
105
106
107
Timing Capacitance Cext (pF)
Vcc = 5.0 V
Output Pulse Width twQ (µs)
10000.0
1000.0
100.0
10.0
Rext
1 kΩ
10 kΩ
100 kΩ
1 MΩ
1.0
0.1
102
103
104
105
106
Timing Capacitance Cext (pF)
Rev.2.00 Mar 30, 2006 page 10 of 13
107
HD74HC4538
Rext = 2 kΩ
Coefficient of Output Pulse Width K
1.2
Cext
1000 pF
10000 pF
100000 pF
1000000 pF
1.1
1.0
0.9
0.8
0.7
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Supply Voltage Vcc (V)
Rext = 10 kΩ
Coefficient of Output Pulse Width K
1.2
Cext
1000 pF
10000 pF
100000 pF
1000000 pF
1.1
1.0
0.9
0.8
0.7
0.6
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Supply Voltage Vcc (V)
Rev.2.00 Mar 30, 2006 page 11 of 13
5.5
6.0
HD74HC4538
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
Previous Code
DP-16FV
MASS[Typ.]
1.05g
D
9
E
16
1
8
b3
0.89
A1
A
Z
L
Reference
Symbol
θ
bp
e
e1
D
E
A
A1
bp
b3
c
θ
e
Z
L
c
e1
( Ni/Pd/Au plating )
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-B
*1
Previous Code
FP-16DAV
Dimension in Millimeters
Min
Nom Max
7.62
19.2 20.32
6.3 7.4
5.06
0.51
0.40 0.48 0.56
1.30
0.19 0.25 0.31
0°
15°
2.29 2.54 2.79
1.12
2.54
MASS[Typ.]
0.24g
D
F
16
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
9
c
HE
*2
E
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
Z
8
e
*3
bp
x
Reference Dimension in Millimeters
Symbol
M
A
L1
A1
θ
y
L
Detail F
Rev.2.00 Mar 30, 2006 page 12 of 13
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Min Nom Max
10.06 10.5
5.50
0.00 0.10 0.20
2.20
0.34 0.40 0.46
0.15 0.20 0.25
0°
8°
7.50 7.80 8.00
1.27
0.12
0.15
0.80
0.50 0.70 0.90
1.15
HD74HC4538
JEITA Package Code
P-SOP16-3.95x9.9-1.27
RENESAS Code
PRSP0016DG-A
*1
Previous Code
FP-16DNV
MASS[Typ.]
0.15g
D
F
16
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
9
c
*2
Index mark
HE
E
bp
Terminal cross section
( Ni/Pd/Au plating )
1
Z
Reference Dimension in Millimeters
Symbol
8
e
*3
bp
x
M
A
L1
A1
θ
L
y
Detail F
Rev.2.00 Mar 30, 2006 page 13 of 13
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Min Nom Max
9.90 10.30
3.95
0.10 0.14 0.25
1.75
0.34 0.40 0.46
0.15 0.20 0.25
0°
8°
5.80 6.10 6.20
1.27
0.25
0.15
0.635
0.40 0.60 1.27
1.08
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
Renesas Technology Malaysia Sdn. Bhd
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
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