Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Doc. No. MV-S105997-00, Rev. -May 9, 2011 Document Classification: Proprietary Information Marvell. Moving Forward Faster Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Document Conventions Note: Provides related information or information of special importance. Caution: Indicates potential damage to hardware or software, or loss of data. Warning: Indicates a risk of personal injury. Document Status Doc Status: Advance Technical Publications: 1.00 For more information, visit our website at: www.marvell.com Disclaimer No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. 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No. MV-S105997-00 Rev. -Page 2 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Overview Features The Alaska® 88E1112 Gigabit Ethernet Transceiver is a physical layer device for Ethernet 1000BASE-T, 100BASE-TX, and 10BASE-T applications. It is manufactured using standard digital CMOS process and contains all the active circuitry required to implement the physical layer functions to transmit and receive data on standard CAT 5 unshielded twisted pair. • • The Alaska 88E1112 device supports the Serial Gigabit Media Independent Interface (SGMII) for direct connection to a MAC/Switch port. The 88E1112 device incorporates an additional 1.25 GHz SERDES (Serializer/Deserializer) which may be connected directly to a fiber-optic transceiver for 1000BASE-X applications. The SERDES is switchable to support 125 MHz operation for 100BASEFX applications. Additionally, the 88E1112 device may be used to implement 10/100/1000BASE-T Gigabit Interface Converter (GBIC) or Small Form Factor Pluggable (SFP) modules. • • • • • • • • • • • The 88E1112 device uses advanced mixed-signal • processing to perform equalization, echo and crosstalk cancellation, data recovery, and error cor• rection at a gigabit per second data rate. The device achieves robust performance in noisy envi• ronments with very low power dissipation. • • • • • • 10/100/1000BASE-T IEEE 802.3 compliant Supports Serial Gigabit Media Independent Interface (SGMII) Integrated 1.25 GHz SERDES for 1000BASE-X fiber applications Integrated 125 MHz SERDES for 100BASE-FX fiber applications SGMII to SERDES mode supported SGMII to SGMII bridging supported Supports tri-speed GBIC/SFP applications Media Detection™ mode for copper and fiber support Integrated Virtual Cable Tester® (VCT™) cable diagnostic feature 2-pair downshift feature Auto-MDI/MDIX feature when link partner Auto-Negotiation enabled or disabled Advanced diagnostics: CRC error checker, packet counter, pattern generator EEPROM support for PHY configuration Selectable MDC/MDIO interface or Two-Wire Serial Interface Fully integrated digital adaptive equalizers, echo cancellers, and crosstalk cancellers Advanced digital baseline wander correction Automatic polarity correction IEEE 802.3u compliant Auto-Negotiation Requires only two supplies: 2.5V and 1.2V Very low power dissipation PAVE = 0.75W Manufactured in a 64-Pin QFN, 9X9 mm package Available in Commercial or Industrial grade Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 3 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Alaska® 88E1112 10/100/1000 Mbps Ethernet MAC MAC Interface - SGMII T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Copper Applications SERDES 10/100/1000 Mbps Ethernet MAC Fiber Optics Alaska® 88E1112 Media Types: - 1000BASE-X OR M A G MAC Interface - SGMII RJ45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Media Detect™ Applications (1000BASE-X SERDES) SGMII 10/100/1000 Mbps Ethernet MAC SFP Interface Alaska® 88E1112 M A G MAC Interface - SGMII RJ-45 Media Type: - 1000BASE-X - 100BASE-FX - 10/100/1000 BASE-T Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Media Detect ™ Applications (SGMII) Switch Board GBIC/SFP Card 1000 Mbps only Ethernet MAC GBIC/SFP Interface SERDES TBI SERDES SERDES Optional EEPROM Alaska® 88E1112 T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T Alaska 88E1112 used in 1000BASE-T GBIC/ SFP Applications 4B/5B 125 MHz 100BASE-FX Interface SGMII Clock 10/100/1000 Mbps Ethernet MAC 2 SGMII Data 4 Alaska® 88E1112 4 100BASE-FX Fiber Transceiver Media Type: - 100BASE-FX MAC Interface - 6 pin SGMII - 4 pin SGMII Alaska 88E1112 used in Traditional 100BASE-FX Applications Doc. No. MV-S105997-00, Rev. -Page 4 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Switch Board GBIC/SFP Card 10/100/1000 Mbps Ethernet MAC Alaska® GBIC/SFP Interface SGMII T r a n s f o r m e r Optional EEPROM SGMII 88E1112 RJ45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in 10/100/1000BASE-T tri-speed GBIC/SFP Applications Switch Board GBIC/SFP Card Alaska® GBIC/SFP Interface MAC Optical Components 88E1112 SGMII Interface SGMII Media Type: - 100BASE-FX Alaska 88E1112 used in 100BASE-FX GBIC/SFP Applications Alaska® 88E1112 Fiber Transceiver SERDES T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T Alaska 88E1112 used in Media Converter Applications SGMII Clock 10/100/1000 Mbps Ethernet MAC 2 SGMII Data SGMII Data Alaska® 88E1112 4 SFP Interface Media Type: - 1000BASE-X - 100BASE-FX - 10/100/1000 BASE-T 4 MAC Interface - 6 pin SGMII - 4 pin SGMII Alaska 88E1112 used in 4-pin SGMII to 6-pin SGMII Conversions Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 5 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Table of Contents SECTION 1. 1.1 1.2 88E1112 64-Pin QFN Package .......................................................................................7 Pin Description ...............................................................................................................8 1.2.1 1.3 Pin Type Definitions............................................................................................................ 8 64-Pin QFN Pin Assignment List - Alphabetical by Signal Name ............................15 SECTION 2. 2.1 SIGNAL DESCRIPTION ................................................................... 7 MECHANICAL DRAWINGS ............................................................ 16 64 - Pin 9x9 mm QFN Package ....................................................................................16 Doc. No. MV-S105997-00,Rev. -Page 6 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Signal Description 88E1112 64-Pin QFN Package Section 1. Signal Description The 88E1112 device is a 10/100/1000BASE-T/1000BASE-X/100BASE-FX Gigabit Ethernet transceiver. 1.1 88E1112 64-Pin QFN Package DVDD CONFIG[1] CONFIG[2] CONFIG[3] DVDD CONFIG[4] CONFIG[5] STATUS[0] DVDD STATUS[1] VDDO XTAL1 XTAL2 TSTPT VDDA NORMAL CONFIG[0] Figure 1: 88E1112 64-Pin QFN Package (Top View) 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 PWRDN 50 POL_RST 51 RESET SDA NC 31 MDIN[3] 30 MDIP[3] 52 29 VDDA 53 28 MDIN[2] SCL 54 27 MDIP[2] VSS 55 26 HSDACN VDDO 56 25 HSDACP MDC 57 24 VDDA MDIO 58 23 VDDA 22 MDIN[1] 21 MDIP[1] 20 VDDA 19 MDIN[0] EPAD - VSS LOS 59 SIGDET 60 INIT/INT 61 DVDD 62 VSS 63 18 MDIP[0] DVDD 64 17 RSET 88E1112 12 13 14 15 16 F_VTT VDDAH F_INN F_INP 11 F_OUTP VDDAL 10 9 8 S_INN S_INP 7 F_OUTN 6 5 S_CLKP VDDAL 4 VDDAH 3 S_VTT 2 S_OUTP S_CLKN 1 S_OUTN Top View Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 7 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver 1.2 Pin Description 1.2.1 Pin Type Definitions Pi n Ty pe De fin iti on H Input with hysteresis I/O Input and output I Input only O Output only PU Internal pull-up PD Internal pull-down D Open drain output Z Tri-state output mA DC sink capability Doc. No. MV-S105997-00, Rev. -Page 8 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Signal Description Pin Description Table 1: Copper Interface P in # Pin N am e P in Typ e D es cr i pt i on 18 19 MDIP[0] MDIN[0] I/O Media Dependent Interface[0]. In 1000BASE-T mode in MDI configuration, MDIP/N[0] correspond to BI_DA±. In MDIX configuration, MDIP/N[0] correspond to BI_DB±. In 100BASE-TX and 10BASE-T modes in MDI configuration, MDIP/N[0] are used for the transmit pair. In MDIX configuration, MDIP/N[0] are used for the receive pair. MDIP/N[0] should be tied to ground if not used. 21 22 MDIP[1] MDIN[1] I/O Media Dependent Interface[1]. In 1000BASE-T mode in MDI configuration, MDIP/N[1] correspond to BI_DB±. In MDIX configuration, MDIP/N[1] correspond to BI_DA±. In 100BASE-TX and 10BASE-T modes in MDI configuration, MDIP/N[1] are used for the receive pair. In MDIX configuration, MDIP/N[1] are used for the transmit pair. MDIP/N[1] should be tied to ground if not used. 27 28 MDIP[2] MDIN[2] I/O Media Dependent Interface[2]. In 1000BASE-T mode in MDI configuration, MDIP/N[2] correspond to BI_DC±. In MDIX configuration, MDIP/N[2] correspond to BI_DD±. In 100BASE-TX and 10BASE-T modes, MDIP/N[2] are not used. MDIP/N[2] should be tied to ground if not used. 30 31 MDIP[3] MDIN[3] I/O Media Dependent Interface[3]. In 1000BASE-T mode in MDI configuration, MDIP/N[3] correspond to BI_DD±. In MDIX configuration, MDIP/N[3] correspond to BI_DC±. In 100BASE-TX and 10BASE-T modes, MDIP/N[3] are not used. MDIP/N[3] should be tied to ground if not used. Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 9 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Table 2: Fiber Interface: 1000BASE-X/SGMII Media Interface/100BASE-FX Pi n # Pi n N a m e P in Typ e D esc r i pt i on 16 15 F_INP F_INN I 1.25 GHz input - Positive and Negative (1000BASE-X and SGMII Media Interface 125 MHz Input - Positive and Negative (100BASE-FX) The fiber-optic transceiver’s positive output connects to the F_INP. The fiber-optic transceiver’s negative output connects to the F_INN. 60 SIGDET I SERDES signal detect 1 = Signal Detected 0 = No Signal Detected Polarity can be changed through register 16_1.9. 11 10 F_OUTP F_OUTN O 1.25 GHz output - Positive and Negative (1000BASE-X and SGMII Media Interface 125 MHz output - Positive and Negative (100BASE-FX) The fiber-optic transceiver’s positive input connects to the F_OUTP. The fiber-optic transceiver’s negative input connects to the F_OUTN. Output amplitude can be adjusted via register 26_1.2:0. Note The fiber interface pins are not used for GBIC mode. Table 3: MAC Interface Pin # Pi n N a m e P i n Typ e D e s c r i p ti o n 9 8 S_INP S_INN I SGMII Transmit Data. 1.25 GBaud input - Positive and Negative. 5 4 S_CLKP S_CLKN O SGMII 625 MHz Receive Clock output - Positive and Negative. Output amplitude can be adjusted via register 26_2.2:0 2 1 S_OUTP S_OUTN O SGMII Receive Data. 1.25 GBaud output - Positive and Negative. Output amplitude can be adjusted via register 26_2.2:0. 59 LOS O Loss of Signal/LED Status On hardware reset, LOS defaults to loss of signal where Hi-Z = Loss of Signal 0 = Media interface has link The LOS pin can be configured to output other status. Note The MAC interface pins are used for GBIC mode. Doc. No. MV-S105997-00, Rev. -Page 10 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Signal Description Pin Description Table 4: Management Interface/Control Pin Nam e Pin Ty pe D escr ip tio n MDC/SSCL1 I Management Clock pin. MDC is the management data clock reference for the serial management interface. A continuous clock stream is not expected. The maximum frequency supported is 8.3 MHz. Pin # 57 When the 88E1112 device is connected to a Two-Wire Serial Interface (TWSI) bus, MDC is connected to a serial clock line (SSCL). Data is stable during the high portion of the clock. MDIO/SSDA1 58 I/O Management Data pin. MDIO is the management data. MDIO transfers management data in and out of the device synchronously to MDC. This pin requires a pull-up resistor in a range from 1.5 kohm to 10 kohm When 88E1112 device is connected to a Two-Wire Serial Interface (TWSI) bus, MDIO connects to the serial data lines (SSDA). These pins are open-drain and maybe be wire-ORed with any number of open-drain devices. SSDA requires 1.5 kohm to 10 kohm pull-up resistors. 1. SSCL and SSDA pins should not be confused by the SCL and SDA pins. The SSCL, SSDA pins act like slaves in the TWSI bus. The SCL and SDA pins act like masters in EEPROM interface. Table 5: EEPROM Interface Pin Nam e Pin Ty pe D escr ip tio n 54 SCL O EEPROM Serial Clock 53 SDA I/O EEPROM Serial Data. This pin requires a pull-up resistor in a range from 1.5 kohm to 10 kohm Pin # Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 11 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Table 6: Clock/Configuration/Reset/I/O Voltage Clamp Selection Pi n # Pi n Name Pi n Ty pe De scri p ti o n 48 CONFIG[0] I Configuration 0 pin 46 CONFIG[1] I Configuration 1 pin 45 CONFIG[2] I Configuration 2 pin 44 CONFIG[3] I Configuration 3 pin 42 CONFIG[4] I Configuration 4 pin 41 CONFIG[5] I Configuration 5 pin 38 STATUS[1] O, mA LED Status 1 pin 40 STATUS[0] O, mA LED Status 0 pin 61 INIT/INT O This is a triple function pin used for PHY Initialization, device interrupt, or LED Status. On hardware reset, INIT defaults to loss of signal where Hi-Z = PHY initialization is in process 0 = PHY registers initialized via EEPROM is complete The INIT pin can be configured to output other status. 36 XTAL1 I 25 MHz Clock Input 25 MHz ± 50 ppm tolerance crystal reference or oscillator input. 35 XTAL2 O 25 MHz Crystal Output. 25 MHz ± 50 ppm tolerance crystal reference. When the XTAL2 pin is not connected, it should be left floating. 52 RESET I Hardware reset. XTAL1 must be active for a minimum of 10 clock cycles before the rising edge of RESET. RESET must be in inactive state for normal operation. Reset Polarity is determined by POL_RST. See POL_RST below for details. 51 POL_RST I, PU Reset Polarity. If POL_RST = 1 or Unconnected 1 = Reset 0 = Normal operation If POL_RST = 0 1 = Normal operation 0 = Reset 50 PWRDN I 1 = Power down 0 = Power up 49 NORMAL I, PU Test Mode Control 0 = Test mode 1 = Normal Doc. No. MV-S105997-00, Rev. -Page 12 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Signal Description Pin Description Table 7: Test P in # Pin N am e P in Typ e D esc r i pt i on 25 26 HSDACP HSDACN O AC Test Point. Positive and Negative. These pins should be left floating but brought out for probing. 34 TSTPT O DC Test Point Table 8: Reference Pi n # Pi n Name Pi n Ty pe De scri p ti o n 17 RSET I Resistor Reference External 5.0 kohm 1% resistor connected to ground. Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 13 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Table 9: Power & Ground Pi n # Pi n Name Pi n Ty pe De scri p ti o n 39 43 47 62 64 DVDD Power 1.2V Digital Supply 12 F_VTT Power SERDES Output Supply 3 S_VTT Power SGMII Output Supply 20 23 24 29 33 VDDA Power 2.5V Analog Supply. 37 56 VDDO Power 1.5V or 2.5V I/O Supply. If the crystal option is used, VDDO must be connected to 2.5V. NOTE: I/O pins are not 3.3V tolerant when VDDO = 2.5V is used. 7 14 VDDAH Power 2.5V Analog Supply. 6 13 VDDAL Power 1.5V or 2.5V Analog Supply. 2.5V Analog Supply will draw more power. EPAD 55 63 VSS Ground Ground. The 88E1112 device is contained in a 64 pin QFN package, which has an exposed die pad (E-PAD) at its base. The EPAD must be soldered to VSS. The location of the EPAD can be found in Section 2.1 "64 - Pin 9x9 mm QFN Package" on page 16 and Table 10, “64-Pin QFN Package Dimensions,” on page 17. 32 No Connect NC NC Doc. No. MV-S105997-00, Rev. -Page 14 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Signal Description 64-Pin QFN Pin Assignment List - Alphabetical by Signal Name 1.3 64-Pin QFN Pin Assignment List - Alphabetical by Signal Name Pin # Pin Name Pin # Pin Name 48 CONFIG[0] 50 PWRDN 46 CONFIG[1] 52 RESET 45 CONFIG[2] 17 RSET 44 CONFIG[3] 54 SCL 42 CONFIG[4] 4 S_CLKN 41 CONFIG[5] 5 S_CLKP 39 DVDD 53 SDA 43 DVDD 60 SIGDET 47 DVDD 8 S_INN 62 DVDD 9 S_INP 64 DVDD 1 S_OUTN 15 F_INN 2 S_OUTP 16 F_INP 3 S_VTT 10 F_OUTN 40 STATUS[0] 11 F_OUTP 38 STATUS[1] 12 F_VTT 34 TSTPT 26 HSDACN 20 VDDA 25 HSDACP 23 VDDA 61 INIT/INT 24 VDDA 59 LOS 29 VDDA 57 MDC 33 VDDA 19 MDIN[0] 7 VDDAH 18 MDIP[0] 14 VDDAH 22 MDIN[1] 6 VDDAL 21 MDIP[1] 13 VDDAL 28 MDIN[2] 37 VDDO 27 MDIP[2] 56 VDDO 31 MDIN[3] EPAD VSS 30 MDIP[3] 55 VSS 58 MDIO 63 VSS 32 NC 36 XTAL1 49 NORMAL 35 XTAL2 51 POL_RST Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 15 Alaska® 88E1112 Technical Product Brief Integrated 10/100/1000 Gigabit Ethernet Transceiver Section 2. Mechanical Drawings aaa C 2.1 64 - Pin 9x9 mm QFN Package D D1 1.0mm 4 XO N 1 2 A2 A3 L A1 E E1 A 3 b DETAIL : B aaa C 0.08 C A ''B'' SEATING PLANE E2 b 0.6max D2 "A" 0.6max DETAIL : A e (All Dimensions in mm.) Doc. No. MV-S105997-00, Rev. -Page 16 Copyright © 2011 Marvell Document Classification: Proprietary Information May 9, 2011, Advance Mechanical Drawings 64 - Pin 9x9 mm QFN Package Table 10: 64-Pin QFN Package Dimensions Symbol A A1 A2 Dimension in mm MIN NOM 0.80 0.00 --- A3 b D MAX 1.00 0.05 1.00 0.20 REF 0.18 D1 E 0.23 0.30 9.00 BSC 8.75 BSC 9.00 BSC E1 e L O 0.85 0.02 0.65 8.75 BSC 0.50 BSC 0.30 0° 0.40 --- 0.50 12° aaa --- --- 0.25 bbb --- --- 0.10 chamfer --- --- 0.60 Symbol D2 E2 Die Pad Size Dimens ion in mm 5.21 ± 0.20 6.25 ± 0.20 NOTE: 1. CONTROLLING DIMENSION : MILLIMETER Copyright © 2011 Marvell May 9, 2011, Advance Doc. No. MV-S105997-00, Rev. -Document Classification: Proprietary Information Page 17 Back Cover Marvell Semiconductor, Inc. 5488 Marvell Lane Santa Clara, CA 95054, USA Tel: 1.408.222.2500 Fax: 1.408.988.8279 www.marvell.com Marvell. Moving Forward Faster