Silan Semiconductors SC3010 INFRARED REMOTE CONTROL TRANSMITTER DESCRIPTION SC3010 is a remote control transmitter utilizing CMOS Technology specially designed for use on general purpose (RC-5) infrared applications with low voltage supply and large debounce time. SC3010 supports 32 systems. Each system has a maximum of 64 commands; thus, SC3010 can provide up to a total of 2,048 commands. SOP-28 FEATURES * CMOS Technology * Low Voltage Supply * Supports up to 32 systems * Single Pin Oscillator * Bi-phase Transmission Technique * Provides 2,048 Commands DIP-28 APPLICATIONS ORDERING INFORMATION * Television * VCR * Audio Equipment * Multi-Media System * Personal Computer SC3010 SC3010S DIP-28 Package SOP-28 Package PIN CONFIGURATIONS KI7 1 28 VDD SMS 2 27 KI6 C0 3 26 KI5 C1 4 25 KI4 C2 5 24 KI3 C3 6 23 KI2 MDOUT 7 DOUT 8 KO7 9 20 T1 KO6 10 19 T2 KO5 11 18 OSC KO4 12 17 KO0 KO3 13 16 KO1 VSS 14 15 KO2 SC3010 22 KI1 21 KI0 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 1 2002-02-28 Silan Semiconductors SC3010 BLOCK DIAGRAM OSC 18 T1 20 T2 19 SMS 2 C3 6 C2 5 C1 4 C0 3 KI7 1 KI6 27 KI5 26 KI4 25 KI3 24 KI2 23 KI1 22 KI0 21 OSC Test Mode Select Master Reset Generator Mode Selection Decoder Divider Control Unit Command and System Address Latch Keyboard Driver Decoder Keyboard Encoder Output 8 7 DOUT MDOUT Parallel to Serial converter 14 28 Vss VDD 17 KO0 16 KO1 15 KO2 13 KO3 12 KO4 11 KO5 10 KO6 9 KO7 ABSOLUTE MAXIMUM RATING (Tamb=25°C, unless otherwise specified) Characteristic Symbol Value Unit VSS -0.3 ~ 5.5 V VDD=3 V -0.5 ~ VDD+0.5 V VOUT VDD=3 V -0.5 ~ VDD+0.5 V TOPR VDD=3 V -20~85 °C Supply Voltage* VDD Input Voltage* VIN Output Voltage* Operating Temperature Test conditions NOTE: * = with reference to Vss HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 2 2002-02-28 Silan Semiconductors SC3010 ELECTRICAL CHARACTERISTICS (Tamb=25°C, unless otherwise specified) Parameter Symbol Supply Voltage Stand-By Current Input Current(KI0~KI7,C0~C3) High Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2) Low Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2) Input Current Leakage (KI0~KI7,C0~C3) VDD IDD IIN VIH VIL ILEAK1 Input Current Leakage (OSC) ILEAK2 ILEAK3 Input Leakage Current (SMS,T1,T2) ILEAK4 High Level Output Voltage (Dout, MDOUT) Low Level Output Voltage (Dout, MDOUT) Output Current Leakage (Dout, MDOUT) VOH VOL ILEAK5 Low Level Output Voltage (KO0~KO7) Output Current Leakage (KO0~KO7) VOL ILEAK6 Drive Current (Dout, MDout) Operational Frequency Free-Running Frequency ID Fosc1 Fosc2 Test conditions Min Freq=455KHz 2.0 VDD =3V (Output no load) VI=0V T1=0 T2=0 SMS=0 VDD =3V,(KI0~KI7 And 0.7 VDD C0~C3 Connected To VDD) VDD =3V ,( T1,T2,OSC,SMS Connected To VSS) VI=3V VDD=3V T1=T2=High VI=0V VDD=3V T1=T2=High VI=0V VDD=3V T1=T2=High VI=3V VDD=3V T1=T2=High 4.5 VI=3V VDD=3V T=25°C VI=0V VDD=3V T=25°C VDDVDD=3V IOH=0.4mA 0.3 Typ Max Unit 3.0 0 15 5.5 10 600 V µA µA V 0 0 0 15 0 0 0.3 VDD V 1.0 1.0 1.0 30 1.0 1.0 µA µA µA V VDD=3V IOH=0.6mA 0.35 Vo=3V VDD=3V T=25°C Vo=0V VDD=3V T=25°C 10 1 µA VDD=3V IOL=0.3mA 0.8 V 1 10 2 600 100 µA Vo=3V VDD=3V T=25°C Vo=3V VDD=3V T=-25~85°C VDD=3V Vo=1.5V VDD=3V VDD=3V 0 3 1.5 400 50 mA KHz KHz PIN DESCRIPTION Pin No. Symbol I/O Description 1 2 3~6 KI7 SMS C0~C3 IP I IP 7 MDOUT O 8 9~13 14 15~17 18 19 20 21~27 28 DOUT KO7~KO3 VSS KO2~KO0 OSC T2 T1 KI0~KI6 VDD O OD Power OD I I I IP Power Key Sense Input Pin System Mode Selection Input Pin Key Sense Input Pins Generated Output Data Pin modulated with 1/12 oscillator frequency at a 25% duty factor Generated Output Data Pin Scan Driver Pins Negative Power Supply Scan Driver Pins Oscillator Input Pin Test Pin 2 Test Pin 1 Key Sense Input Pins Positive Power Supply NOTE IP= Input with p-channel pull-up transistor; OD = Output with open drain n-channel transistor HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 3 2002-02-28 Silan Semiconductors SC3010 FUNCTIONAL DESCRIPTION 1. KEY INPUT OPERATION A Key Input Operation may be considered legal or illegal depending on the keys pressed. For key interconnection refer to the application circuit diagram in APPLICATION CIRCUIT SECTION. The maximum value of the switched key contact series resistance is 7kΩ. a). Legal Key Input A legal key input operation enables the device to activate the corresponding codes. A key input operation is considered as legal if it is 1). a connection of one K-Input (KI0~KI7) to one K-Output (KO0~KO7), or 2).a connection of one C-Input(C0~C3) to one K-Output (KO0~KO7) when the System Mode Selection (SMS) Pin is in a LOW state. If the SMS is in a HIGH state, then a wired connection must be made between a C-Input to a K-Output in order to generate the system number. For connections consisting of one K-Input or C-Input to more than one K-Output Pins, the last scan signal is recognized as LEGAL. b). Illegal Key Input An illegal key input operation does not produce any activity. No activity will be generated if 1) two or more KInput/C-Input Pins or 2) C-Input and K-Input Pins are activated simultaneously. The oscillator will not start. Thus, this operation is considered as ILLEGAL. 2. INPUTS: KI0~KI7 & C0~C3 In the quiescent state, the command inputs KI0~KI7 are pulled HIGH by an internal pull-up transistor. Also if the system is quiescent and the System Mode Selection Input (SMS) is in High state so that current flow may be prevented. A wired connection in the C-KO Matrix provides 32 systems. 3. DATA OUTPUT One Code MSB Debounce Time Scan Start Bit (16-Bit Time) Time Control (2-Bit Time) Bit LSB MSB System Bits First Code LSB Command Bits Second Code Repetition Time Where: debounce time+ scan time=18 bit-times, Repetition time=4x16 bit-times Figure 1: Data Output Format HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 4 2002-02-28 Silan Semiconductors SC3010 The generated information is transmitted through the output signal DOUT. The Data Output Code consists of 1.5 Start Bits (2xLogic 1), 1 Control Bit, 5 System Bits, and 6 Command Bits. Please refer to the diagram above for the data output format. (See also Command and System Matrixes). After a legal key operation is performed, the KO outputs are switched off and a 16-bit debounce time period is experienced followed by a 2-bit scan cycle time. During the scanning cycle the outputs are switched to the conductive state one at a time. Code is transmitted using a biphase technique. Please refer to the diagram below. The MDOUT Output Signal transmits the generated data modulated by 1/12 of the oscillator frequency with a 25% duty factor. Logic 1 Logic 0 8 where: 1 bit-time=3x2 xTosc=1.688ms (typ. Tosc=1/455KHz) Figure 2: Biphase Code Transmission Technique Both the DOUT and the MDOUT are non-conducting (3-state outputs) when in the quiescent state. The Scan Driver Outputs (KO0~KO7) are open drain n-channel and conduct when the circuit is in the quiescent state. 4. SYSTEM MODES a). Combined System Mode (SMS=Low) The KI and the C Sense Inputs have p-channel pull-up transistors (meaning they are normally in HIGH state). They are pulled to LOW state when an output is connected, to them as a result of a legal key operation. A legal key operation in the KI-KO or C-KO Matrix will initiate a debounce cycle. Once key contact has been established for 18bit time without any interruption, the Oscillator Enable Signal is latched and the key may be released. The device is reset when there is an interruption during the 18-bit time period. At the end of the debounce cycle, KO Outputs are switched off and two scan cycles begins. When KI or C Input senses a low level output, a Latch-Enable Signal is fed to the System (C-Input) or Command (KI-Input) Latches. After latching a system number, the device will generate the last command (i.e. all command bits logic 1) in the selected system for as long as the key is pressed. Latching of a command number causes the chip to generate this command together with the system number stored in the system latch. By releasing the key, the device will be reset if no data is to be transmitted at the time. The complete code frame is transmitted even if the key is released during code transmission. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 5 2002-02-28 Silan Semiconductors SC3010 b). Single System Mode (SMS=High) In the Single System Mode, the KI-Sense Inputs are also pulled High by the p-channel pull-up transistors, as in the Combined System Mode. The C-Sense Inputs, however, are disabled by switching off their pull-high transistors. A system code is provided by a wired connection between the C-KO Matrix. The debounce cycle can ONLY be started by any legal key operation in the KI-KO Matrix. Once the key contact has been established for 18-bit time without any interruption, the Oscillator-Enable Signal is latched and the key may be released. Any interruption during the 18bit time period resets the internal action. At the end of the debounce cycle, the pull-up transistors in the KI-Lines are then switched off and the pull-up transistors in the C-lines are turned ON for the first scan cycle. The wired connection in the C-matrix matrix is then translated into a system number and stored in the system latch. At the end of the first scan cycle, 1) the C-Input pullup transistors are switched off and the inputs are again disabled, 2) KI-Sense Input pull-up transistors are turned on. The command number is generated by the second scan cycle. This command number is then latched and transmitted together with the system number. 5.KEY RELEASE DETECTION An additional control bit is complemented after key release. This additional control bit tells the decoder that the next code is a new command. This feature is important in cases where more digits are needed to be inputted (i.e. Teletext channel numbers or Viewdata pages). The extra control bit will only be complemented after the completion of at least one code transmission. The scan cycles are repeated before every code transmission; thus, even with the Take Over of key operation during the code transmission, the correct system and command numbers are generated. 6.RESETTING THE DEVICE The device will immediately reset under the following conditions: 1). A key is released during the debounce time 2). A key is released between two codes 3). During Matrix Scanning a). A key is released while one of the drivers outputs is in the low ohmic state (Logic 0) b). A key is released before that key has been detected. c). There is no wired connection in the C-KO Matrix when SMS is in High State. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 6 2002-02-28 Silan Semiconductors SC3010 7.OSCILLATOR The OSC is a 1-pin oscillator input/output terminal. The oscillator is constructed by connecting in series a ceramic resonator like TOKO CRK429. 8. TEST MODE When T1,T2 and OSC Pins are in HIGH State, the circuit initializes. All internal nodes except for the LATCH are defined. The latch is defined when a scan cycle starts by pulling down a KI or a C Input while the oscillator is active. 3 If the debounce cycle has been completed, then the scan cycle can be accomplished 3x2 times faster by setting 7 the T1 to HIGH. If the scan cycle has been completed, the Latch contents can be read 3x2 times faster by setting the T2 to HIGH. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 7 2002-02-28 Silan Semiconductors SC3010 SC3010 COMMAND MATRIX DATA CODE The Command Matrix Data Code is given in the table below: No. KI-Line 0 0 • 1 • 2 • 3 • 4 • 5 • 6 • 7 • 1 2 3 4 KO-Line 5 6 7 0 1 2 3 4 Command Bits 5 6 7 • • • • • • • • 8 • 9 • 10 • 11 • 12 • 13 • 14 • 15 • • • • • • • • • 16 • 17 • 18 • 19 • 20 • 21 • 22 • 23 • • • • • • • • • 24 • 25 • 26 • 27 • 28 • 29 • 30 • 31 • • • • • • • • • 5 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 0 0 1 1 1 0 0 0 1 1 1 1 0 1 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 1 1 1 0 1 1 0 0 0 0 1 1 0 0 1 0 1 1 0 1 0 0 1 1 0 1 1 0 1 1 1 0 0 0 1 1 1 0 1 0 1 1 1 1 0 0 1 1 1 1 1 (to be continued) HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 8 2002-02-28 Silan Semiconductors SC3010 (continued) No. KI-Line 0 1 2 3 4 32 • 33 • 34 • 35 • 36 • 37 • 38 • 39 • KO-Line 5 6 7 0 1 2 3 4 Command Bits 5 6 7 • • • • • • • • 40 • 41 • 42 • 43 • 44 • 45 • 46 • 47 • • • • • • • • • 48 • 49 • 50 • 51 • 52 • 53 • 54 • 55 • • • • • • • • • 56 • 57 • 58 • 59 • 60 • 61 • 62 • 63 • • • • • • • • • 5 4 3 2 1 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1 1 1 1 0 1 0 0 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 0 1 1 0 0 1 0 1 1 0 1 1 0 1 1 1 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 0 0 1 0 1 1 0 0 1 1 1 1 0 1 0 0 1 1 0 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 1 0 0 0 1 1 1 0 0 1 1 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1 0 0 1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 9 2002-02-28 Silan Semiconductors SC3010 SC3010 SYSTEM MATRIX DATA CODE The System Matrix Data Code for K-KO Lines are given in the table below: System No. C-Line 0 0 • 1 • 2 • 3 • 4 • 5 • 6 • 7 • 1 2 KO-Line 3 0 1 2 3 4 System Bits 5 6 7 • • • • • • • • 8 • 9 • 10 • 11 • 12 • 13 • 14 • 15 • • • • • • • • • 16 • 17 • 18 • 19 • 20 • 21 • 22 • 23 • • • • • • • • • 24 • 25 • 26 • 27 • 28 • 29 • 30 • 31 • • • • • • • • • 4 3 2 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 10 2002-02-28 Silan Semiconductors SC3010 APPLICATION CIRCUIT 21 KI0 22 KI1 23 KI2 24 KI3 25 KI4 26 KI5 27 KI6 1 KI7 3 C0 4 C1 5 C2 6 C3 17 16 15 13 12 11 10 9 KO0 KO1 KO2 KO3 KO4 KO5 KO6 KO7 VDD 28 F 47 Vss 14 SC3010 MDOUT SMS 7 2 T1 T2 OSC DOUT 20 19 18 8 Resonator VDD IR LED 1 270 ¡ VDD ¡ NOTE: There is a connection between the C0~C3 Lines and KO0~KO7 Lines if SMS is tied to VDD. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 11 2002-02-28 Silan Semiconductors SC3010 CHIP TOPOGRAPHY 25 24 23 22 21 20 19 18 26 27 17 16 15 14 28 13 1 12 2 3 4 5 6 7 8 size: 1.71 x 1.69 mm 9 10 11 2 PAD COORDINATES (Unit: µm) No. Symbol X Y No. Symbol X Y 1 P1 -674.50 -407.50 15 P15 693.50 -49.00 2 P2 -674.50 -554.00 16 P16 693.50 91.00 3 P3 -674.50 -704.00 17 P17 693.50 231.00 4 P4 -450.50 -704.00 18 P18 537.00 680.50 5 P5 -309.75 -704.25 19 P19 386.75 680.50 6 P6 -146.50 -704.25 20 P20 246.75 680.50 7 P7 -18.75 -704.25 21 P21 97.25 680.50 8 P8 221.75 -704.25 22 P22 -42.75 680.50 9 P9 400.25 -704.25 23 P23 -192.25 680.50 10 P10 539.25 -704.25 24 P24 -332.00 680.50 11 P11 679.00 -704.25 25 P25 -481.50 680.50 12 P12 693.50 -468.75 26 P26 -674.50 614.50 13 P13 693.50 -329.00 27 P27 -674.50 449.00 14 P14 693.50 -189.00 28 P28 -674.50 267.375 Note: The original point of the coordinate is the die center. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 12 2002-02-28 Silan Semiconductors SC3010 PCB WIRE LAYOUT SCHEMATIC: Transmitting tube output ground line The transmitting tube ground line and IC ground line should layout separated or overstriking ground line. The above IC only use to hint, not to specified. Note: * In wire layout, the power filter capacitor should near to IC. * In wire layout, should avoid power line and ground line too long. * Recommended infrared transmit unit and IC ground line should layout separated, or overstriking lines. resistor at least. * The emitter of triode connect 1 * Recommended triode use 9014. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 13 2002-02-28 Silan Semiconductors SC3010 PACKAGE OUTLINE DIP-28-600-2.54 UNIT: mm 0.05 2.54 15.24(600) 13.8 0.25 0.25 B B B0.5 B0.3 1.52 3.00MIN 4.96MAX 15 degree 0.5MIN 37.34 B 0.46 0.08 2.16MAX 7.6 0.3 9.525(375) UNIT: mm 0.4 SOP-28-375-1.27 10.2 B B B 1.27 17.75 0.25 B0.1 0.15 B0.05 2.8 MAX 0.45 16.51 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 14 2002-02-28 Silan Semiconductors SC3010 Attach Revision History Data 2001.11.07 2002.02.28 REV Description Page 2.0 2.1 Modify the “Absolute maximum rating “ 2 Modify the “Application circuit “ 11 Add the “PCB wire layout schematic” 13 Modify the “package outline” 14 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 2.1 15 2002-02-28