NTE7443 Integrated Circuit TTL − 4−Line−to−10−Line Excess−3−to−Decimal Decoder Description: The NTE7443 is a monolithic Excess−3−to−Decimal decoder in a 16−Lead plastic DIP type package that consists of eight inverters and ten four−input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all outputs remain off for all invalid input conditions. The NTE7443 Excess−3−to−Decimal decoder features inputs and outputs that are compatible with most TTL and other saturated low−level logic circuits. DC noise margins are typically one volt. Features: D All Outputs are High for Invalid Input Conditions D Diode−Clamped Inputs D Also for Application as: 4−Line−to−16−Line Decoder 3−Line−to−8−Line Decoder Absolute Maximum Ratings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65C to +150C Note 1. Unless otherwise specified, all voltages are referenced to GND. Recommended Operating Conditions: Parameter Supply Voltage High−Level Output Current Low−Level Output Current Operating Temperature Range Symbol VCC IOH IOL TA Min 4.75 − − 0 Typ 5.0 − − − Max 5.25 −800 16 +70 Unit V A mA C Electrical Characteristics: (Note 2, Note 3) Parameter Symbol Test Conditions Min Typ Max Unit High Level Input Voltage VIH 2 − − V Low Level Input Voltage VIL − − 0.8 V Input Clamp Voltage VIK VCC = MIN, II = −12mA − − −1.5 V High Level Output Voltage VOH VCC = MIN, VIH = 2V, VIL = 0.8V, IOH = -800A 2.4 3.4 Low Level Output Voltage VOL VCC = MIN, VIH = 2V, VIL = 0.8V, IOL = 16mA − 0.2 V 0.4 V Input Current II VCC = MAX, VI = 5.5V − − 1 mA High Level Input Current IIH VCC = MAX, VI = 2.4V − − 40 A Low Level Input Current IIL VCC = MAX, VI = 0.4V − − −1.6 mA Short−Circuit Output Current IOS VCC = MAX, Note 4 −18 − −55 mA Supply Current ICC VCC = MAX, Note 5 − 28 56 mA Note 2. .For conditions shown as MIN or MAX, use the appropriate value specified under “Recommended Operation Conditions”. Note 3. All typical values are at VCC = 5V, TA = +25C. Note 4. Not more than one output should be shorted at a time. Note 5. ICC is measured with all outputs open and inputs grounded. Switching Characteristics: (VCC = 5V, TA = +25C unless otherwise specified) Parameter Propagation Delay Time (From A, B, C, or D input Through 2 Levels of Logic) Symbol tPHL Propagation Delay Time (From A, B, C, or D input Through 3 Levels of Logic) Test Conditions Min Typ Max Unit − 14 25 ns tPHL − 17 30 ns Propagation Delay Time (From A, B, C, or D input Through 2 Levels of Logic) tPLH − 10 25 ns Propagation Delay Time (From A, B, C, or D input Through 3 Levels of Logic) tPLH − 17 30 ns RL = 400, CL = 15pF Function Tables: No. 0 1 2 3 4 5 6 7 8 9 Invalid D L L L L L H H H H H H H H L L L Excess−3−Input C B L H H L H L H H H H L L L L L H L H H L H L H H H H L L L L L L H = HIGH Level, L = LOW Level A H L H L H L H L H L H L H L H L 0 L H H H H H H H H H H H H H H H 1 H L H H H H H H H H H H H H H H 2 H H L H H H H H H H H H H H H H 3 H H H L H H H H H H H H H H H H Decimal Output 4 5 H H H H H H H H L H H L H H H H H H H H H H H H H H H H H H H H 6 H H H H H H L H H H H H H H H H 7 H H H H H H H L H H H H H H H H 8 H H H H H H H H L H H H H H H H 9 H H H H H H H H H L H H H H H H Pin Connection Diagram 0 1 16 VCC 1 2 2 3 15 A 14 B 3 4 13 C 4 5 12 D 5 6 11 9 6 7 10 8 GND 8 9 7 16 9 1 8 .870 (22.0) Max .260 (6.6) Max .200 (5.08) Max .100 (2.54) .700 (17.78) .099 (2.5) Min