NJG1692NB2 X-SPDT (DP4T) SWITCH GaAs MMIC I GENERAL DESCRIPTION I PACKAGE OUTLINE The NJG1692NB2 is a GaAs X (cross) – SPDT (DP4T) switch MMIC, which is designed for switching of balanced (differential) dual band filters. The NJG1692NB2 features very low insertion loss, low control voltage and wide frequency coverage. The ESD protection circuits are integrated in the IC to achieve high ESD tolerance. NJG1692NB2 The NJG1692NB2 is assembled in a very small, lead-free, halogen-free, 1.55mm x 1.15mm, 10-pin EPCSP10-B2 package. *) X-SPDT is a paired SPDT switch controlled synchronously. The X-SPDT includes two SPDT switches whose RF lines have a crossing inside the chip. I APPLICATIONS Balanced filter switching application LTE, UMTS, CDMA and GSM Multi-mode or Multi-band applications Mobile phone, Tablet PC, Data card, Router and others mobile device applications I FEATURES G Low operation voltage G Low control voltage G Low insertion loss VDD=2.7V typ. VCTL(H)=1.8V typ. 0.30dB typ. @f=1.0GHz, PIN=0dBm 0.35dB typ. @f=2.0GHz, PIN=0dBm 0.40dB typ. @f=2.7GHz, PIN=0dBm G High isolation 28dB typ. @f=1.0GHz, PIN=0dBm 22dB typ. @f=2.0GHz, PIN=0dBm 19dB typ. @f=2.7GHz, PIN=0dBm G Small and thin package EPCSP10-B2 (Package size: 1.55x1.15x0.55mm) G RoHS compliant and Halogen Free G MSL1 I PIN CONFIGURATION (Top View) PA2 1 PA1 10 VDD 9 NC(GND) PC1 2 8 3 7 GND I TRUTH TABLE PC2 4 PB1 5 PB2 6 VCTL Pin connection 1. PA2 2. NC (GND) 3. GND 4. PB1 5. PB2 6. VCTL 7. PC2 8. PC1 9. VDD 10. PA1 “H”=VCTL(H), “L”=VCTL(L) ON PATH VCTL PC1-PA1,PC2-PA2 H PC1-PB1,PC2-PB2 L NOTE: The Information on this datasheet will be subject to change without notice. Ver.2014-07-16 -1- NJG1692NB2 I ABSOLUTE MAXIMUM RATINGS Ta=+25°C, Zs=Zl=50Ω PARAMETER SYMBOL CONDITIONS RATINGS UNITS RF input power PIN VDD =2.7V, VCTL=0V/1.8V 28 dBm Supply voltage VDD VDD terminal 5.0 V Control voltage VCTL VCTL terminal 5.0 V Four-layer FR4 PCB (101.5mmx114.5mm without through-hole), Tj=150°C 320 mW Power dissipation PD Operating temp. Topr -40~+90 °C Storage temp. Tstg -55~+150 °C -2- NJG1692NB2 I ELECTRICAL CHARACTERISTICS Ta=+25°C, Zs=Zl=50Ω, VDD=2.7V, VCTL(L)=0V, VCTL(H)=1.8V, with application circuit CONDITIONS MIN TYP MAX UNITS PARAMETERS SYMBOL Supply voltage VDD 1.5 2.7 4.5 V Operating current IDD - 13 30 µA Control voltage (LOW) VCTL(L) 0 - 0.45 V Control voltage (HIGH) VCTL(H) 1.35 1.8 4.5 V ICTL - 3 10 µA f=1.0GHz - 0.30 0.45 dB f=2.0GHz - 0.35 0.50 dB Control current Insertion loss 1-1 LOSS1-1 Insertion loss 1-2 LOSS1-2 Insertion loss 1-3 LOSS1-3 f=2.7GHz - 0.40 0.55 dB Insertion loss 2-1 LOSS2-1 f=1.0GHz - 0.30 0.50 dB Insertion loss 2-2 LOSS2-2 f=2.0GHz - 0.40 0.55 dB Insertion loss 2-3 LOSS2-3 f=2.7GHz - 0.45 0.65 dB Isolation 1-1 ISL1-1 f=1.0GHz 26 28 - dB Isolation 1-2 ISL1-2 f=2.0GHz 20 22 - dB Isolation 1-3 ISL1-3 f=2.7GHz 17 19 - dB Isolation 2-1 ISL2-1 f=1.0GHz 25 27 - dB Isolation 2-2 ISL2-2 f=2.0GHz 19 21 - dB Isolation 2-3 ISL2-3 f=2.7GHz 16 18 - dB Isolation 3-1 ISL3-1 f=1.0GHz 26 28 - dB Isolation 3-2 ISL3-2 f=2.0GHz 21 23 - dB Isolation 3-3 ISL3-3 f=2.7GHz 20 22 - dB Input power at 0.2dB compression point P-0.2dB f=2.0GHz 20 24 - dBm VSWR VSWR f=2.0GHz, On port - 1.2 1.4 50% CTL to 10%/90% RF - 1.5 5.0 Switching time TSW PC1-PA1, PC2-PB2 PC1-PB1, PC2-PA2 PC1-PB1, PC2-PA2 PC1-PA1, PC2-PB2 PC1-PC2 µs -3- NJG1692NB2 I TERMINAL INFORMATION No. SYMBOL DESCRIPTION 1 PA2 This port is connected to PC2 terminal by applying High-level (1.35~4.5V) at VCTL terminal. An external capacitor is required to block DC voltage of internal circuit. 2 NC(GND) 3 GND 4 PB1 5 PB2 6 VCTL Control signal input terminal. This terminal is set to high-level (1.35V~4.5V) or low-level (0~0.45V). 7 PC2 Common RF port. This port is connected with either of PA2 or PB2. An external capacitor is required to block DC voltage of internal circuit. 8 PC1 Common RF port. This port is connected with either of PA1 or PB1. An external capacitor is required to block DC voltage of internal circuit. 9 VDD A supply voltage terminal (1.5~4.5V). Please place a bypass capacitor between this terminal and GND for avoiding RF noise from outside. 10 PA1 This port is connected to PC1 terminal by applying High-level (1.35~4.5V) at VCTL terminal. An external capacitor is required to block DC voltage of internal circuit. No connected terminal. This terminal is not connected with internal circuit. Please connect to the PCB ground Plane. Ground terminal. Please connect this terminal with ground plane as close as possible for good RF performance. This port is connected to PC1 terminal by applying Low-level (0~0.45V) VCTL terminal. An external capacitor is required to block DC voltage internal circuit. This port is connected to PC2 terminal by applying Low-level (0~0.45V) VCTL terminal. An external capacitor is required to block DC voltage internal circuit. at of at of -4- NJG1692NB2 I ELECTRICAL CHARACTERISTICS (With application circuit, Loss of external circuit are excluded) Insertion Loss vs. Frequency ( VDD=2.7V ) Insertion Loss (dB) 0.0 PC1-PA1 PC1-PB1 PC2-PA2 PC2-PB2 -0.2 -0.4 -0.6 -0.8 -1.0 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz) VSWR vs. Frequency ( VDD=2.7V, VCTL=1.8V ) 2.0 PC1 Port PC2 Port PB1 Port PB2 Port 1.8 VSWR 1.6 1.4 1.2 1.0 0.5 ( VDD=2.7V, VCTL=0V ) 2.0 PC1 Port PC2 Port PA1 Port PA2 Port 1.8 VSWR VSWR vs. Frequency 1.6 1.4 1.2 1.0 1.5 2.0 2.5 1.0 0.5 3.0 1.0 Frequency (GHz) ( V =2.7V, V DD CTL PC1-PC2 -20 -25 -35 Frequency (GHz) 2.5 PC1-PA1 PC2-PA2 PC1-PC2 -25 -35 2.0 =0V ) -20 -30 1.5 3.0 -15 -30 1.0 CTL -10 -15 -40 0.5 DD -5 PC2-PB2 Isolation (dB) Isolation (dB) ( V =2.7V, V 0 PC1-PB1 -10 2.5 Isolation vs. Frequency =1.8V ) -5 2.0 Frequency (GHz) Isolation vs. Frequency 0 1.5 3.0 -40 0.5 1.0 1.5 2.0 2.5 3.0 Frequency (GHz) -5- NJG1692NB2 I ELECTRICAL CHARACTERISTICS (With application circuit, Loss of external circuit are excluded) Insertion Loss vs. Input Power Insertion Loss vs. Input Power ( f=2GHz, , V =2.7V ) 0.0 Insertion Loss (dB) Insertion Loss (dB) ( f=2GHz, PC1-PA1 ON, VCTL=1.8V ) DD 0.0 -0.5 -1.0 PC1-PA1 PC2-PA2 -1.5 PC1-PB1 -0.5 -1.0 V =1.5V DD V =2V DD V =2.7V DD -1.5 V =3.5V DD PC2-PB2 V =4.5V DD -2.0 10 15 20 Input Power (dBm) 25 30 -2.0 5 10 15 20 25 30 Input Power (dBm) -6- NJG1692NB2 I APPLICATION CIRCUIT PA2 PA1 56pF 56pF VDD 1 10 9 1000pF 2 8 2.7V PC1 56pF 3 7 PC2 56pF VCTL 4 5 6 0/1.8V 56pF 56pF PB1 PB2 I PCB LAYOUT (TOP VIEW) PC1 PC2 PCB: FR-4, t=0.2mm Capacitor Size: 1005 Strip Line Width: 0.4mm PCB Size: 26 x 26mm C4 C5 VDD VCTL C7 Losses of PCB, capacitors and connectors C3 C6 C2 C1 PA1 PB2 PA2 Frequency (GHz) Loss (dB) 1.0 0.33 2.0 0.54 2.7 0.69 PB1 I PARTS LIST PART ID Value COMMENT C1~C6 56pF MURATA (GRM15) C7 1000pF MURATA (GRM15) -7- NJG1692NB2 I PCB LAYOUT (EPCSP10-B2) (TOP VIEW) PCB PKG Terminal PKG Outline GND Via Hole Diameter: φ= 0.2mm I PCB LAYOUT PRECAUTIONS [1] The DC current at RF ports must be equal to zero, which can be achieved with DC blocking capacitors (C1~C6).(However, in case there is no possibility that DC current flows, the DC blocking capacitors are unnecessary, i.e. the RF signals are fed by SAW filters that block DC current by nature, etc.) [2] To reduce stripline influence on RF characteristics, please locate the bypass capacitor (C7) close to VDD terminal. [3] For good isolation, the GND terminals must be connected to the PCB ground plane of substrate, and the through-holes connecting the backside ground plane should be placed near by the pin connection. -8- NJG1692NB2 ■ RECOMMENDED FOOTPRINT PATTERN (EPCSP10-B2) PKG : 1.15mm x 1.55mm Pin pitch : 0.4mm : Land :Mask (Open area) *Metal mask thickness : 100um :Resist(Open area) -9- NJG1692NB2 I PACKAGE OUTLINE (EPCSP10-B2) TOP VIEW Pin1 INDEX SIDE VIEW BOTTOM VIEW Unit : mm Substrate : FR-4 Terminal treat : Au Molding material : Epoxy resin Weight Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. • Do NOT eat or put into mouth. • Do NOT dispose in fire or break up this product. • Do NOT chemically make gas or powder with this product. • To waste this product, please obey the relating law of your country. : 2.0mg [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages. - 10 -