SQPCIE100

TM
Application Specific Crystal Oscillator 5.0 x 3.2mm
SQPCIE100
3.3V HCSL Low Jitter 100MHz PCIe® 2.0 XO
ASSP XO™ for Networking
5.0 x 3.2mm Ceramic SMD
Package:
Product Features
Recommended Land Pattern:
• Provides 100 MHz HCSL output for
interfacing to standard PCIe® devices
• Very low PCIe 2.0 jitter - 1.8ps RMS (typ.)
• Thicker crystal for improved reliability
• Pb-free & RoHS compliant
• Industrial temperature range
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
Product Description
The SQPCIE100 3.3V crystal clock
oscillator achieves superb jitter for PCIe®
1.0 & 2.0 applications. The output clock
signal, generated internally with a patented
oscillator design, is compatible with HCSL
logic levels. The device, available on tape
and reel, is contained in a 5.0 x 3.2mm
surface-mount ceramic package.
Pin Functions:
Applications
• Server
Pin
Function
1
OE Function
2
N/C
3
VEE
4
OUT
5
OUT
6
VCC
• Network Switch/Router
• Telecom Switch
*Extended high frequency power decoupling is recommended (see test circuit for minimum
CREATED USING CADSTD LITE FREEWARE FROM WWW.CADSTD.COM. NON-COMMERCIAL USE ONLY.
recommendation). To ensure optimal performance, do not route RF traces beneath the
• Media Box
package.
• Graphics Card
• Host Bus Adapter
Part Ordering Information:
SQPCIE100
SaRonix-eCera™ is a Pericom® Semiconductor company
•
US: +1-408-435-0800 TW: +886-3-4518888 • www.pericom.com
11-0009
All specifications are subject to change without notice.
SQPCIE100
Rev 05
03/16/11 1
3.3V HCSL Low Jitter 100 MHz PCIe® 2.0 XO SQPCIE100
TM
Application Specific Crystal Oscillator 5.0 x 3.2mm
Electrical Performance
Parameter
Min.
Typ.
2.97
3.30
Output Frequency
Max.
Units
100
Supply Voltage
MHz
3.63
V
Supply Current, Output Enabled
40
mA
Supply Current, Output Disabled
10
mA
Frequency Stability
Operating Temperature Range
-40
Output Logic 0, VOL
-0.15
±50
ppm
See Note 1 below
+85
°C
Industrial
0.9
V
V
Output Logic 1, VOH
Output Load
Rs = 33Ω, Rp = 50Ω, CL = 2pF
Duty Cycle
Notes
45
Typ., HCSL Termination
55
Rise and Fall Time
Jitter, Phase RMS (1-σ)
1.8
Jitter, pk–pk
%
Measured 50% of waveform
0.7
ns
Maximum measured from
VOL = 0.175V to VOH = 0.525V
2.5
ps
As defined by PCI-SIG for PCIe® 2.0
reference clock
40
ps
100,000 random periods
Notes:
1. Stability includes all combinations of operating temperature, load changes, rated input (supply) voltage changes, initial calibration tolerance (25°C),
aging (5 year at 40°C average effective ambient temperature), shock and vibration.
2. For specifications othere than those listed, please contact sales.
Output Enable / Disable Function
Parameter
Min.
Input Voltage (pin 1), Output Enable
Typ.
Max.
0.7*V DD
Input Voltage (pin 1), Output Disable (low power standby)
0.3*V DD
Units
Notes
V
or open
V
Outputs disabled to Hi-Z
Output Disable Delay
200
ns
Output Enable Delay
2
ms
Absolute Maximum Ratings
Parameter
Storage Temperature
Min.
Typ.
-55
Max.
Units
+125
°C
Notes
For the latest product information visit: http://www.pericom.com/products/timing/oscillators/SQPCIE100/
For test circuit go to: http://www.pericom.com/pdf/sre/tc_hcsl.pdf
For soldering reflow profile and reliability test ratings go to: http://www.pericom.com/pdf/sre/reflow.pdf
For tape and reel information go to: http://www.pericom.com/pdf/sre/tr_5032_xo.pdf
SaRonix-eCera™ is a Pericom® Semiconductor company
•
US: +1-408-435-0800 TW: +886-3-4518888 • www.pericom.com
11-0009
All specifications are subject to change without notice.
SQPCIE100
Rev 05
03/16/11 2