PI6C2408-1LIE

PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Features
Description
ÎÎMaximum rated frequency: 140 MHz
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability
to distribute eight outputs of up to 140MHz at 3.3V. Two
banks of four outputs exist, and, depending on product option
ordered, can supply either reference frequency, prescaled half
frequency, or multiplied 2x or 4x input clock frequencies. The
PI6C2408 family has a power-sparing feature: when input SEL2
is 0, the component will 3-state one or both banks of outputs
depending on the state of input SEL1. A PLL bypass test mode
also exists. This product line is available in high-drive and
industrial environment versions.
ÎÎLow cycle-to-cycle jitter
ÎÎInput to output delay, less than 150ps
ÎÎExternal feedback pin allows outputs to be synchronized
to the clock input
ÎÎ5V tolerant CLKIN input
ÎÎOperates at 3.3V VDD
ÎÎ
Test mode allows bypass of the PLL for system testing
purposes (e.g., IBIS measurements)
An external feedback pin is used to synchronize the outputs to
the input; the relationship between loading of this signal and the
other outputs determines the input-output delay.
ÎÎClock frequency multipliers ½x to 4x dependent on option
ÎÎPackaging (Pb-free and Green available):
The PI6C2408 is characterized for both commercial and industrial operation.
àà 16-pin, 150-mil SOIC (W)
àà 16-pin 173-mil TSSOP (L)
Block Diagram
FB_IN
CLKIN
÷2
Pin Configuration
PLL
OUTA1
MUX
Option (-3, -4)
SEL1
SEL2
OUTA3
OUTA4
Decode
Logic
÷2
16
1
15
2
14
3
4 16-Pin 13
5 W, L 12
11
6
10
7
9
8
FB_IN
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
SEL1
OUTB3
PI6C2408 (-1, -1H, -2, -3, -4)
PLL
OUTB1
OUTB2
Option (-2, -3)
FB_IN
CLKIN
CLKIN
OUTA1
OUTA2
VDD
GND
OUTB1
OUTB2
SEL2
OUTA2
OUTB4
OUTA1
MUX
OUTA2
OUTA3
SEL2
SEL1
OUTA4
Decode
Logic
÷2
PI6C2408-6
MUX
OUTB1
OUTB2
OUTB3
OUTB4
11-0005
1
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Input Select Decoding for PI6C2408 (-1, -1H,-4)
SEL2
SEL1
OUTA [1-4]
OUTB [1-4]
Output Source
PLL
0
0
3-State
3-State
PLL
OFF
0
1
PLL
3-State
PLL
ON
1
0
CLKIN
CLKIN
CLKIN
OFF
1
1
PLL
PLL
PLL
ON
Input Select Decoding for PI6C2408 (-2,-3)
SEL2
SEL1
OUTA [1-4]
OUTB [1-4]
Output Source
PLL
0
0
3-State
3-State
PLL
OFF
0
1
PLL
3-State
PLL
ON
1
0
CLKIN
CLKIN/2
CLKIN
OFF
1
1
PLL
PLL
PLL
ON
Input Select Decoding for PI6C2408-6
SEL2
SEL1
OUTA [1-4]
OUTB [1-4]
Output Source
PLL
0
0
3-State
3-State
PLL
OFF
0
1
CLKIN
CLKIN/2
CLKIN
OFF
1
0
PLL
PLL
PLL
ON
1
1
PLL
PLL/2
PLL
ON
PI6C2408 Configurations
Device
Feedback From
OUTA [1-4] Frequency
OUTB [1-4] Frequency
PI6C2408-1
OUTA or OUTB
CLKIN
CLKIN
PI6C2408-1H
OUTA or OUTB
CLKIN
CLKIN
PI6C2408-2
OUTA
CLKIN
CLKIN/2
PI6C2408-2
OUTB
2X CLKIN
CLKIN
PI6C2408-3
OUTA
2X CLKIN
CLKIN or CLKIN(1)
PI6C2408-3
OUTB
4X CLKIN
2X CLKIN
PI6C2408-4
OUTA or OUTB
2X CLKIN
2XCLKIN
PI6C2408-6
OUTA
CLKIN
CLKIN or CLKIN/2
PI6C2408-6
OUTB
CLKIN or 2X CLKIN
CLKIN
Note:
1. Output phase is indeterminant (0° or 180° from CLKIN)
11-0005
2
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Pin Description
Pin
Signal
Description
1
CLKIN
Input clock reference frequency (weak pull-down)
2, 3, 14, 15
OUTA[1-4]
Clock output, Bank A (weak pull-down)
4, 13
VDD
3.3V supply
5, 12
GND
Ground
6, 7, 10 ,11
OUTB[1-4]
Clock output, Bank B (weak pull-down)
8
SEL2
Select input, bit 2 (weak pull-up)
9
SEL1
Select input, bit 1 (weak pull-up)
16
FB_IN
PLL feedback input
Zero Delay and Skew Control
CLKIN - Input to OUTA/OUTB Delay (ps)
CLKIN Input to Output Bank Delay vs. Difference in Loading between FB_IN pin and OUTA/OUTB pins
800
600
400
200
0
-200
-25
-20
-15
-10
0
-5
-400
5
10
15
20
25
PI6C2408-1H
-600
-800
PI6C2408-1,2,3,4,6
-900
-1000
Output Load Difference: FB_IN Load - OUTA/OUTB Load (pF)
The relationship between loading of the FB_IN signal and other outputs determines the input-output delay. Zero delay is achieved
when all outputs, including feedback, are loaded equally.
11-0005
3
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Supply Voltage to Ground Potential...................... –0.5V to +7.0V
Note:
DC Input Voltage (Except CLKIN)............. –0.5V to VDD +0.5V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
DC Input Voltage CLKIN............................................... –0.5 to 7V
Storage Temperature............................................. –65ºC to +150ºC
Maximum Soldering Temperature (10 seconds).................260ºC
Junction Temperature............................................................. 150ºC
Static Discharge Voltage* . .................................................. >2000V
*per MIL-STD-883, Method 3015
Operating Conditions
Parameter
Description
VDD
Supply Voltage
TA
CL
CIN
Min.
Max.
Commercial
3.0
3.6
Industrial
3.135
3.465
Commerical Operating Temperature
0
70
Industrial Operating Temperature
–40
85
Load Capacitance, below 100 MHz
¾
30
Load Capacitance, from 100 MHz to 140MHz
¾
15
Input Capacitance
¾
7
Units
V
ºC
pF
DC Electrical Characteristics for Industrial Temperature Devices
Parameter
Description
VIL
Input LOW Voltage
VIH
Input HIGH Voltage
IIL
Input LOW Current
VIN = 0V
50.0
IIH
Input HIGH Current
VIN = VDD
100.0
VOL
Output LOW Voltage
IOL = 8mA (–1, –2, –3,–4, –6); IOL = 12mA (–1H)
0.4
VOH
Output HIGH Voltage
IOH = –8mA (–1, –2, –3,–4, –6); IOH = –12mA (–1H)
IDD (PD mode)
Pwr Dwn Supply Current
SEL1 = 0 (–1, –2, –3, –4, –1H); SEL2 = 0 (–6)
IDD
Supply Current
11-0005
Test Conditions
Min. Max.
0.8
2.0
2.4
25.0
Unloaded outputs 100 MHz, Select inputs at VDD or
GND
70.0
(–1H)
39.0
Unloaded outputs 33MHz, CLKIN, except (–1H)
20.0
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V
mA
V
mA
54.0
Unloaded outputs 66 MHz, CLKIN, except (–1H)
4
Units
PS8589L mA
04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
AC Electrical Characteristics for Industrial Temperature Devices
Parameters
Name
Test Conditions
FO
Output Frequency
Duty Cycle(1)
(–1, –2, –3, –4, –6)
tDC
Duty Cycle(1) (–1H)
tR
15pF load
Measured at VDD/2, FOUT <66.67MHz 30pF load
Measured at VDD/2, FOUT <140 MHz 15pF load
40
45
Measured at VDD/2, FOUT <66.67MHz 30pF load
45
Measured at VDD/2, FOUT <140 MHz 15pF load
40
60
Measured at VDD/2, FOUT <45MHz 30pF load
45
55
50
55
Measured between 0.8V and 2.0V, 15pF load
1.8
Rise Time (–1H)
Measured between 0.8V and 2.0V, 30pF load
1.6
Fall Time(1)
(–1, –2, –4, –6)
Measured between 0.8V and 2.0V, 30pF load
2.2
Measured between 0.8V and 2.0V, 15pF loa
1.5
Fall Time(1) (–1H)
Measured between 0.8V and 2.0V, 30pF load
1.25
MHz
%
ns
250
All outputs equally loaded
400
ps
t0
Measured at VDD/2
tSK(D)
Device-to-Device Skew(1)
Measured at VDD/2 on FB_IN pins of devices
tSLEW
Output Slew Rate(1)
Measured between 0.8V & 2.0V on –1H device
using Test Crt #2
900
0
500
1
V/ns
Measured at 66.67 MHz, loaded 30pF load
250
Measured at 140 MHz, loaded 15pF load
150
Cycle-to-Cycle Jitter(1)
(–2, –6)
Measured at 66.67 MHz, loaded 30pF load
400
PLL Lock Time(1)
Stable power supply, valid clocks presented on
CLKIN and FB_IN pins
1.0
Cycle-to-Cycle Jitter(1)
(–1, –1H, –4)
Units
60
Measured at VDD/2, FOUT <45 MHz 30pF load
Delay, CLKIN Rising
Edge to FB_IN Rising
Edge(1)
tLOCK
140
2.5
Output Bank A to Output
Bank B Skew(1)
tJIT
100
10
Measured between 0.8V and 2.0V, 30pF load
Output to Output Skew(1)
within same Bank
tSK(O)
30pF load
Typ. Max.
Rise Time(1)
(–1, –2, –4, –6)
(1)
tF
Min.
ps
ms
Notes:
1. See Switching Waveforms on page 7.
11-0005
5
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
DC Electrical Characteristics for Commercial Temperature Devices
Parameter
Description
Test Conditions
Min.
Max.
VIL
Input LOW Voltage
¾
¾
0.8
VIH
Input HIGH Voltage
¾
2.0
¾
IIL
Input LOW Current
VIN = 0V
¾
50
IIH
Input HIGH Current
VIN = VDD
¾
100
VOL
Output LOW Voltage
IOL = 8mA (–1, –2, –3,–4, –6); IOL = 12mA (–1H)
¾
0.4
VOH
Output HIGH Voltage
IOH = –8mA (–1, –2, –3,–4, –6); IOH = –12mA (–1H)
2.4
¾
IDD
(PD mode)
Power Down Supply Current
SEL1 = 0 (-1,-2,-3,-4,-1H); SEL2 = 0 (-6)
¾
12
IDD
Supply Current
Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND
¾
39
IDD
Supply Current
Unloaded outputs 100 MHz Select Inputs @ VDD or GND
¾
54
Units
V
mA
V
mA
mA
AC Electrial Characteristics for Commercial Temperature Device
Parameter
FO
Name
Test Conditions
Min.
30pF load
Output Frequency
Typ.
10
Max.
100
15pF load
140
Duty Cycle(1) (–1H)
Measured at VDD/2, for high drive output
45
50
55
Duty Cycle (–1, –2, –3, –4, –6)
Measured at VDD/2, for normal drive output
40
50
60
Rise Time(1) @30pF
Measured between 0.8V and 2.0V
2.5
Rise Time @15pF
Measured between 0.8V and 2.0V
1.8
Rise Time @30pF (–1H)
Measured between 0.8V and 2.0V
1.5
Fall Time @30pF
Measured between 0.8V and 2.0V
2.2
Fall Time(1) @15pF
Measured between 0.8V and 2.0V
1.5
Fall Time(1) @30pF (–1H)
Measured between 0.8V and 2.0V
1.25
Output-to-Output Skew(1) within same bank
All outputs equally loaded, VDD/2
250
Output Bank A to Output Bank B Skew
All outputs equally loaded, VDD/2
400
t0
Input-to-Output Delay, CLKIN
Rising Edge to FB_IN Rising Edge(1)
Measured at VDD/2
900
tSK(D)
Device to Device Skew(1)
Measured at VDD/2 on FB_IN pins of devices
tSLEW
Output Slew Rate(1)
Measured between 0.8V and 2.0V on –1H device
using Test Circuit #2
tJIT
Cycle-to-Cycle Jitter (1) (–1,–1H,–4)
t DC
tR
(1)
(1)
(1)
tF
tSK(O)
MHz
%
ns
ps
500
1
V/ns
Measured at 66.67 MHz, loaded 30pF output
250
Measured at 140 MHz, loaded 15pF output
150
Cycle-to-Cycle Jitter (–2,–3,–6)
Measured at 66.7 MHz, loaded 30pF output
400
PLL Lock Time(1)
Stable power supply, valid clocks presented on
CLKIN and FB_IN pins
1.0
(1)
tLOCK
0
Units
ps
ms
Notes:
1. See Switching Waveforms on page 7.
11-0005
6
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Switching Waveforms
tHIGH
Duty Cycle Timing
VDD/2
All Outputs Rise/Fall Time
OUTPUT
Output-Output Skew
OUTPUT
VDD/2
2.0V
0.8V
tR
tLOW
tDC =
VDD/2
tHIGH
tHIGH + tLOW
3.3V
2.0V
0.8V
tF
0V
VDD/2
VDD/2
OUTPUT
tSK(O)
Device-Device Skew
OUTPUT Device 1
VDD/2
VDD/2
OUTPUT Device 2
tSK(D)
Input-Output Propagation Delay
INPUT
VDD/2
VDD/2
FB_IN
t0
Test Circuit 1
0.1µF
0.1µF
VDD
OUTPUTS
0.1µF
CLK out
0.1µF
1kW
1kW
VDD
GND
GND
CLK out
10pF
GND
Test Circuit for tSLEW ,Output slew rate on –1H device
Test Circuit for all parameters except tSLEW
11-0005
VDD
OUTPUTS
CLOAD
VDD
GND
Test Circuit 2
7
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Packaging: 16-Pin SOIC (W) DOCUMENT CONTROL NO.
PD - 1004
16
REVISION: E
DATE: 03/09/05
.149
.157
3.78
3.99
1
.0099
.0196
.386
.393
9.80
10.00
.0075
.0098
0-8˚
1
.053
.068
.0155
.0260
0.393
0.660
REF
1.35
1.75
0.41
1.27
SEATING PLANE
.050
BSC
1.27
0.25
x 45˚
0.50
.013
.020
0.330
0.508
0.19
0.25
.016
.050
.2284
.2440
5.80
6.20
.0040 0.10
.0098 0.25
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Notes:
1) Controlling dimensions in millimeters.
2) Ref: JEDEC MS-012D/AC
DESCRIPTION: 16-Pin, 150-Mil Wide, SOIC
PACKAGE CODE: W
Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
11-0005
8
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Packaging: 16-Pin TSSOP (L) DOCUMENT CONTROL NO.
PD - 1310
REVISION: E
16
DATE: 03/09/05
.169
.177
1
1
.0256
BSC
0.65
.193
.201
4.9
5.1
.007
.012
4.3
4.5
.004
.008
.047
max.
1.20
.002
.006
0.09
0.20
0.45 .018
0.75 .030
SEATING
PLANE
.252
BSC
6.4
0.05
0.15
0.19
0.30
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AB
DESCRIPTION: 16-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
11-0005
9
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PS8589L 04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
Ordering Information
Commercial Temperature Device
Ordering Code
Package Code
Description
Operating Range
PI6C2408-3WE
W
Pb-free & Green, 16-pin 150-mil SOIC
Commercial
PI6C2408-1LE
L
Pb-free & Green, 16-pin 173-mil TSSOP
Commercial
PI6C2408-1HLE
L
Pb-free & Green, 16-pin 173-mil TSSOP
Commercial
PI6C2408-4LE
L
Pb-free & Green, 16-pin 173-mil TSSOP
Commercial
PI6C2408-1LE
L
Pb-free & Green 16-pin 173-mil TSSOP
Commercial
PI6C2408-1HLE
L
Pb-free & Green 16-pin 173-mil TSSOP
Commercial
PI6C2408-1HLEX
L
Pb-free & Green, 16-pin 173-mil TSSOP
Commercial
•
Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
•
E = Pb-free and Green
•
Adding an X suffix = Tape/Reel
Industrial Temperature Device
Ordering Code
Package
Description
Operating Range
PI6C2408-3WIE
W
Pb-free & Green, 16-pin 150-mil SOIC
Industrial
PI6C2408-1LIE
L
Pb-free & Green, 16-pin 173-mil TSSOP
Industrial
•
Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
•
E = Pb-free and Green
•
Adding an X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336
11-0005
10
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PS8589L 04/30/10