PI6C2305/PI6C2309 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero-Delay Clock Buffer Product Features Functional Description • • • • Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 200ps Internal feedback allows outputs to be synchronized to the clock input • 5V tolerant input* • Operates at 3.3V VDD • Space-saving Packages: 150-mil SOIC (W) 173-mil TSSOP (L) The PI6C230x is a PLL based, zero-delay buffer, with the ability to distribute five outputs on PI6C2305, nine outputs on PI6C2309 of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output CLK0 performs zero delay by connecting a feedback to PLL. * FB_IN and CLKIN must reference the same voltage thresholds for the PLL to deliver zero delay skewing An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C230X are characterized for both commercial and industrial operation PI6C2309 has two banks of four outputs that can be controlled by the selection inputs, SEL1 & SEL2. It also has a powersparing feature: when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all outputs are referenced from CLKIN. PI6C2305 is an 8-pin version of PI6C2309 without selection inputs. PI6C230X is available in high drive and industrial environment versions. Notice: This device is subject to import restriction. Please refer Block Diagram: PI6C2309 to the Import Restriction Notice under the Ordering Information section. Pin Configuration PI6C2309 OUT0 CLKIN PLL MUX OUTA1 OUTA2 SEL1 SEL2 Decode Logic OUTA4 OUTB1 OUTB2 PI6C2309 (-1, -1H) OUTB3 OUTB4 Block Diagram: PI6C2305 PLL OUT0 OUTA4 OUTA3 VDD GND OUTB4 OUTB3 SEL1 Pin Configuration: PI6C2305 CLKIN CLKIN 16 1 15 2 14 3 16-Pin 13 4 W, L 12 5 11 6 10 7 9 8 CLKIN OUTA1 OUTA2 VDD GND OUTB1 OUTB2 SEL2 OUTA3 OUT0 1 CLK2 2 OUT1 CLK1 3 OUT2 GND 4 8-Pin W, L 8 CLK0 7 CLK4 6 VDD 5 CLK3 OUT3 PI6C2305(–1, –1H) OUT4 1 PS8478B 10/30/01 PI6C2305/PI6C2309 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Input Select Decoding for PI6C2309 SEL2 SEL1 OUTA [1-4] OUTB [1-4] Output Source (OUT0) PLL 0 0 3- State 3- State PLL ON 0 1 PLL 3- State PLL ON 1 0 CLK IN CLK IN CLK IN O FF 1 1 PLL PLL PLL ON Pin Description for PI6C2309 Pin 1 Signal D e s cription C LK IN Input clock reference frequency (weak pull- down) O UTA[1- 4] C lock output, Bank A (weak pull- down) 4 , 13 VDD 3.3V supply 5 , 12 GN D Ground O UTB[1- 4] C lock output, Bank B (weak pull- down) 8 SEL2 Select input, bit 2 (weak pull- up) 9 SEL1 Select input, bit 1 (weak pull- up) 16 O UT0 C lock O utput , internal PLL feedback (weak pull- down) 2 , 3 , 14 , 15 6, 7, 10 ,11 Pin Description for PI6C2305 Pin 1 Signal D e s cription C LK IN Input clock reference frequency (weak pull- down) O UTA[1- 4] C lock output, Bank A (weak pull- down) 4 GN D 3.3V supply 6 VDD 8 O UT0 2, 3, 5, 7 Ground C lock output, internal PLL feedback (weak pull- down) 2 PS8478B 10/30/01 PI6C2305/PI6C2309 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay and Skew Control CLKIN - Input to OUTA/OUTB Delay (ps) CLKIN Input to OUTA/OUTB Delay vs. Difference in Loading between OUT0 pin and OUTA/OUTB pins 800 600 400 200 0 -25 -20 -15 -10 0 -5 5 10 15 20 25 -200 PI6C2305-1H PI6C2309-1H -400 -600 -800 PI6C2309-1 PI6C2305-1 -900 -1000 Output Load Difference: OUT0 - OUTA/OUTB Load (pF) The relationship between loading of the FB_IN signal and other outputs determines the input-output delay. Zero delay is achieved when all outputs, including feedback, are loaded equally. Maximum Ratings Supply Voltage to Ground Potential ............................................................................................................................. 0.5V to +7.0V DC Input Voltage (Except CLKIN) ........................................................................................................................ 0.5V to VDD +0.5V DC Input Voltage CLKIN ...................................................................................................................................................... 0.5 to 7V Storage Temperature ................................................................................................................................................... 65ºC to +150ºC Maximum Soldering Temperature (10 seconds) ........................................................................................................................... 260ºC Junction Temperature .................................................................................................................................................................. 150ºC Static Discharge Voltage (per MIL-STD-883, Method 3015) .................................................................................................... >2000V Operating Conditions (VCC = 3.3V ±0.3V) Parame te r VDD TA CL CIN De s cription Supply Voltage Commerical Operating Temperature Industrial Operating Temperature Load Capacitance, below 100 MHz Load Capacitance, from 100 MHz to 133 MHz Input Capacitance 3 M in. M ax. Units 3.0 3.6 V 0 70 40 85 ¾ ¾ ¾ ºC 30 15 pF 7 PS8478B 10/30/01 PI6C2305/PI6C2309 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics for Industrial Temperature Devices Parame te r D e s cription Te s t Conditions M in. M ax. 0.8 Units VIL Input LO W Voltage VIH Input HIGH Voltage IIL Input LO W Current VIN = 0V 50.0 IIH Input HIGH Current VIN = VDD 100.0 VOL O utput LO W Voltage IOL = 8mA (1); IOL = 12mA (1H) VOH O utput HIGH Voltage IOH = 8mA (1); IOH = 12mA (1H) IDD (PI6C2309) Bypass, PLL O FF SEL1 = 0, SEL2 = 1 25.0 mA IDD Supply Current Unloaded outputs 100 MHz, Select inputs at VDD or GND 54.0 mA Unloaded outputs 66 MHz, CLK IN 39.0 V 2.0 0.4 mA V 2.4 AC Electrical Characteristics for Industial Temperature Devices Parame te rs N ame Te s t Conditions M in. Typ. 30pF load (1, 1H) FO O utput Frequency tDC C ycle(1) 20pF load, (1H) 10 0 10 . 0 13 3 15pF load, (1, 1H) Duty (1 ) Duty C ycle(1) (1H) tR Rise Time(1) (1, Rise Time(1) Fall Time(1) (1) Fall Time(1) 2 , 3 , 4 , ) Measured at VDD/2, FO UT <66.67MHz 30pF load 40. 0 Measured at VDD/2, FO UT <45MHz 15pF load 45. 0 Measured at VDD/2, FO UT <133MHz 15pF load 40. 0 Measured at VDD/2V, FO UT <45MHz 30pF load 45. 0 50 55. 0 60. 0 Measured between 0.8V and 2.0V, 30pF load 2. 2 Measured between 0.8V and 2.0V, 15pF load 1. 5 0 1. 5 0 2. 50 Measured between 0.8V and 2.0V, 15pF load 1. 5 0 Measured between 0.8V and 2.0V, 30pF load 1. 2 5 O utput to O utput Skew (1,1H)(1) All outputs equally loaded 200 t0 Delay, C LK IN Rising Edge to O UT0 Rising Edge(1) Measured at VDD/2 tSK (D) Device- to- Device Skew(1) Measured at VDD/2 on O UT0 pins of devices tSK (O ) tSLEW tJIT tLO CK O utput Slew Rate(1) C ycle- to- C ycle Jitter(1) (1,1H) PLL Lock Time(1) Measured between 0.8V & 2.0V on 1H device using Test C rt #2 % 55. 0 Measured between 0.8V and 2.0V, 30pF load (1H) MHz 60. 0 Measured between 0.8V and 2.0V, 30pF load tF (1H) M ax. Units 0 ± 350 0 600 1 ns ps V/ns Measured at 66.67 MHz, loaded 30pF load 200 Measured at 133 MHz, loaded 15pF load 10 0 Stable power supply, valid clocks presented on C LK IN pin 1. 0 4 PS8478B ps ms Notes: 1.See Switching Waveforms on page 6. 10/30/01 PI6C2305/PI6C2309 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics for Commercial Temperature Devices Parame te r De s cription Te s t Conditions ¾ ¾ VIL Input LOW Voltage VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V IIH Input HIGH Current VIN = VDD VOL Output LOW Voltage VOH M in. M ax. ¾ 0.8 ¾ 2.0 ¾ 50 100 IOL = 8mA (1); IOL = 12mA (1H) ¾ ¾ Output HIGH Voltage IOH = 8mA (1); IOH = 12mA (1H) 2.4 ¾ IDD (PI6C2309) Bypass, PLL off SEL1 = 0 SEL2 = 1 25 IDD Supply Current Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND IDD Supply Current Unloaded outputs 100 MHz Select Inputs @ VDD or GND ¾ ¾ ¾ 0.4 39 54 Units V mA V mA mA AC Electrical Characteristics for Commercial Temperature Device Parame te rs N ame Te s t Conditions M in. Typ. 30pF load (1, 1H) M ax. Units 10 0 FO O utput Frequency tDC Duty C ycle(1) (1H) Measured at VDD/2, FO < 66MHz, 30pF 45 50 55 Duty C ycle (1) Measured at VDD/2, FO < 66MHz, 30pF 40 50 60 20pF load, (1H) 10 13 3 15pF load, (1, 1H) tR tF Rise Time(1) @30pF Rise Time(1) @ 15 p F Rise Time(1) @30pF (1H) Fall Time(1) @ 30pF 1. 5 1. 5 Measured between 0.8V and 2.0V 2. 2 Fall @30pF (1H) 1. 2 5 All outputs equally loaded, VDD/2 Input to O utput Delay, C LK IN Rising Edge to O UT0 Rising Edge(1) Measured at VDD/2 0 ± 350 tSK (D) Device to Device Skew(1) Measured at VDD/2 on O UT0 pins of devices 0 600 tSLEW O utput Slew Rate(1) Measured between 0.8V and 2.0V on 1H device using Test C ircuit #2 C ycle- to- C ycle Jitter(1) (1,1H) Measured at 66.67 MHz, loaded 30pF outputs 200 Measured at 133 MHz, loaded 15pF outputs 10 0 Stable power supply, valid clocks presented on C LK IN pins 1. 0 t0 tJIT tLO CK PLL Lock Time(1) ns 1. 5 O utput to O utput Skew(1) (1,1H) tSK (O ) % 2. 2 Fall Time(1) @15pF Time(1) MHz 200 1 ps V/ns ps ms Notes: 1. See Switching Waveforms on page 6 5 PS8478B 10/30/01 PI6C2305/PI6C2309 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Waveforms thigh Duty Cycle Timing VDD/2 tlow VDD/2 tDC = thigh thigh+tlow VDD/2 All Outputs Rise/Fall Time OUTPUT Output-Output Skew OUTPUT 2.0V 0.8V tR 3.3V 2.0V 0.8V tF 0V VDD/2 VDD/2 OUTPUT tSK(O) Device-Device Skew OUTPUT Device 1 VDD/2 VDD/2 OUTPUT Device 2 tSK(D) Input-Output Propagation Delay INPUT VDD/2 VDD/2 OUTPUT t0 Test Circuit 1 0.1µF Test Circuit 2 0.1µF VDD OUTPUTS CLK out 1kW VDD 1kW CLOAD 0.1µF VDD GND CLK out OUTPUTS 0.1µF VDD GND GND 10pF GND Test Circuit for tSLEW ,Output slew rate on –1H device Test Circuit for all parameters except tSLEW 6 PS8478B 10/30/01 PI6C2305/PI6C2309 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 8-Pin SOIC (W) Package 8 .149 .157 3.78 3.99 .0099 .0196 1 0.25 x 45˚ 0.50 .0075 .0098 0-8˚ .189 .196 4.80 5.00 .016 .026 0.406 0.660 0.19 0.25 0.40 .016 1.27 .050 .053 .068 .2284 .2440 5.80 6.20 1.35 1.75 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 16-Pin SOIC (W) Package 16 .149 .157 3.78 3.99 .0099 .0196 0.25 x 45˚ 0.50 1 .0075 .0098 0-8˚ .386 .393 9.80 10.00 0.41 1.27 .053 .068 .0155 .0260 0.393 0.660 REF 1.35 1.75 SEATING PLANE .050 BSC 1.27 .013 .020 0.330 0.508 0.19 0.25 .016 .050 .2284 .2440 5.80 6.20 .0040 0.10 .0098 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 7 PS8478B 10/30/01 PI6C2305/PI6C2309 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 8-Pin TSSOP (L) Package 16-Pin TSSOP (L) Package 16 .169 .177 4.3 4.5 1 .193 .201 4.9 5.1 .004 .008 .047 max. 1.20 0.45 .018 0.75 .030 SEATING PLANE .0256 BSC 0.65 .007 .012 .002 .006 0.09 0.20 .252 BSC 6.4 0.05 0.15 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS 0.19 0.30 Note: Controlling dimensions in millimeters. Ref: JEDEC MS - 012 AC 8 PS8478B 10/30/01 PI6C2305/PI6C2309 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information PI6C2309 Orde ring Code PI6C2309- 1W PI6C2309- 1HW PI6C2309- 1L PI6C2309- 1HL PI6C2309- 1WI PI6C2309- 1HWI PI6C2309- 1LI PI6C2309- 1HLI Package Name Package Type W16 16- pin 150- mil SOIC Ope rating Range Commercial L16 16- pin TSSO P W16 16- pin 150- mil SOIC Industrial L16 16- pin TSSO P Package Name Package Type W8 8- pin 150- mil SOIC Ordering Information PI6C2305 Orde ring Code PI6C2305- 1W PI6C2305- 1HW PI6C2305- 1L PI6C2305- 1HL PI6C2305- 1WI PI6C2305- 1HWI PI6C2305- 1LI PI6C2305- 1HLI Ope rating Range Commercial L8 8- pin TSSO P W8 8- pin 150- mil SOIC Industrial L18 8- pin TSSO P Import Restriction Notice: Due to an agreement to settle a patent dispute, this device is only available for sale outside of the US and may not be subsequently re-imported into the US as an individual component or as incorporated into equipment. Any sale is expressly conditioned on the customer's agreement not to export the device or any product or equipment containing the device to the United States. Pericom disclaims any liability for indemnity or other obligation or warranty if the devices or any product or equipment containing the devices are imported in violation of this agreement. Pericom Semiconductor Corporation 2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com 9 PS8478B 10/30/01