TSD-2552

TABLE 1: ELECTRICAL SPECIFICATIONS AT 25OC
FIGURE 1: SCHEMATIC DIAGRAM
MIN.
SPEC LIMITS
TYP.
MAX.
UNITS
PRIMARY INDUCTANCE (5-3)
VOLTAGE = 1Vrms
FREQUENCY = 132 KHZ
880
940
1000
HY
3
15
PRIMARY
PARAMETER
TURN RATIO'S:
SEC #1 : PRI
SEC #2 : PRI
BIAS : PRI
----------------------
1 : 8.78
1 : 8.78
1 : 7.0
----------------------
+ 3%
+ 3%
+ 3%
4
SEC #1
9
5
13
1
LEAKAGE INDUCTANCE (5-3)
V = 0.250Vrms, F= 100Khz
TIE SEC'S
--------
--------
25
SEC #2
HY
BIAS
11
7
HIPOT:
PRIMARY & BIAS TO
SEC'S
4000
--------
--------
VRMS
FIGURE 2: PHYSICAL DIMENSIONS INCHES (mm)
16
WHITE DOT
PIN#1 I.D.
9
1
8
22.0
(0.866)
MAX
P
M
3.0
(.120)
typ
25.0
(0.98)
MAX
TSD-2552
YYWW
16.0
(.63)
MAX
2.54
(.100)
1
16
CORE TAPED
15.24
(.600)
8
0.6.
(.023)
20.32
(.800)
NOTE1:
MINIMUM INSULATION SYSTEM REQUIREMENTS:
A)ALL MATERIALS MEET "UL", "CSA" & "IEC" REQUIREMENTS
B)ALL MATERIAL RATED 130 OC OR BETTER.
C)VARNISH FINISHED ASSEMBLY.
9
REV.
DESCRIPTION OF CHANGES
BY
06/27/08
ORIGINAL RELEASE
PP
RoHS
UNLESS OTHERW ISE SPECIFIED
DIMENSIONS ARE IN INCHES
DIMENSIONAL TOLERANCES ARE:
DECIMALS
ANGLES
.XX + .02
+5O
.XXX + .001
DO NOT SCALE DRAWING
TRANSFOMER CONTROL DRAWING
PREMIER P/N: TSD-2552
REVISION: 06/27/08
ENGR: PETER PHAM
REF:
SCALE: NONE
SHEET: 1 OF 1