RENESAS M16C221M4

To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Mitsubishi microcomputers
M30221 Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M30221 group of single-chip microcomputers are built using the high-performance silicon gate CMOS
process using a M16C/60 Series CPU core. The M30221 group has LCD controller/driver. M30221 group is
packaged in a 120-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated
instructions featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of executing instructions at high speed.
Features
• Basic machine instructions .................. Compatible with the M16C/60 series
• Memory capacity .................................. See Figure 1.1.3 Memory Expansion
• Shortest instruction execution time ...... 100ns (f(XIN)=10MHz)
• Supply voltage ..................................... 4.0 to 5.5V (f(XIN)=10MHz)
2.7 to 5.5V (f(XIN)=7MHz with software one-wait)
• Interrupts .............................................. 24 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels(including key input interrupt)
• Multifunction 16-bit timer ...................... Timer A (output) x 8, timer B (input) x 6
• Real time port outputs .......................... 8 bits X 3 lines,6 bits X 1 lines
• Serial I/O .............................................. 2 channels for UART or clock synchronous
• DMAC .................................................. 2 channels (trigger: 24 souces)
• A-D converter ....................................... 10 bits X 7 channels
• D-A converter ....................................... 8 bits X 2 channels
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 83 lines (26 lines are shared with LCD outputs)
• Output port ........................................... 14 lines (14 lines are shared with LCD outpus)
• Input port .............................................. 1 line (P77, shared with NMI pin) Specifications written in this manual
are believed to be accurate, but are
• LCD drive control circuit ....................... 1/2, 1/3 bias
not guaranteed to be entirely free of
2, 3 and 4 duty
error.
4 common outputs
Specifications in this manual may
be changed for functional or
40 segment outputs
performance improvements. Please
built-in charge pump
make sure your manual is the latest
• Key input interrupt ................................ 20 lines
edition.
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Camera, Home appliances, Portable equipment, Audio, office equipment, etc.
------Table of Contents-----Central Processing Unit (CPU) ................................ 9
Reset ...................................................................... 12
Programmable I/O Port .......................................... 18
Electric Characteristics .......................................... 28
Usage precaution peculiar to M30221 Group ........ 41
1
Mitsubishi microcomputers
M30221 Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pin Configuration
Figures 1.1.1 show the pin configurations (top view).
98
99
100
101
102
103
104
67
66
65
64
63
62
76
75
74
73
72
71
70
69
68
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
M30221MX-XXXFP
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
30
24
25
26
27
28
29
P14/KI4
P15/KI5
P16/KI6
P17/KI7
P20/KI8
P21/KI9
P22/KI10
P23/KI11
P24/KI12
P25/KI13
P26/KI14
P27/KI15
P30/KI16
P31/KI17
P32/KI18
P33/KI19
P34
P35
P41/TA0IN
P42/TA1OUT
P46/TA3OUT/INT4
P47/TA3IN/INT4
P50/TB0IN
P51/TB1IN
P52/TB2IN
P53/TB3IN
P56/INT3
P57/CKOUT
P60/CTS0/RTS0
P61/CLK0
P96/AN6
P95/AN5
P94/AN4
P93/AN3
P92/AN2
P91/AN1
P90/AN0
P86/TA7OUT
P84/TA6OUT
P82/TA5OUT
P81/TA4IN/INT5
P80/TA4OUT/INT5
CNVSS
XCIN
XCOUT
RESET
XOUT
VSS
XIN
VCC
P77/NMI
P76/INT2
P75/INT1
P74/INT0
P73/CTS2/RTS2
P72/CLK2
P71/RXD2/SCL(Note)
P70/TXD2/SDA(Note)
P63/TxD0
P62/RxD0
15
16
17
18
19
20
21
22
23
120
1
2
3
P131/DA1
AVSS
P130/ADTRG/DA0
VREF
AVCC
91
92
93
94
95
96
97
4
5
6
7
8
9
10
11
12
13
14
P101/SEG17
P100/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
COM3
COM2
COM1
COM0
C2
C1
VL3
VL2
VL1
87
86
85
84
83
82
81
80
79
78
77
90
89
88
P102/SEG18
P103/SEG19
P110/SEG24
P111/SEG25
P112/SEG26
P113/SEG27
P114/SEG28
P115/SEG29
P116/SEG30
P117/SEG31
P120/SEG32
P121/SEG33
VSS
P122/SEG34
VCC
P123/SEG35
P124/SEG36
P125/SEG37
P00/SEG40
P01/SEG41
P02/SEG42
P03/SEG43
P04/SEG44
P05/SEG45
P06/SEG46
P07/SEG47
P10/KI0
P11/KI1
P12/KI2
P13/KI3
PIN CONFIGURATION (top view)
Note. N channel open-drain output.
Package: 120P6R-A
Figure 1.1.1. Pin configuration for the M30221 group (top view)
2
Mitsubishi microcomputers
M30221 Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Block Diagram
Figure 1.1.2 is a block diagram of the M30221 group.
4
I/O ports
Port P4
4
6
Port P5
1
7
Port P7
Port P6
5
Port P77
Port P8
7
Port P9
M16C/60 series 16-bit CPU core
Registers
R0H
R0L
R0H
R0L
R1H
R1
R1HR
R1L
L
RR2
2
AR3
3
AA0
0
A1
F
1B
FB
Program counter
PC
Stack pointer
ISP
USP
Vector table
INTB
Flag register
ROM
(Note 1)
RAM
(Note 2)
AAAA
AAAA
Multiplier
Port P3
Port P2
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
Figure 1.1.2. Block diagram of M30221 group
3
2
FLG
SB
Memory
Port P13
Port P0
LCD drive control circuit
(4COM X 40SEG)
(8 bits X 2 channels)
6
Port P1
8
UART/clock synchronous SI/O
8
8
4
XIN-XOUT
XCIN-XCOUT
(10 bits X 7 channels
Port P12
D-A converter
(8 bits X 2 channels)
A-D converter
Port P11
Watchdog timer
(15 bits)
DMAC
(2 channels)
8
System clock generator
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TA5 (16 bits)
Timer TA6 (16 bits)
Timer TA7 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Port P10
6
Internal peripheral functions
Mitsubishi microcomputers
M30221 Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is performance outline of M30221 group.
Table 1.1.1. Performance outline of M30221 group
Item
Number of basic instructions
Shortest instruction execution time
Memory
ROM
capacity
RAM
I/O port
P0 to P13 (except P77)
Input port
P77
Output port
SEG2 to SEG15
Multifunction TA0 to TA7
timer
TB0 to TB5
Real time port outputs
Serial I/O
UART0 , UART2
A-D converter
D-A converter
DMAC
LCD
COM0 to COM3
SEG2 to SEG47
Watchdog timer
Interrupt
Clock generating circuit
Supply voltage
Power consumption
I/O withstand voltage (P0 to P13)
I/O charOutput current P1 to P9,P13
acteristics
P0, P10 to P12
Device configuration
Package
Performance
91 instructions
100ns (f(XIN)=10MHz
24 Kbytes
1.5 Kbytes
8 bits x 4, 2 bits x 1, 6 bits x 3, 7 bits x 2
5 bits x 1, 4 bits x 3
1 bit x 1
2 bits x 7
16 bits x 8
16 bits x 6
8 bits x 3 lines,6 bits x 1 lines
(UART or clock synchronous) x 2
10 bits x 7 channels
8 bits x 2 channels
2 channel(trigger:24 sources)
4 lines
40 lines (26 lines are shared with I/O ports)
15 bits x 1 (with prescaler)
24 internal and 8 external sources, 4 software sources
2 built-in clock generation circuits
(built-in feedbackresistor, and external ceramic or
quartz oscillator)
4.0 to 5.5V (f(XIN)=10MHz)
2.7 to 5.5V (f(XIN)=7MHz with software one-wait)
18 mW (Vcc=3.3V, f(XIN)=7MHz with software one-wait)
5V
5 mA
0.1mA("H" output), 2.5mA("L" output)
CMOS silicon gate
120-pin plastic mold QFP
4
Mitsubishi microcomputers
M30221 Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mitsubishi plans to release the following products in the M30221 group:
(1) Support for mask ROM version, flash memory version
(2) Memory capacity
(3) Package
120P6R-A : Plastic molded QFP (mask ROM and flash memory versions)
Figure 1.1.3 shows the memory expansion and figure 1.1.4 shows the Type No., memory size, and package.
April. 2001
RAM
（Byte）
Under development
M30221FCFP
10K
M30221MC-XXXFP
Under planning Under planning 4K
M30221M8-XXXFP
Under planning
2K
1.5K
M30221M4-XXXFP
M30221M3-XXXFP
24K 32K
128K
64K
Figure 1.1.3. Memory expansion
Type No. M30 22 1 M 3
- XXX FP
Package type:
FP:
Package120P6R-A
ROM No.
Omitted for flash memory version
Shows characteristic, use
None: General
ROM capacity:
3 : 24K bytes
4 : 32K bytes
8 : 64K bytes
C : 128K bytes
Memory type:
M : Mask ROM version
F : Flash memory version
Shows pin count, etc.
(The value itself has no specific meaning)
M16C/22 Group(built-in LCDC)
M16C Family
Figure 1.1.4. Type No., memory size, and package
5
ROM
（Byte）
Mitsubishi microcomputers
M30221 Group
Pin Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pin Description
Pin name
Signal name
Function
I/O
VCC, VSS
Power supply
input
CNVSS
CNVSS
I
Connect it to the VSS pin.
RESET
Reset input
I
A “L” on this input resets the microcomputer.
XIN
Clock input
I
XOUT
Clock output
O
XCIN
Clock input
I
XCOUT
Clock output
O
AVCC
Analog power
supply input
This pin is a power supply input for the A-D converter. Connect
it to VCC.
AVSS
Analog power
supply input
This pin is a power supply input for the A-D converter. Connect
it to VSS.
VREF
Reference
voltage input
P00 to P07
I/O port P0
P10 to P17
I/O port P1
P20 to P27
I/O port P2
I/O This is an 8-bit I/O port equivalent to P0. Pins in this port also
function as input pins for the key input interrupt function and real
time port output.
P30 to P35
I/O port P3
I/O This is a 6-bit I/O port equivalent to P0. P30 to P33 also function
as input pins for the key input interrupt function.
P41, P42,
P46, P47
I/O port P4
I/O This is a 4-bit I/O port equivalent to P0. The P41 pin is shared
with timer A0 input. The P42 pin is shared with timer A1
output. The P46 pin is shared with timer A3 output and INT4.
The P47 pin is shared with timer A3 input and INT4.
P50 to P53,
P56, P57
I/O port P5
I/O This is a 6-bit I/O port equivalent to P0. The P50, P51, P52, and
P53 pins are shared with timerB0, B1, B2, and B3 input,
respectively. The P56 pin is shared with INT3. The P57 pin is
shared with CKOUT output.
P60 to P63
I/O port P6
I/O This is an 4-bit I/O port equivalent to P0. The P60 pin is shared
with CTS0 and RTS0. The P61, P62, and P63 pins are shared
with CLK0, RxD0, and TxD0, respectively.
Supply 2.7 to 5.5 V to the VCC pin. Supply 0 V to the VSS pin.
I
These pins are provided for the main clock generating.
circuit.Connect a ceramic resonator or crystal between the XIN
and the XOUT pins. To use an externally derived clock, input it
to the XIN pin and leave the XOUT open.
These pins are provided for the sub clock generating
circuit.Connect a ceramic resonator or crystal between the XCIN
and the XCOUT pins. To use an externally derived clock, input it
to the XCIN pin and leave the XCOUT open.
This pin is a reference voltage input for the A-D converter.
I/O This is an 8-bit CMOS I/O port. It has an input/output port
direction register that allows the user to set each pin for input or
output individually. When set for input, the user can specify in
units of four bits via software whether or not they are tied to a
pull-up resistor. Pins in this port also use as LCD segment
output and real time port output.
I/O This is an 8-bit I/O port equivalent to P0. Pins in this port also
function as input pins for the key input interrupt function and real
time port output.
6
Mitsubishi microcomputers
M30221 Group
Pin Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pin Description
Pin name
P70 to P76
Signal name
I/O port P7
P77
I/O
Function
I/O
P70 to P76 are I/O ports equivalent to P0 (P70 and P71 are N
channel open-drain output).
The P70, P71, and P72 pins are shared with TxD2, RxD2, and
CLK2, respectively. The P73 is shared with CTS2 and RTS2. The
P74, P75 and P76 pins are shared with INT0, INT1 and INT2,
respectively.
P77 is an input-only port that also functions for NMI.
I
P80 to P82,
P84, P86
I/O port P8
I/O
This is a 5-bit I/O port equivalent to P0. The P80 pin is shared
with timer A4 output and INT5 input . The P81 pin is shared with
timer A4 input and INT5 input. The P82 pin is shared with timer
A5 output. The P84 pin is shared with timer A6 output. The P86
pin is shared with timer A7 output.
P90 to P96
I/O port P9
I/O
This is an 7-bit I/O port equivalent to P0. Pins in this port also
function as A-D converter input pins.
P100 to P103
I/O port P10
I/O
This is an 4-bit I/O port equivalent to P0. Pins in this port also
function as SEG output for LCD.
P110 to P117
I/O port P11
I/O
This is an 8-bit I/O port equivalent to P0. Pins in this port also
function as SEG output for LCD.
P120 to P125
I/O port P12
I/O
This is an 6-bit I/O port equivalent to P0. Pins in this port also
function as SEG output for LCD and real time port output.
P130, P131
I/O port P13
SEG2 to
SEG15
I/O This is an 2-bit I/O port equivalent to P0. P130 pins in this port
also function as D-A converter output pins or start trigger for A-D
input pins. P131 pins in this port also function as D-A converter
output pins.
Segment output O Pins in this port function as SEG output for LCD drive circuit.
Pins in this port function as common output for LCD drive circuit.
COM0 to
COM3
Common
output
VL1 to VL3
Power supply
input for LCD
Power supply input for LCD drive circuit.
C1 , C 2
Step-up
condenser
connect port
Pins in this port function as external pin for LCD step-up
condenser. Connect a condenser between C1 and C2.
O
7
Mitsubishi microcomputers
M30221 Group
Memory
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Operation of Functional Blocks
The M30221 group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, real time port, serial I/O, LCD drive control circuit, D-A
converter, A-D converter, DMAC and I/O ports.
Memory
Figure 1.4.1 is a memory map of the M30221 group. The address space extends the 1M bytes from address 0000016 to FFFFF16. From FFFFF16 down is ROM. For example, in the M30221M3-XXXFP, there is
24K bytes of internal ROM from FA00016 to FFFFF16. The vector table for fixed interrupts such as the reset
_______
and NMI are mapped to FFFDC16 to FFFFF16. The starting address of the interrupt routine is stored here.
The address of the vector table for timer interrupts, etc., can be set as desired using the internal register
(INTB). See the section on interrupts for details.
From 0040016 up is RAM. For example, in the M30221M3-XXXFP, 1.5K bytes of internal RAM is mapped
to the space from 0040016 to 009FF6. In addition to storing data, the RAM also stores the stack used when
calling subroutines and when interrupts are generated.
The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for peripheral devices such as I/O ports, A-D converter, serial I/O, timers, and LCD, etc. Figures 1.7.1 to 1.7.3 are
location of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and
cannot be used for other purposes.
The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
0000016
SFR area
For details, see
Figures 1.7.1 to 1.7.3
0040016
Internal RAM area
XXXXX16
RAM size
1.5K
2K
4K
10K
bytes
bytes
bytes
bytes
ROM size
24K
32K
64K
128K
bytes
bytes
bytes
bytes
FFE0016
Address XXXXX16
Special page
vector table
009FF16
00BFF16
013FF16
02BFF16
FFFDC16
Internal RAM area
BRK instruction
Address match
Single step
Address YYYYY16
FA00016
F800016
F000016
E000016
Undefined instruction
Overflow
Watchdog timer
YYYYY16
Internal ROM area
FFFFF16
FFFFF16
Figure 1.4.1. Memory map
8
DBC
NMI
Reset
Mitsubishi microcomputers
M30221 Group
CPU
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Central Processing Unit (CPU)
The CPU has a total of 13 registers shown in Figure 1.5.1. Seven of these registers (R0, R1, R2, R3, A0,
A1, and FB) come in two sets; therefore, these have two register banks.
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
b15
R0(Note)
b8 b7
b15
R1(Note)
R2(Note)
b15
R3(Note)
b15
A0(Note)
b15
A1(Note)
b15
FB(Note)
b8 b7
H
b15
b0
L
H
b19
b0
L
Program counter
Data
registers
b0
b19
INTB
b0
Interrupt table
register
L
H
b15
b0
b0
User stack pointer
USP
b15
b0
b0
b0
PC
b0
Interrupt stack
pointer
ISP
Address
registers
b15
b0
Static base
register
SB
b15
b0
b0
FLG
Frame base
registers
Flag register
A
AAAAAAA
AA
A
AA
A
AA
AA
AA
A
AAAAAAAAAAAAAA
A
AAA
AAA
IPL
U
I O B S Z D C
Note: These registers consist of two register banks.
Figure 1.5.1. Central processing unit register
(1) Data registers (R0, R0H, R0L, R1, R1H, R1L, R2, and R3)
Data registers (R0, R1, R2, and R3) are configured with 16 bits, and are used primarily for transfer and
arithmetic/logic operations.
Registers R0 and R1 each can be used as separate 8-bit data registers, high-order bits as (R0H/R1H),
and low-order bits as (R0L/R1L). In some instructions, registers R2 and R0, as well as R3 and R1 can
use as 32-bit data registers (R2R0/R3R1).
(2) Address registers (A0 and A1)
Address registers (A0 and A1) are configured with 16 bits, and have functions equivalent to those of data
registers. These registers can also be used for address register indirect addressing and address register
relative addressing.
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).
9
Mitsubishi microcomputers
M30221 Group
CPU
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(3) Frame base register (FB)
Frame base register (FB) is configured with 16 bits, and is used for FB relative addressing.
(4) Program counter (PC)
Program counter (PC) is configured with 20 bits, indicating the address of an instruction to be executed.
(5) Interrupt table register (INTB)
Interrupt table register (INTB) is configured with 20 bits, indicating the start address of an interrupt vector
table.
(6) Stack pointer (USP/ISP)
Stack pointer comes in two types: user stack pointer (USP) and interrupt stack pointer (ISP), each configured with 16 bits.
Your desired type of stack pointer (USP or ISP) can be selected by a stack pointer select flag (U flag).
This flag is located at the position of bit 7 in the flag register (FLG).
(7) Static base register (SB)
Static base register (SB) is configured with 16 bits, and is used for SB relative addressing.
(8) Flag register (FLG)
Flag register (FLG) is configured with 11 bits, each bit is used as a flag. Figure 1.5.2 shows the flag
register (FLG). The following explains the function of each flag:
• Bit 0: Carry flag (C flag)
This flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic/logic unit.
• Bit 1: Debug flag (D flag)
This flag enables a single-step interrupt.
When this flag is “1”, a single-step interrupt is generated after instruction execution. This flag is
cleared to “0” when the interrupt is acknowledged.
• Bit 2: Zero flag (Z flag)
This flag is set to “1” when an arithmetic operation resulted in 0; otherwise, cleared to “0”.
• Bit 3: Sign flag (S flag)
This flag is set to “1” when an arithmetic operation resulted in a negative value; otherwise, cleared to “0”.
• Bit 4: Register bank select flag (B flag)
This flag chooses a register bank. Register bank 0 is selected when this flag is “0” ; register bank 1 is
selected when this flag is “1”.
• Bit 5: Overflow flag (O flag)
This flag is set to “1” when an arithmetic operation resulted in overflow; otherwise, cleared to “0”.
• Bit 6: Interrupt enable flag (I flag)
This flag enables a maskable interrupt.
An interrupt is disabled when this flag is “0”, and is enabled when this flag is “1”. This flag is cleared to
“0” when the interrupt is acknowledged.
10
Mitsubishi microcomputers
M30221 Group
CPU
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Bit 7: Stack pointer select flag (U flag)
Interrupt stack pointer (ISP) is selected when this flag is “0” ; user stack pointer (USP) is selected
when this flag is “1”.
This flag is cleared to “0” when a hardware interrupt is acknowledged or an INT instruction of software
interrupt Nos. 0 to 31 is executed.
• Bits 8 to 11: Reserved area
• Bits 12 to 14: Processor interrupt priority level (IPL)
Processor interrupt priority level (IPL) is configured with three bits, for specification of up to eight
processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has priority greater than the processor interrupt priority level (IPL), the interrupt
is enabled.
• Bit 15: Reserved area
The C, Z, S, and O flags are changed when instructions are executed. See the software manual for
details.
AA
AAAAAAA
AA
AA
A
AA
AA
AA
A
AA
AAAAAAAAAAAAAAAA
AA
AA
A
AA
b15
b0
IPL
U
I
O B S Z D C
Flag register (FLG)
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved area
Processor interrupt priority level
Reserved area
Figure 1.5.2. Flag register (FLG)
11
Mitsubishi microcomputers
M30221 Group
Reset
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Reset
There are two kinds of resets; hardware and software. In both cases, operation is the same after the reset.
(See “Software Reset” for details of software resets.) This section explains on hardware resets.
When the supply voltage is in the range where operation is guaranteed, a reset is effected by holding the
reset pin level “L” (0.2VCC max.) for at least 20 cycles. When the reset pin level is then returned to the “H”
level while main clock is stable, the reset status is cancelled and program execution resumes from the
address in the reset vector table.
Figure 1.6.1 shows the example reset circuit. Figure 1.6.2 shows the reset sequence.
5V
4.0V
VCC
0V
RESET
VCC
5V
RESET
0.8V
0V
Figure 1.6.1. Example reset circuit
XIN
More than 20 cycles are needed
RESET
BCLK 24 cycles
BCLK
Content of reset vector
FFFFC16
Address
(Internal Address signal)
FFFFE16
Figure 1.6.2. Reset sequence
____________
Table 1.6.1 shows the statuses of the other pins while the RESET pin level is “L”. Figures 1.6.3 and 1.6.4
show the internal status of the microcomputer immediately after the reset is cancelled.
____________
Table 1.6.1. Pin status when RESET pin level is “L”
Status
Pin name
P0, P10 to P12
Input port(with a pull up resistor)
P1 to P9, P13
Input port (floating)
SEG2 to SEG15
“H” level is output
COM0 to COM3
“H” level is output
12
Mitsubishi microcomputers
M30221 Group
Reset
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(1)Processor mode register 0
(000416)•••
(2)Processor mode register 1
(000516)•••
0
(3)System clock control register 0
(000616)•••
0 0 0 0
(27)Timer A0 interrupt control register
(005516)•••
? 0 0 0
0 0
(28)Timer A1 interrupt control register
(005616)•••
? 0 0 0
0 1 0 0 1 0 0 0
(29)Timer A2 interrupt control register
(005716)•••
? 0 0 0
(4)System clock control register 1
(000716)•••
0 0 1 0 0 0 0 0
(30)Timer A3 interrupt control register
(005816)•••
0 0 ? 0 0 0
(5)Address match interrupt enable register
(000916)•••
0 0
(31)Timer A4 interrupt control register
(005916)•••
0 0 ? 0 0 0
(6)Protect register
(000A16)•••
0 0
(32)Timer B0 interrupt control register
(005A16)•••
? 0 0 0
(7)Watchdog timer control register
(000F16)•••
0 0 0 ? ? ? ? ?
(33)Timer B1 interrupt control register
(005B16)•••
? 0 0 0
(8)Address match interrupt register 0
(001016)•••
0016
(34)Timer B2 interrupt control register
(005C16)•••
? 0 0 0
(001116)•••
0016
(001216)•••
(9)Address match interrupt register 1
0 0 0 0
(001416)•••
0016
(001516)•••
0016
(35)INT0 interrupt control register
(005D16)•••
0 0 ? 0 0 0
(36)INT1 interrupt control register
(005E16)•••
0 0 ? 0 0 0
(37)INT2 interrupt control register
(005F16)•••
0 0 ? 0 0 0
0 0 0 0 0 0
(38)LCD mode register
(012016)•••
0
(39)Segment output enable register
(012216)•••
0 0 0 0 0 0 0 0
0 0 0 0 0 ? 0 0
(40)Key input mode register
(012616)•••
0 1 1 0 0 0 0 0
(003C16)•••
0 0 0 0 0 ? 0 0
(41)Count start flag 1
(034016)•••
0 0 0
(004416)•••
0 0 ? 0 0 0
(42)One-shot start flag 1
(034216)•••
0 0
(13)Timer B5 interrupt control register
(004516)•••
? 0 0 0
(43)Trigger select flag 1
(034316)•••
(14)Timer B4 interrupt control register
(004616)•••
? 0 0 0
(44)Up-down flag 1
(034416)•••
(035616)•••
0016
0016
(001616)•••
0 0 0 0
(10)DMA0 control register
(002C16)•••
(11)DMA1 control register
(12)INT3 interrupt control register
0 0 0
0 0 0
0 0 0 0
0 0 0
0
(15)Timer B3 interrupt control register
(004716)•••
? 0 0 0
(45)Timer A5 mode register
(16)Timer A7 interrupt control register
(004816)•••
? 0 0 0
(46)Timer A6 mode register
(035716)•••
(17)Timer A6 interrupt control register
(004916)•••
? 0 0 0
(47)Timer A7 mode register
(035816)•••
(18)Timer A5 interrupt control register
(004A16)•••
? 0 0 0
(48)Timer B3 mode register
(035B16)•••
0 0 ?
0 0 0 0
(19)DMA0 interrupt control register
(004B16)•••
? 0 0 0
(49)Timer B4 mode register
(035C16)•••
0 0 ?
0 0 0 0
(20)DMA1 interrupt control register
(004C16)•••
? 0 0 0
(50)Timer B5 mode register
(035D16)•••
0 0 ?
0 0 0 0
(21)Key input interrupt control register
(004D16)•••
? 0 0 0
(51)Interrupt cause select register 0
(035E16)•••
(22)A-D conversion interrupt control register
(004E16)•••
? 0 0 0
(52)Interrupt cause select register 1
(035F16)•••
? 0 0 0
(53)Clock division counter control register
(036016)•••
0016
0 0 0 0 0 0 0
0016
0
(23)UART2 transmit interrupt control register
(004F16)•••
(24)UART2 receive interrupt control register
(005016)•••
? 0 0 0
(54)UART2 special mode register 2
(037616)•••
0016
(25)UART0 transmit interrupt control register
(005116)•••
? 0 0 0
(55)UART2 special mode register
(037716)•••
0016
(26)UART0 receive interrupt control register
(005216)•••
? 0 0 0
(56)UART2 transmit/receive mode register
(037816)•••
0016
The content of other registers and RAM is undefined when the microcomputer is
reset. The initial values must therefore be set.
x : Nothing is mapped to this bit
? : Undefined
Figure 1.6.3. Device's internal status after a reset is cleared(1)
13
Mitsubishi microcomputers
M30221 Group
Reset
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(03E216)· · ·
0016
(57)UART2 transmit/receive control register 0 (037C16)· · · 0 0 0 0 1 0 0 0
(83)Port P0 direction register
(58)UART2 transmit/receive control register 1 (037D16)· · · 0 0 0 0 0 0 1 0
(84)Port P1 direction register
(03E316)· · ·
0016
(85)Port P2 direction register
(03E616)· · ·
0016
(86)Port P3 direction register
(03E716)· · ·
0016
(59)Count start flag 0
(038016)· · ·
(60) Clock prescaler reset flag
(038116)· · · 0
(61)One-shot start flag 0
(038216)· · · 0 0
0 0 0 0 0
(87)Port P4 direction register
(03EA16)· · ·
0016
0 0 0 0 0 0
(62)Trigger select flag 0
(038316)· · ·
0016
(88)Port P5 direction register
(03EB16)· · ·
0016
(63)Up-down flag 0
(038416)· · ·
0016
(89)Port P6 direction register
(03EE16)· · ·
0016
(64)Timer A0 mode register
(039616)· · ·
0016
(90)Port P7 direction register
(03EF16)· · ·
(65)Timer A1 mode register
(039716)· · ·
0016
(91)Port P8 direction register
(03F216)· · ·
0016
(66)Timer A2 mode register
(039816)· · ·
0016
(92)Port P9 direction register
(03F316)· · ·
0016
(67)Timer A3 mode register
(039916)· · ·
0016
(93)Port P10 direction register
(03F616)· · ·
0016
(68)Timer A4 mode register
(039A16)· · ·
0016
(94)Port P11 direction register
(03F716)· · ·
0016
(69)Timer B0 mode register
(039B16)· · · 0 0 ?
0 0 0 0
(95)Port P12 direction register
(03FA16)· · ·
0016
(70)Timer B1 mode register
(039C16)· · · 0 0 ?
0 0 0 0
(96)Port P13 direction register
(03FB16)· · ·
(71)Timer B2 mode register
(039D16)· · · 0 0 ?
0 0 0 0
(97)Pull-up control register 0
(03FC16)· · · 0 0 0 0 0 0 1 1
(72)UART0 transmit/receive mode register
(03A016)· · ·
(98)Pull-up control register 1
(03FD16)· · ·
(99)Pull-up control register 2
(03FE16)· · · 1 1 1 1 0 0 0 0
0016
(73)UART0 transmit/receive control register 0 (03A416)· · · 0 0 0 0 1 0 0 0
(74)UART0 transmit/receive control register 1 (03A516)· · · 0 0 0 0 0 0 1 0
(75)UART transmit/receive control register 2
(03B016)· · ·
0 0 0 0 0 0 0
(76)Flash memory control register (Note) (03B416)· · ·
0
(77)DMA0 cause select register
(03B816)· · ·
0016
(78)DMA1 cause select register
(03BA16)· · ·
0016
0 1
(79)A-D control register 2
(03D416)· · ·
0 0 0 0
(80)A-D control register 0
(03D616)· · ·
0 0 0 ? ? ?
(81)A-D control register 1
(03D716)· · ·
(82) D-A control register
(03DC16)· · ·
0016
0 0 0
(100)Real time port control register
0 0 0
0016
0016
(101)Data registers (R0/R1/R2/R3)
···
000016
(102)Address registers (A0/A1)
···
000016
(103)Frame base register (FB)
···
000016
(104)Interrupt table register (INTB)
···
0000016
(105)User stack pointer (USP)
···
000016
(106)Interrupt stack pointer (ISP)
···
000016
(107)Static base register (SB)
···
000016
(108)Flag register (FLG)
···
000016
x : Nothing is mapped to this bit
? : Undefined
The content of other registers and RAM is undefined when the microcomputer is reset. The initial values
must therefore be set.
Note : This register is only exist in flash memory version.
Figure 1.6.4. Device's internal status after a reset is cleared(2)
14
(03FF16)· · ·
0 0 0 0 0 0 0
Mitsubishi microcomputers
M30221 Group
SFR
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
004016
000016
004116
000116
004216
000216
004316
004416
000316
000416
000516
000616
000716
004516
Processor mode register 0 (PM0)
Processor mode register 1(PM1)
System clock control register 0 (CM0)
System clock control register 1 (CM1)
004616
004716
004816
004916
000816
000916
000A16
004A16
Address match interrupt enable register (AIER)
Protect register (PRCR)
000B16
004B16
000C16
004C16
004D16
000D16
000E16
000F16
004E16
Watchdog timer start register (WDTS)
Watchdog timer control register (WDC)
004F16
005016
001016
001116
005116
Address match interrupt register 0 (RMAD0)
001216
005216
001316
005316
005416
001416
001516
005516
Address match interrupt register 1 (RMAD1)
001616
005616
001716
005716
001816
005816
001916
005916
001A16
001B16
001C16
005A16
001D16
005B16
001E16
005C16
001F16
005D16
005E16
002016
002116
DMA0 source pointer (SAR0)
005F16
INT3 interrupt control register (INT3IC)
Timer B5 interrupt control register (TB5IC)
Timer B4 interrupt control register (TB4IC)
Timer B3 interrupt control register (TB3IC)
Timer A7 interrupt control register (TA7IC)
Timer A6 interrupt control register (TA6IC)
Timer A5 interrupt control register (TA5IC)
Bus collision detection interrupt control register (BCNIC)
DMA0 interrupt control register (DM0IC)
DMA1 interrupt control register (DM1IC)
Key input interrupt control register (KUPIC)
A-D conversion interrupt control register (ADIC)
UART2 transmit interrupt control register (S2TIC)
UART2 receive interrupt control register (S2RIC)
UART0 transmit interrupt control register (S0TIC)
UART0 receive interrupt control register (S0RIC)
UART1 transmit interrupt control register (S1TIC)
UART1 receive interrupt control register (S1RIC)
Timer A0 interrupt control register (TA0IC)
Timer A1 interrupt control register (TA1IC)
Timer A2 interrupt control register (TA2IC)
Timer A3 interrupt control register (TA3IC)
INT4 interrupt control register (INT4IC)
Timer A4 interrupt control register (TA4IC)
INT5 interrupt control register (INT5IC)
Timer B0 interrupt control register (TB0IC)
Timer B1 interrupt control register (TB1IC)
Timer B2 interrupt control register (TB2IC)
INT0 interrupt control register (INT0IC)
INT1 interrupt control register (INT1IC)
INT2 interrupt control register (INT2IC)
002216
002316
010016
002416
010116
002516
DMA0 destination pointer (DAR0)
010216
010316
002616
010416
002716
002816
010516
DMA0 transfer counter (TCR0)
002916
010616
002A16
010716
010816
002B16
002C16
010916
DMA0 control register (DM0CON)
002D16
010A16
002E16
010B16
002F16
010C16
003016
010D16
003116
DMA1 source pointer (SAR1)
010E16
003216
010F16
003316
011016
011116
003416
003516
011216
DMA1 destination pointer (DAR1)
003616
011316
003716
011416
003816
003916
011716
012016
LCD mode register (LCDM)
011616
003A16
LCD RAM12(LRAM12)
LCD RAM13(LRAM13)
LCD RAM14(LRAM14)
LCD RAM15(LRAM15)
LCD RAM16(LRAM16)
LCD RAM17(LRAM17)
LCD RAM18(LRAM18)
LCD RAM20(LRAM20)
LCD RAM21(LRAM21)
LCD RAM22(LRAM22)
LCD RAM23(LRAM23)
011516
DMA1 transfer counter (TCR1)
LCD RAM0(LRAM0)
LCD RAM1(LRAM1)
LCD RAM2(LRAM2)
LCD RAM3(LRAM3)
LCD RAM4(LRAM4)
LCD RAM5(LRAM5)
LCD RAM6(LRAM6)
LCD RAM7(LRAM7)
LCD RAM8(LRAM8)
LCD RAM9(LRAM9)
003B16
003C16
DMA1 control register (DM1CON)
003D16
012116
003E16
012216
003F16
012316
012416
Segment output enable register (SEG)
LCD frame frequency counter (LCDTIM)
012516
012616
Key input mode register (KUPM)
Note : Locations in the SFR area where nothing is allocated are reserved areas. Do not access these areas for
read or write.
Figure 1.7.1. Location of peripheral unit control registers (1)
15
Mitsubishi microcomputers
M30221 Group
SFR
034016
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Count start flag 1 (TABSR1)
038016
034116
034216
034316
034416
038116
One-shot start flag 1 (ONSF1)
Trigger select register 1 (TRGSR1)
Up-down flag 1(UDF1)
038216
038316
038416
034516
034616
034716
034816
034916
034A16
034B16
038516
038616
Timer A5 register (TA5)
038716
Timer A6 register (TA6)
038816
Timer A7 register (TA7)
038A16
038916
038B16
034C16
038C16
034D16
038D16
034E16
038E16
034F16
038F16
035016
035116
035216
035316
035416
035516
035616
035716
035816
039016
Timer B3 register (TB3)
039116
039216
Timer B4 register (TB4)
039316
Timer B5 register (TB5)
039416
Timer A5 mode register (TA5MR)
Timer A6 mode register (TA6MR)
Timer A7 mode register (TA7MR)
039616
039516
039716
039816
035916
039916
035A16
035B16
035C16
035D16
035E16
035F16
Count start flag 0 (TABSR0)
Clock prescaler reset flag (CPSRF)
One-shot start flag 0 (ONSF0)
Trigger select register 0 (TRGSR0)
Up-down flag 0 (UDF0)
039A16
Timer B3 mode register (TB3MR)
Timer B4 mode register (TB4MR)
Timer B5 mode register(TB5MR)
Interrupt cause select register 0 (IFSR0)
Interrupt cause select register 1 (IFSR1)
Clock division counter control register (CDCC)
039B16
039C16
039D16
Timer A0 register (TA0)
Timer A1 register (TA1)
Timer A2 register (TA2)
Timer A3 register (TA3)
Timer A4 register (TA4)
Timer B0 register (TB0)
Timer B1 register (TB1)
Timer B2 register (TB2)
Timer A0 mode register (TA0MR)
Timer A1 mode register (TA1MR)
Timer A2 mode register (TA2MR)
Timer A3 mode register (TA3MR)
Timer A4 mode register (TA4MR)
Timer B0 mode register (TB0MR)
Timer B1 mode register (TB1MR)
Timer B2 mode register (TB2MR)
039E16
039F16
03A016
UART0 transmit/receive mode register (U0MR)
036116
03A116
UART0 bit rate generator (U0BRG)
036216
03A216
036316
03A316
UART0 transmit buffer register (U0TB)
036416
03A416
036516
03A516
036616
03A616
036716
03A716
036816
03A816
036916
03A916
036A16
03AA16
036B16
03AB16
036C16
03AC16
036016
036D16
036E16
03AE16
03AF16
037016
03B016
037116
03B116
037216
03B216
037316
03B316
037416
03B416
037516
03B516
037716
037816
037916
037A16
037B16
037C16
037D16
037E16
037F16
UART0 receive buffer register (U0RB)
03AD16
Clock division counter (CDC)
036F16
037616
UART0 transmit/receive control register 0 (U0C0)
UART0 transmit/receive control register 1 (U0C1)
UART2 special mode register 2(U2SMR2)
UART2 special mode register (U2SMR)
03B616
UART2 transmit/receive mode register (U2MR)
UART2 bit rate generator (U2BRG)
03B816
UART2 transmit buffer register (U2TB)
03BA16
UART transmit/receive control register 2 (UCON)
Flash memory control register (FMCR)(Note)
03B716
DMA0 request cause select register (DM0SL)
03B916
DMA1 request cause select register (DM1SL)
03BB16
UART2 transmit/receive control register 0 (U2C0)
UART2 transmit/receive control register 1 (U2C1)
03BC16
UART2 receive buffer register (U2RB)
03BE16
03BD16
03BF16
Note1 : This register is only exist in flash memory version.
Note2 : Locations in the SFR area where nothing is allocated are reserved areas. Do not access these areas for
read or write.
Figure 1.7.2. Location of peripheral unit control registers (2)
16
Mitsubishi microcomputers
M30221 Group
SFR
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
03C016
03C116
03C216
03C316
03C416
03C516
03C616
03C716
03C816
03C916
03CA16
03CB16
03CC16
03CD16
A-D register 0 (AD0)
A-D register 1 (AD1)
A-D register 2 (AD2)
A-D register 3 (AD3)
A-D register 4 (AD4)
A-D register 5 (AD5)
A-D register 6 (AD6)
03CE16
03CF16
03D016
03D116
03D216
03D316
03D416
A-D control register 2 (ADCON2)
03D516
03D616
03D716
03D816
A-D control register 0 (ADCON0)
A-D control register 1 (ADCON1)
D-A register 0 (DA0)
03D916
03DA16
D-A register 1 (DA1)
03DB16
03DC16
D-A control register (DACON)
03DD16
03DE16
03DF16
03E016
03E116
03E216
03E316
03E416
03E516
03E616
03E716
03E816
03E916
03EA16
03EB16
03EC16
03ED16
03EE16
03EF16
03F016
03F116
03F216
03F316
03F416
03F516
03F616
03F716
03F816
03F916
03FA16
03FB16
03FC16
03FD16
03FE16
03FF16
Port P0 register (P0)
Port P1 register (P1)
Port P0 direction register (PD0)
Port P1 direction register (PD1)
Port P2 register (P2)
Port P3 register (P3)
Port P2 direction register (PD2)
Port P3 direction register (PD3)
Port P4 register (P4)
Port P5 register (P5)
Port P4 direction register (PD4)
Port P5 direction register (PD5)
Port P6 register (P6)
Port P7 register (P7)
Port P6 direction register (PD6)
Port P7 direction register (PD7)
Port P8 register (P8)
Port P9 register (P9)
Port P8 direction register (PD8)
Port P9 direction register (PD9)
Port P10 register (P10)
Port P11 register (P11)
Port P10 direction register (PD10)
Port P11 direction register (PD11)
Port P12 register (P12)
Port P13 register (P13)
Port P12 direction register (PD12)
Port P13 direction register (PD13)
Pull-up control register 0 (PUR0)
Pull-up control register 1 (PUR1)
Pull-up control register 2 (PUR2)
Real time port control register (RTP)
Note : Locations in the SFR area where nothing is allocated are reserved areas.
Do not access these areas for read or write.
Figure 1.7.3. Location of peripheral unit control registers (3)
17
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Programmable I/O Ports
There are 83 programmable I/O ports: P0 to P13 (excluding P77). Each port can be set independently for
input or output using the direction register. A pull-up resistance for each block of 4 ports can be set. P77 is
an input-only port and has no built-in pull-up resistance.
Figures 1.19.1 to 1.19.4 show the programmable I/O ports. Figure 1.19.5 shows the I/O pins.
Each pin functions as a programmable I/O port and as the I/O for the built-in peripheral devices.
To use the pins as the inputs for the built-in peripheral devices, set the direction register of each pin to input
mode. When the pins are used as the outputs for the built-in peripheral devices (other than the D-A converter), they function as outputs regardless of the contents of the direction registers. When pins are to be
used as the outputs for the D-A converter, do not set the direction registers to output mode.
(1) Direction registers
These registers are used to choose the direction of the programmable I/O ports. Each bit in these registers corresponds one for one to each I/O pin.
Note: There is no direction register bit for P77.
(2) Port registers
These registers are used to write and read data for input and output to and from an external device. A
port register consists of a port latch to hold output data and a circuit to read the status of a pin. Each bit
in port registers corresponds one for one to each I/O pin.
(3) Pull-up control registers
The pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. When ports
are set to have a pull-up resistance, the pull-up resistance is connected only when the direction register is
set for input. The pull-up resistance is not connected for pins that are set for output from peripheral
functions, regardless of the setting in the pull-up control register. When pull-up is ON for ports P1 and P2,
an intermittent pull-up that pulls up the port for only a set period of time, can be performed from the key
input mode register.
(4) Key input mode register
With bits 0 and 1 of this register, it is possible to select both edges or the fall edge of the key input for P1
and P2. Also, with bit 2, it is possible to make the pull-up for a port (P1 or P2), which is set for pull-up using
the pull-up control register, automatically connect as an intermittent pull-up. And, using the significant 3
bits, the pull-up resistance can be connected to and disconnected from ports P12 and P13.
(5) Real-time port control register
The real-time port control register can be used to set the registers of ports P0, P1, P2 and P12 for realtime port output, whereby output is synchronized with timer overflow of timers A0, A1, A5 and A6 in the
timer mode.
18
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
P00 to P07, P120 to P125
VL3/VCC
Direction register
VL2/VCC
VL3/VCC
LCD drive timing
“1”
“1”
Interface logic
level shift circuit
Data bus
Port latch
Segment output
VL1/VSS
Port/segment
D
Timer A
overflow
Q
Port ON/OFF
CK
P10 to P17, P20 to P27
Intermittent pull-up control
Pull-up selection
Direction register
“1”
Port latch
Data bus
D Q
Timer A
overflow
CK
Q D
CK
P30 to P33, P41, P47, P50 to P53, P56,
P62, P74 to P76, P81
Pull-up selected
Direction register
Data bus
Port latch
P34, P35
Pull-up selection
Direction register
Data bus
Port latch
Figure 1.19.1. Programmable I/O ports (1)
19
Intermittent pull-up control
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pull-up selection
P42, P46, P60, P61,
P72, P73, P80, P82,
P84, P86
Direction register
“1”
Output
Data bus
Port latch
Input respective peripheral functions
Pull-up selection
P57, P63
Direction register
“1”
Output
Data bus
Port latch
Direction register
P70, P71
“1”
Output
Data bus
Port latch
Input respective peripheral functions
P77
Data bus
NMI interrupt input
Figure 1.19.2. Programmable I/O ports (2)
20
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
P90 to P96
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Pull-up selection
Direction register
Data bus
Port latch
Analog input
P100 to P103, P110 to P117
VL3/VCC
Direction register
LCD drive timing
“1”
Interface logic
level shift circuit
Data bus
Port latch
Segment output
VL1/VSS
Port/segment
Port ON/OFF
P130
Pull-up selection
Direction register
Data bus
Port latch
Input respective peripheral functions
Analog output
Figure 1.19.3. Programmable I/O ports (3)
21
VL2/VCC
VL3/VCC
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
P131
Pull-up selection
Direction register
Data bus
Port latch
Analog output
COM0 to COM3, SEG2 to SEG15
VL3
VL2
VL1
The gate input signal of each
transistor is controlled by the
LCD duty ratio and the bias
value.
VSS
Figure 1.19.4. Programmable I/O ports (4)
RESET
RESET signal input
(Note)
Note :
symbolizes a parasitic diode.
Do not apply a voltage higher than VCC to each pin.
Figure 1.19.5. I/O pins
22
Mitsubishi microcomputers
M30221 Group
Programmable I/O Port
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.19.1. Example connection of unused pins in single-chip mode
Pin name
Connection
Ports P0 to P13
(excluding P77)
After setting for output mode, leave these pins open; or after setting for
input mode, connect every pin to VSS via a resistor.(Note1,Note3)
XOUT (Note 2),XCOUT
Open
XCIN
Connect via resistor to VSS (pull-down)
NMI
Connect via resistor to VCC (pull-up)
AVCC
Connect to VCC
AVSS, VREF
Connect to VSS
COM0∼COM3
Open
SEG2∼SEG15
Open
C1, C2
Open
VL2, VL3
Connect to VCC
VL1
Connect to VSS
CNVSS
Connect via resistor to VSS
Note 1: If setting these pins in output mode and opening them, ports are in input mode untill switched into
output mode by use of software after reset. Thus the voltage levels of the pins become unstable,
and there can be instances in which the power source current increases while the ports are in input
mode. In view of an instance in which the contents of the direction registers change due to a
runaway generated by noise or other causes, setting the contents of the direction registers
periodically by use of software increases program reliability.
Note 2: With external clock input to XIN pin.
Note 3: Output "L" if port P70 and P71 are set to output mode.Port P70 and P71 are N channel open drain.
Microcomputer
Port P0 to P13 (except for P77)
(Input mode)
·
(Input mode)
(Output mode)
·
·
·
Open
NMI
VCC
Open
XCOUT
Open
COM0∼COM3
SEG2∼SEG15
Open
AVCC
VL3
VL2
VL1
AVSS
VREF
XCIN
CNVSS
VSS
Figure 1.19.13. Example connection of unused pins
23
Mitsubishi microcomputers
M30221 Group
Usage precaution
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage Precaution
Timer A (timer mode)
(1) Reading the timer Ai register while a count is in progress allows reading, with arbitrary timing, the
value of the counter. Reading the timer Ai register with the reload timing gets “FFFF16”. Reading the
timer Ai register after setting a value in the timer Ai register with a count halted but before the counter
starts counting gets a proper value.
Timer A (event counter mode)
(1) Reading the timer Ai register while a count is in progress allows reading, with arbitrary timing, the
value of the counter. Reading the timer Ai register with the reload timing gets “FFFF16” by underflow
or “000016” by overflow. Reading the timer Ai register after setting a value in the timer Ai register with
a count halted but before the counter starts counting gets a proper value.
(2) When stop counting in free run type, set timer again.
Timer A (one-shot timer mode)
(1) Setting the count start flag to “0” while a count is in progress causes as follows:
• The counter stops counting and a content of reload register is reloaded.
• The TAiOUT pin outputs “L” level.
• The interrupt request generated and the timer Ai interrupt request bit goes to “1”.
(2) The timer Ai interrupt request bit goes to “1” if the timer's operation mode is set using any of the
following procedures:
• Selecting one-shot timer mode after reset.
•Changing operation mode from timer mode to one-shot timer mode.
• Changing operation mode from event counter mode to one-shot timer mode.
Therefore, to use timer Ai interrupt (interrupt request bit), set timer Ai interrupt request bit to “0”
after the above listed changes have been made.
Timer A (pulse width modulation mode)
(1) The timer Ai interrupt request bit becomes “1” if setting operation mode of the timer in compliance with
any of the following procedures:
• Selecting PWM mode after reset.
•Changing operation mode from timer mode to PWM mode.
•Changing operation mode from event counter mode to PWM mode.
Therefore, to use timer Ai interrupt (interrupt request bit), set timer Ai interrupt request bit to “0”
after the above listed changes have been made.
(2) Setting the count start flag to “0” while PWM pulses are being output causes the counter to stop
counting. If the TAiOUT pin is outputting an “H” level in this instance, the output level goes to “L”, and
the timer Ai interrupt request bit goes to “1”. If the TAiOUT pin is outputting an “L” level in this instance,
the level does not change, and the timer Ai interrupt request bit does not becomes “1”.
Timer B (timer mode, event counter mode)
(1) Reading the timer Bi register while a count is in progress allows reading , with arbitrary timing, the
value of the counter. Reading the timer Bi register with the reload timing gets “FFFF16”. Reading the
timer Bi register after setting a value in the timer Bi register with a count halted but before the counter
starts counting gets a proper value.
24
Mitsubishi microcomputers
M30221 Group
Usage precaution
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer B (pulse period/pulse width measurement mode)
(1) If changing the measurement mode select bit is set after a count is started, the timer Bi interrupt
request bit goes to “1”.
(2) When the first effective edge is input after a count is started, an indeterminate value is transferred to
the reload register. At this time, timer Bi interrupt request is not generated.
Real time port
(1) Make sure timer Ai for real time port output is set for timer mode, and is set to have “no gate function”
using the gate function select bit.
(2) Before setting the real time port mode select bit to “1”, temporarily turn off the timer Ai used and write
its set value to the timer Ai register.
Sirial I/O
(1) In case IIC mode select bit (bit 0 of address 037716) is set to "1" with UART2.When setting up port
direction P7 (address 03EF16), write immediate values. If you use Read/Modify/Write instructions
(BSET,BCLR,AND,OR,etc..) on the P7 direction register, the value of P71 direction register may
change to unknown data.
(2) MASK ROM version ONRY when IIC mode select bit (bit 0 of address 037716) and the internal/
external select bit (bit 3 of address 037816) are both set to "1". The function of "SCL wait output bit 2
(bit 5 of address 037616)" dose not work.
(3) MASK ROM version ONRY when IIC mode select bit (bit 0 of address 037716) and the internal/
external select bit (bit 3 of address 037816) are both set to "1". According to the datasheet, when IICM
is set to "1", the port terminal is readable by the CPU even though "1" is assigned to P71 of the
direction register. However, the CPU cannot read port P71 data if the P71 direction register is set to
"1".
A-D Converter
(1) Write to each bit (except bit 6) of A-D control register 0, to each bit of A-D control register 1, and to bit
0 of A-D control register 2 when A-D conversion is stopped (before a trigger occurs).
In particular, when the Vref connection bit is changed from “0” to “1”, start A-D conversion after an
elapse of 1 µs or longer.
(2) When changing A-D operation mode, select analog input pin again.
(3) Using one-shot mode or single sweep mode
Read the correspondence A-D register after confirming A-D conversion is finished. (It is known by AD conversion interrupt request bit.)
(4) Using repeat mode, repeat sweep mode 0 or repeat sweep mode 1
Use the undivided main clock as the internal CPU clock.
Stop Mode and Wait Mode
____________
(1) When returning from stop mode by hardware reset, RESET pin must be set to “L” level until main clock
oscillation is stabilized.
(2) When switching to either wait mode or stop mode, instructions occupying four bytes either from the
WAIT instruction or from the instruction that sets the every-clock stop bit to “1” within the instruction
queue are prefetched and then the program stops. So put at least four NOPs in succession either to
the WAIT instruction or to the instruction that sets the every-clock stop bit to “1”.
(3) When the MCU running in low-speed or low power dissipation mode, do not enter WAIT mode with
peripheral function clock stop bit (CM02) set to "1".
25
Mitsubishi microcomputers
M30221 Group
Usage precaution
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
(1) Reading address 0000016
• When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number
and interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 0000016 will then be set to “0”.
Reading address 0000016 by software sets enabled highest priority interrupt source request bit to “0”.
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 0000016 by software.
(2) Setting the stack pointer
• The value of the stack pointer immediately after reset is initialized to 000016. Accepting an
interrupt before setting a value in the stack pointer may become a factor of runaway. Be sure to
set a value in the stack pointer before accepting an interrupt.
_______
When using the NMI interrupt, initialize the stack point at the beginning of a program. Concerning
_______
the first instruction immediately after reset, generating any interrupts including the NMI interrupt is
prohibited.
_______
(3) The NMI interrupt
_______
_______
• The NMI interrupt can not be disabled. Be sure to connect NMI pin to Vcc via a pull-up resistor if
unused.
_______
• Do not get either into stop mode with the NMI pin set to “L”.
(4) External interrupt
• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set
to "1". After changing the polarity, set the interrupt request bit to "0".
26
Mitsubishi microcomputers
M30221 Group
Usage precaution
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(5) Rewrite the interrupt control register
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
Example 1:
INT_SWITCH1:
FCLR
I
AND.B #00h, 0055h
NOP
NOP
FSET
I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Four NOP instructions are required when using HOLD function.
; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR
I
AND.B #00h, 0055h
MOV.W MEM, R0
FSET
I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Dummy read.
; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG
FCLR
I
AND.B #00h, 0055h
POPC FLG
; Push Flag register onto stack
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,
the interrupt request bit is not set sometimes even if the interrupt request for that register has
been generated. This will depend on the instruction. If this creates problems, use the below instructions to change the register.
Instructions : AND, OR, BCLR, BSET
27
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.21.1. Absolute maximum ratings
Parameter
Symbol
Vcc
AVcc
Supply voltage
Analog supply voltage
VI
Input
voltage
Condition
Vcc=AVcc
Vcc=AVcc
RESET, VREF, XIN
P00 to P07, P10 to P17, P20 to P27,
P30 to P35, P41 ,P42, P46, P47,
P50 to P53, P56, P57, P60 to P63,
P72 to P77, P80 to P82, P84, P86,
P90 to P96, P100 to P103,
P110 to P117, P120 to P125,
P130, P131
(Mask ROM version CNVss)
Rated value
V
V
– 0.3 to Vcc+0.3
V
VL1
– 0.3 to VL2
VL2
VL1 to VL3
VL3
Unit
– 0.3 to 6.5
– 0.3 to 6.5
VL2 to 6.5
– 0.3 to 6.5
P70, P71, C1, C2
(flash memory version CNVss)
VO
Output
voltage
P10 to P17, P20 to P27, P30 to P35,
P41, P42, P46, P47, P50 to P53,
P56, P57, P60 to P63, P72 to P76,
P80 to P82, P84, P86, P90 to P96,
P130, P131, XOUT
P00 to P07, P100 to P103,
P110 to P117, P120 to P125
– 0.3 to Vcc+0.3
When output port
– 0.3 to Vcc
When segment output
– 0.3 to VL3
P70, P71
V
– 0.3 to 6.5
Pd
Power dissipation
Operating ambient temperature
300
– 20 to 85
mW
Topr
Tstg
Storage temperature
– 40 to 150
°C
Ta = 25°C
28
°C
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.21.2. Recommended operating conditions (referenced to VCC = 2.7V to 5.5V at Ta = – 20 to 85oC
unless otherwise specified)
Symbol
Parameter
2.7
Vcc
Supply voltage
AVcc
Vss
Analog supply voltage
Analog supply voltage
Analog supply voltage
AVss
VIH
VIL
HIGH input
voltage
LOW input
voltage
IOH (peak) HIGH peak
output current
(Note 2)
IOH (avg)
IOL (peak)
IOL (avg)
Min.
5.5
0
V
Vcc
0.2Vcc
–0.5
V
mA
–10.0
–0.1
HIGH average P00 to P07, P100 to P103, P110 to P117, P120 to P125
output current P10 to P17, P20 to P27, P30 to P35, P41, P42, P46, P47,
(Note 1)
P50 to P53, P56, P57, P60 to P63, P72 to P76, P80 to P82, P84,
P86, P90 to P96, P130, P131,
LOW peak
P00 to P07, P100 to P103, P110 to P117, P120 to P125
output current
P10 to P17, P20 to P27, P30 to P35, P41, P42, P46, P47,
(Note 2)
P50 to P53, P56, P57, P60 to P63, P70 to P76, P80 to P82, P84,
P86, P90 to P96, P130, P131,
LOW average P00 to P07, P100 to P103, P110 to P117, P120 to P125
output current
P10 to P17, P20 to P27, P30 to P35, P41, P42, P46, P47,
(Note 1)
P50 to P53, P56, P57, P60 to P63, P70 to P76, P80 to P82, P84,
P86, P90 to P96, P130, P131,
VCC=4.0V to 5.5V
0
VCC=2.7V to 4.0V
0
VCC=4.0V to 5.5V
0
VCC=2.7V to 4.0V
0
With wait
V
6.5
P00 to P07, P100 to P103, P110 to P117, P120 to P125
P10 to P17, P20 to P27, P30 to P35, P41, P42, P46, P47,
P50 to P53, P56, P57, P60 to P63, P72 to P76, P80 to P82, P84,
P86, P90 to P96, P130, P131,
Main clock input
oscillation frequency
V
V
V
0.8Vcc
P70, P71
P00 to P07, P10 to P17, P20 to P27, P30 to P35, P41, P42, P46,
0
P47, P50 to P53, P56, P57, P60 to P63, P70 to P77, P80 to P82,
P84, P86, P90 to P96, P100 to P103, P110 to P117, P120 to P125,
P130, P131, XIN, RESET, CNVSS
(Note 3)
f (XcIN)
5.0
Unit
Vcc
0
P00 to P07, P10 to P17, P20 to P27, P30 to P35, P41, P42, P46,
0.8Vcc
P47, P50 to P53, P56, P57, P60 to P63, P72 to P77, P80 to P82,
P84, P86, P90 to P96, P100 to P103, P110 to P117, P120 to P125,
P130, P131, XIN, RESET, CNVSS
No wait
f (XIN)
Standard
Typ.
Max.
mA
–5.0
5.0
10.0
mA
2.5
mA
5.0
Subclock oscillation frequency
32.768
10
5 X VCC
–10.000
10
2.31 X VCC
+0.760
50
MHz
MHz
MHz
MHz
kHz
AAAA
AAAA
AAAA
AAAA
Main clock input oscillation frequency
(No wait)
10.0
5 X Vcc–10.000MHz
3.5
0.0
2.7
4.0
5.5
Supply voltage [V]
(BCLK: no division)
29
Operating maximum frequency [MHZ]
Operating maximum frequency [MHZ]
Note 1: The mean output current is the mean value within 100ms.
Note 2: The total IOL (peak) for ports P0, P1, P2, P30 to P35, P4, P5, P6, P70 to P76 and P122 to P127 must be 80mA max. The total
IOH (peak) for ports P0, P1, P2, P30 to P35, P4, P5, P6, P72 to P76 and P122 to P127 must be 80mA max. The total IOL (peak)
for ports P8, P9, P10, P11, P120, P121 and P130 to P132 must be 80mA max. The total IOH (peak) for ports P8, P9, P10, P11,
P120,P121 and P130 to P132 must be 80mA max.
Note 3: Relationship between main clock oscillation frequency and supply voltage.
AAAA
AAAA
AAAA
AAAA
Main clock input oscillation frequency
(With wait)
10.0
7.0
0.0
2.31 X VCC+0.760MHz
2.7
4.0
Supply voltage [V]
(BCLK: no division)
5.5
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 5V
Table 1.21.3. Electrical characteristics (referenced to VCC = 5V, VSS = 0V at Ta = 25oC, f(XIN)=10MHZ
unless otherwise specified)
Symbol
Parameter
Measuring condition
Standard
Min. Typ. Max.
VOH
HIGH output P00 to P07, P100 to P103,
voltage
P110 to P117, P120 to P125
IOH= –0.1mA
3.0
VOH
HIGH output P10 to P17, P20 to P27, P30 to P35,
IOH= –5mA
voltage
P41, P42, P46, P47, P50 to P53, P56, P57,
P60 to P63, P72 to P76, P80 to P82,
IOH= –200µA
P84, P86, P90 to P96, P130, P131
3.0
VOH
VOH
VOL
VOL
VOL
VT+-VT-
HIGH output
voltage
XOUT
HIGH output
voltage
XCOUT
LOW output XOUT
voltage
LOW output XCOUT
voltage
Hysteresis
IOH= –1mA
3.0
IOH= –0.5mA
3.0
HIGHPOWER
With no load applied
3.0
LOWPOWER
With no load applied
1.6
V
IOL=5mA
V
2.0
IOL=200µA
IOH=1mA
2.0
LOWPOWER
IOH=0.5mA
2.0
HIGHPOWER
With no load applied
0
LOWPOWER
With no load applied
0
TA0IN, TA3IN, TA4IN, TB0IN to TB3IN,
INT0 to INT5, ADTRG, CTS0, CLK0, NMI,
TA3OUT, TA4OUT, TA7OUT,
KI0 to KI15 (Note), KI16 to KI19
IIH
HIGH input P00 to P07, P10 to P17, P20 to P27,
P30 to P35, P41, P42, P46, P47,
current
P50 to P53, P56, P57, P60 to P63,
P70 to P77, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
XIN, RESET, CNVSS
LOW input P00 to P07, P10 to P17, P20 to P27,
current
P30 to P35, P41, P42, P46, P47,
P50 to P53, P56, P57, P60 to P63,
P70 to P77, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
XIN, RESET, CNVSS
P00 to P07, P10 to P17, P20 to P27,
Pull-up
resistance P30 to P35, P41, P42, P46, P47,
P50 to P53, P56, P57, P60 to P63,
P72 to P76, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
V
0.45
HIGHPOWER
Hysteresis
RPULLUP
V
4.7
HIGHPOWER
VT+-VT-
IIL
V
LOWPOWER
LOW output P00 to P07, P10 to P17, P20 to P27,
P30 to P35, P41, P42, P46, P47,
voltage
P50 to P53, P56, P57, P60 to P63,
P70 to P76, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131
Unit
V
V
0.2
0.8
V
0.2
1.8
V
VI=5V
5.0
µA
VI=0V
–5.0
µA
RESET
VI=0V
30.0
50.0
167.0
k
RfXIN
Feedback resistance
XIN
1.0
M
RfXCIN
Feedback resistance
XCIN
6.0
M
VRAM
RAM retention voltage
When clock is stopped
Note : Has no effect during intermittent pullup operation.
30
2.0
V
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 5V
Table 1.21.4. Electrical characteristics (referenced to VCC = 5V, VSS = 0V at Ta = 25oC, f(XIN)=10MHZ
unless otherwise specified)
Parameter
Symbol
Measuring condition
Min.
f(XIN)=10MHz
19.0
Square wave, no division
I/o pin is no
load applied
Mask ROM
version
f(XCIN)=32kHz
Square wave
Flash memory f(XCIN)=32kHz
version
Square wave
Power supply current
Icc
Standard
Typ. Max. Unit
f(XCIN)=32kHz
When a WAIT instruction is executed
Supply voltage (VL1)
When voltage multiplier used
IL1
Power supply current (VL1)
VL1=1.7V,f(LCDCK)=200Hz
mA
90.0
µA
200.0
µA
4.0
µA
When clock is stopped
Ta=25 ºC
When clock is stopped
Ta=85 ºC
VL1
38.0
1.0
µA
20.0
1.3
1.7
2.1
V
3.0
6.0
µA
Table 1.21.5. A-D conversion characteristics (referenced to VCC = AVCC = VREF = 5V, Vss = AVSS = 0V
at Ta = 25oC, f(XIN) = 10MHZ unless otherwise specified)
Symbol
–
–
Parameter
VREF =VCC
10
Sample & hold function not available
VREF =VCC = 5V
±3
Bits
LSB
Sample & hold function available(10bit)
VREF =VCC= 5V
±3
LSB
Sample & hold function available(8bit)
VREF = VCC = 5V
±2
LSB
VIA
Analog input voltage
tSAMP
Unit
Absolute
accuracy
VREF
tCONV
Standard
Min. Typ. Max.
Resolution
Ladder resistance
Conversion time(10bit)
Conversion time(8bit)
Sampling time
Reference voltage
RLADDER
tCONV
Measuring condition
VREF =VCC
10
40
k
3.3
µs
2.8
µs
µs
0.3
2
VCC
V
0
VREF
V
Table 1.21.6. D-A conversion characteristics (referenced to VCC = AVCC =VREF =5V, VSS = AVSS =
0V at Ta = 25oC, f(XIN) = 10MHZ unless otherwise specified)
Symbol
tsu
RO
IVREF
Parameter
Resolution
Absolute accuracy
Setup time
Output resistance
Reference power supply input current
Measuring condition
(Note)
Standard
Typ. Max.
8
1.0
3
4
10
20
1.5
Min.
Unit
Bits
%
µs
k
mA
Note: This applies when using one D-A converter, with the D-A register for the unused D-A converter set to “0016”.
The A-D converter's ladder resistance is not included.
Also, when the Vref is unconnected at the A-D control register, IVREF is sent.
31
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 5V
Timing requirements (referenced to VCC = 5V, VSS = 0V at Ta = 25oC unless otherwise specified)
Table 1.21.7. External clock input
Symbol
tc
tw(H)
tw(L)
tr
tf
Standard
Min.
Max.
Parameter
External clock input cycle time
External clock input HIGH pulse width
External clock input LOW pulse width
External clock rise time
External clock fall time
100
40
40
15
15
Unit
ns
ns
ns
ns
ns
Table 1.21.8. Timer A input (counter input in event counter mode)
Symbol
Standard
Max.
Min.
Parameter
Unit
ns
100
tc(TA)
tw(TAH)
TAiIN input HIGH pulse width
40
ns
tw(TAL)
TAiIN input LOW pulse width
40
ns
TAiIN input cycle time
Table 1.21.9. Timer A input (gating input in timer mode)
Standard
Max.
Min.
400
Parameter
Symbol
tc(TA)
TAiIN input cycle time
tw(TAH)
tw(TAL)
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
Unit
ns
ns
ns
200
200
Table 1.21.10. Timer A input (external trigger input in one-shot timer mode)
Standard
Parameter
Symbol
tc(TA)
TAiIN input cycle time
tw(TAH)
tw(TAL)
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
Min.
Max.
200
100
100
Unit
ns
ns
ns
Table 1.21.11. Timer A input (external trigger input in pulse width modulation mode)
tw(TAH)
tw(TAL)
Standard
Max.
Min.
100
100
Parameter
Symbol
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
Unit
ns
ns
Table 1.21.12. Timer A input (up/down input in event counter mode)
tc(UP)
TAiOUT input cycle time
Standard
Max.
Min.
2000
tw(UPH)
tw(UPL)
TAiOUT input HIGH pulse width
TAiOUT input LOW pulse width
1000
1000
ns
tsu(UP-TIN)
th(TIN-UP)
TAiOUT input setup time
TAiOUT input hold time
400
400
ns
ns
Symbol
Parameter
32
Unit
ns
ns
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 5V
Timing requirements (referenced to VCC = 5V, VSS = 0V at Ta = 25oC unless otherwise specified)
Table 1.21.13. Timer B input (counter input in event counter mode)
Symbol
Standard
Parameter
Min.
Unit
Max.
tc(TB)
tw(TBH)
TBiIN input cycle time (counted on one edge)
TBiIN input HIGH pulse width (counted on one edge)
100
40
ns
ns
tw(TBL)
TBiIN input LOW pulse width (counted on one edge)
TBiIN input cycle time (counted on both edges)
40
200
ns
tc(TB)
tw(TBH)
tw(TBL)
TBiIN input HIGH pulse width (counted on both edges)
TBiIN input LOW pulse width (counted on both edges)
ns
ns
80
80
ns
Table 1.21.14. Timer B input (pulse period measurement mode)
Symbol
Standard
Parameter
Max.
Min.
Unit
tc(TB)
TBiIN input cycle time
400
ns
tw(TBH)
tw(TBL)
TBiIN input HIGH pulse width
TBiIN input LOW pulse width
200
200
ns
ns
Table 1.21.15. Timer B input (pulse width measurement mode)
Symbol
Standard
Parameter
Min.
tc(TB)
TBiIN input cycle time
tw(TBH)
tw(TBL)
TBiIN input HIGH pulse width
400
200
TBiIN input LOW pulse width
200
Max.
Unit
ns
ns
ns
Table 1.21.16. A-D trigger input
Symbol
tc(AD)
tw(ADL)
Standard
Parameter
Min.
ADTRG input cycle time (trigger able minimum)
ADTRG input LOW pulse width
Max.
Unit
1000
ns
125
ns
Table 1.21.17. Serial I/O
Symbol
Standard
Parameter
Min.
Max.
Unit
tc(CK)
CLKi input cycle time
200
ns
tw(CKH)
tw(CKL)
CLKi input HIGH pulse width
CLKi input LOW pulse width
100
100
ns
ns
td(C-Q)
TxDi output delay time
th(C-Q)
tsu(D-C)
TxDi hold time
RxDi input setup time
th(C-D)
RxDi input hold time
80
0
30
90
ns
ns
ns
ns
_______
Table 1.21.18. External interrupt INTi inputs
Symbol
Standard
Min.
Max.
Parameter
tw(INH)
INTi input HIGH pulse width
tw(INL)
INTi input LOW pulse width
250
250
33
Unit
ns
ns
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
P0
P1
P2
P3
30pF
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
Figure 1.21.1. Port P0 to P13 measurement circuit
34
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 5V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 5V
tc(TA)
tw(TAH)
TAiIN input
tw(TAL)
tc(UP)
tw(UPH)
TAiOUT input
tw(UPL)
TAiOUT input
(Up/down input)
During event counter mode
TAiIN input
tsu(UP–TIN)
th(TIN–UP)
(When count on falling
edge is selected)
TAiIN input
(When count on rising
edge is selected)
tc(TB)
tw(TBH)
TBiIN input
tw(TBL)
tc(AD)
ADTRG input
tw(ADL)
tc(CK)
tw(CKH)
CLKi
tw(CKL)
th(C–Q)
TxDi
td(C–Q)
RxDi
tw(INL)
INTi input
tw(INH)
35
tsu(D–C)
th(C–D)
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 3V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
Table 1.21.19. Electrical characteristics (referenced to VCC = 3V, VSS = 0V at Ta = 25oC, f(XIN) =
7MHZ, with wait)
Symbol
Parameter
Measuring condition
VOH
HIGH output P00 to P07, P100 to P103,
voltage
P110 to P117, P120 to P125
VOH
HIGH output P10 to P17, P20 to P27, P30 to P35,
IOH= –1mA
voltage
P41, P42, P46, P47, P50 to P53, P56, P57,
P60 to P63, P72 to P76, P80 to P82,
P84, P86, P90 to P96, P130, P131
VOH
HIGH output
voltage
XOUT
HIGH output
voltage
XCOUT
VOH
IOH= –20µA
Hysteresis
2.5
2.5
HIGHPOWER
With no load applied
3.0
LOWPOWER
With no load applied
1.6
HIGHPOWER
IOH=0.1mA
0.5
LOWPOWER
IOH=50µA
0.5
HIGHPOWER
With no load applied
0
LOWPOWER
With no load applied
0
TA0IN, TA3IN, TA4IN, TB0IN to TB3IN,
INT0 to INT5, ADTRG, CTS0, CLK0, NMI,
TA3OUT, TA4OUT, TA7OUT,
KI0 to KI15 (Note), KI16 to KI19
IIH
HIGH input P00 to P07, P10 to P17, P20 to P27,
P30 to P35, P41, P42, P46, P47,
current
P50 to P53, P56, P57, P60 to P63,
P70 to P77, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
XIN, RESET, CNVSS
LOW input P00 to P07, P10 to P17, P20 to P27,
current
P30 to P35, P41, P42, P46, P47,
P50 to P53, P56, P57, P60 to P63,
P70 to P77, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
XIN, RESET, CNVSS
P00 to P07, P10 to P17, P20 to P27,
Pull-up
resistance P30 to P35, P41, P42, P46, P47,
P50 to P53, P56, P57, P60 to P63,
P72 to P76, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131,
Feedback resistance
XIN
RfXCIN
Feedback resistance
XCIN
VRAM
RAM retention voltage
V
V
V
0.2
0.8
V
0.2
1.8
V
VI=3V
4.0
µA
VI=0V
–4.0
µA
RESET
RfXIN
V
0.5
Hysteresis
RPULLUP
V
IOL=1mA
VT+-VT-
IIL
V
IOH= –0.1mA
LOW output XOUT
voltage
VT+-VT-
2.5
IOH= –50µA
VOL
LOW output XCOUT
voltage
V
HIGHPOWER
LOW output P00 to P07, P10 to P17, P20 to P27,
P30 to P35, P41, P42, P46, P47,
voltage
P50 to P53, P56, P57, P60 to P63,
P70 to P76, P80 to P82, P84, P86,
P90 to P96, P100 to P103, P110 to P117,
P120 to P125, P130, P131
Unit
2.0
LOWPOWER
VOL
VOL
Standard
Min. Typ. Max.
VI=0V
When clock is stopped
Note : Has no effect during intermittent pullup operation.
36
66.0 120.0
2.0
500.0
k
3.0
M
10.0
M
V
Mitsubishi microcomputers
M30221 Group
Electric characteristics (VCC = 3V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
Table 1.21.20. Electrical characteristics (referenced to VCC = 3V, VSS = 0V at Ta = 25oC, f(XIN) =
7MHZ, with wait)
Parameter
Symbol
Measuring condition
Min.
f(XIN)=7MHz
6.0
Square wave, no division
I/o pin is no
load applied
Mask ROM
version
f(XCIN)=32kHz
Square wave
Flash memory f(XCIN)=32kHz
version
Square wave
Power supply current
Icc
Standard
Typ. Max.
f(XCIN)=32kHz
When a WAIT instruction is executed
Oscillation capacity High (Note)
15.0
Unit
mA
40.0
µA
150.0
µA
2.8
µA
0.9
µA
f(XCIN)=32kHz
When a WAIT instruction is executed
Oscillation capacity Low (Note)
When clock is stopped
Ta=25 ºC
When clock is stopped
Ta=85 ºC
VL1
Supply voltage (VL1)
When voltage multiplier used
IL1
Power supply current (VL1)
VL1=1.7V,f(LCDCK)=200Hz
1.0
µA
20.0
1.3
1.7
2.1
V
3.0
6.0
µA
Note: With one timer operated using fC32.
Table 1.21.21. A-D conversion characteristics (referenced to VCC = AVCC = VREF = 3V, VSS = AVSS =
0V at Ta = 25oC, f(XIN) = 7MHZ, with wait unless otherwise specified)
Symbol
–
–
Absolute
accuracy
RLADDER
Standard
Min. Typ. Max.
Bits
±2
LSB
10
40
14.0
2.7
0
VCC
VREF
k
µs
V
V
Sample & hold function not available(8bit) VREF =VCC = 3V, φAD=fAD/2
Ladder resistance
VREF =VCC
Conversion time(8bit)
Reference voltage
Analog input voltage
Unit
10
VREF =VCC
Resolution
tCONV
VREF
VIA
Measuring condition
Parameter
Table 1.21.22. D-A conversion characteristics (referenced to VCC = AVCC= VREF= 3V, VSS = AVSS =
0V, at Ta = 25oC, f(XIN) = 7MHZ unless otherwise specified)
Symbol
tsu
RO
IVREF
Parameter
Resolution
Absolute accuracy
Setup time
Output resistance
Reference power supply input current
Measuring condition
Min.
4
(Note)
Standard
Typ. Max.
10
8
1.0
3
20
1.0
Unit
Bits
%
µs
k
mA
Note : This applies when using one D-A converter, with the D-A register for the unused D-A converter set to “0016”. The
A-D converter's ladder resistance is not included.
Also, when the Vref is unconnected at the A-D control register, IVREF is sent.
37
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 3V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
Timing requirements (referenced to VCC = 3V, VSS = 0V at Ta = 25oC unless otherwise specified)
Table 1.21.23. External clock input
Symbol
tc
tw(H)
tw(L)
tr
tf
Standard
Min.
Max.
Parameter
External clock input cycle time
External clock input HIGH pulse width
External clock input LOW pulse width
External clock rise time
External clock fall time
143
60
60
18
18
Unit
ns
ns
ns
ns
ns
Table 1.21.24. Timer A input (counter input in event counter mode)
Symbol
Standard
Max.
Min.
150
Parameter
tc(TA)
tw(TAH)
TAiIN input HIGH pulse width
60
tw(TAL)
TAiIN input LOW pulse width
60
TAiIN input cycle time
Unit
ns
ns
ns
Table 1.21.25. Timer A input (gating input in timer mode)
Symbol
tc(TA)
tw(TAH)
tw(TAL)
Standard
Max.
Min.
Parameter
Unit
TAiIN input cycle time
600
ns
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
300
300
ns
ns
Table 1.21.26. Timer A input (external trigger input in one-shot timer mode)
tc(TA)
TAiIN input cycle time
tw(TAH)
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
tw(TAL)
Standard
Min.
Max.
Parameter
Symbol
300
150
150
Unit
ns
ns
ns
Table 1.21.27. Timer A input (external trigger input in pulse width modulation mode)
tw(TAH)
tw(TAL)
Standard
Min.
Max.
150
150
Parameter
Symbol
TAiIN input HIGH pulse width
TAiIN input LOW pulse width
Unit
ns
ns
Table 1.21.28. Timer A input (up/down input in event counter mode)
tc(UP)
tw(UPH)
tw(UPL)
tsu(UP-TIN)
th(TIN-UP)
Standard
Min.
Max.
3000
1500
1500
Parameter
Symbol
TAiOUT input cycle time
TAiOUT input HIGH pulse width
TAiOUT input LOW pulse width
TAiOUT input setup time
TAiOUT input hold time
600
600
38
Unit
ns
ns
ns
ns
ns
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 3V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
Timing requirements (referenced to VCC = 3V, VSS = 0V at Ta = 25oC unless otherwise specified)
Table 1.21.29. Timer B input (counter input in event counter mode)
Symbol
Standard
Parameter
Min.
tc(TB)
tw(TBH)
tw(TBL)
tc(TB)
tw(TBH)
tw(TBL)
Unit
Max.
TBiIN input cycle time (counted on one edge)
TBiIN input HIGH pulse width (counted on one edge)
150
ns
60
TBiIN input LOW pulse width (counted on one edge)
TBiIN input cycle time (counted on both edges)
60
300
ns
ns
TBiIN input HIGH pulse width (counted on both edges)
TBiIN input LOW pulse width (counted on both edges)
160
160
ns
ns
ns
Table 1.21.30. Timer B input (pulse period measurement mode)
Symbol
Standard
Max.
Min.
Parameter
Unit
tc(TB)
TBiIN input cycle time
600
ns
tw(TBH)
tw(TBL)
TBiIN input HIGH pulse width
TBiIN input LOW pulse width
300
300
ns
ns
Table 1.21.31. Timer B input (pulse width measurement mode)
Symbol
tc(TB)
tw(TBH)
tw(TBL)
Standard
Parameter
Min.
600
TBiIN input cycle time
TBiIN input HIGH pulse width
Unit
Max.
ns
ns
ns
300
TBiIN input LOW pulse width
300
Table 1.21.32. A-D trigger input
Symbol
tc(AD)
tw(ADL)
Standard
Min.
Max.
1500
Parameter
ADTRG input cycle time (trigger able minimum)
ADTRG input LOW pulse width
Unit
ns
ns
200
Table 1.21.33. Serial I/O
Symbol
tc(CK)
Standard
Parameter
Min.
Max.
Unit
CLKi input cycle time
300
ns
tw(CKH)
CLKi input HIGH pulse width
CLKi input LOW pulse width
TxDi output delay time
150
150
ns
tw(CKL)
td(C-Q)
th(C-Q)
tsu(D-C)
TxDi hold time
RxDi input setup time
th(C-D)
RxDi input hold time
160
0
50
90
ns
ns
ns
ns
ns
_______
Table 1.21.34. External interrupt INTi inputs
Symbol
Standard
Min.
Max.
Parameter
tw(INH)
INTi input HIGH pulse width
tw(INL)
INTi input LOW pulse width
380
380
39
Unit
ns
ns
Mitsubishi microcomputers
M30221 Group
Timing (VCC = 3V)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
tc(TA)
tw(TAH)
TAiIN input
tw(TAL)
tc(UP)
tw(UPH)
TAiOUT input
tw(UPL)
TAiOUT input
(Up/down input)
During event counter mode
TAiIN input
(When count on falling
edge is selected)
tsu(UP–TIN)
th(TIN–UP)
TAiIN input
(When count on rising
edge is selected)
tc(TB)
tw(TBH)
TBiIN input
tw(TBL)
tc(AD)
tw(ADL)
ADTRG input
tc(CK)
tw(CKH)
CLKi
tw(CKL)
th(C–Q)
TxDi
td(C–Q)
tsu(D–C)
RxDi
INTi input
tw(INL)
tw(INH)
40
th(C–D)
Mitsubishi microcomputers
M30221 Group
Usage precaution peculiar to M30221 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage precaution against the differences between M30220 Group and M30221 Group
Differences between M30220 Group and M30221 Group
M30220 Group
Items
Internal
Memory
64K***
96K
128K**
24K
32K***
64K***
128K**
RAM (Byte)
4K***
6K
10K**
1.5K
2K***
4K***
10K**
Input only / Output only
I/O
Ports
Input only : 1 / Output only : 16 (shared with LCD outputs)
81 (26 lines are shared with LCD outputs)
2
2
8+6
−
CRC Operation Circuit
Clock Sync. / UART
3
2
Clock Synchronous
−
UART only
−
A-D Converter (resolution × channels)
D-A Converter (resolution × channels)
10bits×8
8bits×3
External Interrupts (source)
10bits×7
8bits×2
8
Watchdog Timer
LCD
Controller
/ Driver
Input only : 1 / Output only : 14 (shared with LCD outputs)
102 (32 lines are shared with LCD outputs)
CMOS I/O
N-channel open-drain
DMAC (channels)
16-bit timers
Serial
I/O
M30221 Group
ROM (Byte)
Available
Segment (lines)
48
40
Common (lines)
4
Charge pump
Available
Real Time Output Ports (bits × ports)
8×4
Key-on Wake up (lines)
8×3, 6×1
Max.20 (16 lines have Intermittent pull-up operation)
Sub Clock Generating Circuit
Available
144-pin TQFP (144PFB-A)
144-pin LQFP (144P6Q-A)
Packages
Power Source Voltage (V)
Operating Temperature Range (℃)
120-pin LQFP (120P6R-A)
2.7 to 5.5 (7MHz with 1wait)、 4.0 to 5.5 (10MHz)
-20 to 85、-40 to 85
Minimum Instruction Excution Time (ns)
100 (10MHz)
Number of Basic Instructions
91
★★：Under development ★★★：Under planning (April. 2001)
Deleted pins from M30220 Group
Port
Deleted pin name
P0
−
P1
−
P2
−
P3
−
P4
P40/TA0OUT、P43/TA1IN、P44/TA2OUT、P45/TA2IN
P5
P54/TB4IN、P55/TB5IN
P6
P64/CTS1/RTS1/CLKS1、P65/CLK1、P66/RXD1、P67/TXD1
P7
−
P8
P83/TA5IN、P85/TA6IN、P87/TA7IN
P9
P97/AN7
P10
P104/SEG20、P105/SEG21、P106/SEG22、P107/SEG23
P11
−
P12
P126/SEG38、P127/SEG39
P13
P132/DA2
others
SEG0、SEG1、VSS(1 pin)
41
Mitsubishi microcomputers
Usage precaution peculiar to M30221 Group
M30221 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage precaution against timer A
Mode
Timer mode
Event counter
mode
One-shot timer
mode
Function
Not available timer Ai
Pulse output
Timer A0 and A2 are not available.
Gate input
Timer A1 , A2 , and A5 to A7 are not available.
Pulse output
Timer A0 and A2 are not available.
Count source input
Timer A1 , A2 , and A5 to A7 are not available.
Up / down count select input
Timer A0 and A2 are not available.
Two-phase pulse input
Timer A2 and A7 are not available.(Note 1)
Pulse output
Timer A0 and A2 are not available.
Trigger input
Timer A1 , A2 , and A5 to A7 are not available.
Timer A0 and A2 are not available.
Pulse width
modulation mode Trigger input
Timer A1 and A5 to A7 are not available.
Note 1．Timer A3 and A4 are available.
Usage precaution against timer B
Mode
Function
Event counter
mode
Count source input
Not available timer Bi
Timer B4 and B5 are not available.
Pulse period
/ pulse width
measurement
mode
Timer B4 and B5 are not available.
Usage precaution against real time port outputs
(1) Pins P126 and P127 are deleted.
Usage precaution against serial I/O
(1) UART1 is not available.
Usage precaution against LCD controller / driver
(1) Pins SEG0 , SEG1 , SEG20 to SEG23 , SEG38 and SEG39 are deleted.
(2) Addresses of the designated RAM for the LCD display 010016 , 010A16 , 010B16 and 011316 are reserved area.
(3) Bit 5 of the segment output enable register (address 012216) is reserved bit. Must always be clear to "0".
42
Mitsubishi microcomputers
Usage precaution peculiar to M30221 Group
M30221 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage precaution against A-D converter
(1) AN7 pin is deleted.
(2) Do not set the analog input pin select bit (bit 0 to 2 at address 03D616) to "111" in one-shot mode and in repeat
mode.
(3) When the A-D sweep pin select bit (bit 0 , 1 at address 03D716) is set to "11" in single sweep mode , the
interrupt request generation timing of the A-D conversion is the A-D conversion time of all 8 pins.
(4) The sweep time is the A-D conversion time of all 8 pins in repeat sweep mode 1 and when the A-D sweep pin
select bit (bit 0 , 1 at address 03D716) is set to "11" in repeat sweep mode 0.
Usage precaution against D-A converter
(1) DA2 pin is deleted.
(2) Bit 2 of the D-A control register (address 03DC16) is reserved bit. Must always be clear to "0".
(3) Address 03DE16 must always be clear to "0016".
Usage precaution against programmable I/O
(1) Reserved bits of the port Pi direction register and the port Pi register
Register
Bit
Register
Bit
PD0、P0
−
PD7、P7
−
PD1、P1
−
PD8、P8
b3、b5、b7(Note 1)
PD2、P2
−
PD9、P9
b7(Note 1)
PD3、P3
−
PD10、P10
b4∼b7(Note 1)
PD4、P4
b0、b3∼b5(Note 1)
PD11、P11
−
PD5、P5
b4、b5(Note 1)
PD12、P12
b6、b7(Note 1)
PD6、P6
b4∼b7(Note 1)
PD13、P13
b2(Note 1)
Note 1．These are reserved bits. Must always be clear to "0".
(2) Reserved bits of the pull-up control register
Bit 5 of the pull-up control register 1 (address 03FD16) and bit 5 of the pull-up control register 2 (address 03FE16)
are reserved bits. Must always be clear to "0".
43
Keep safety first in your circuit designs!
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malfunction or mishap.
Notes regarding these materials
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MITSUBISHI SEMICONDUCTORS
M30221 Group Specification REV.D
May. First Edition 2001
Editioned by
Committee of editing of Mitsubishi Semiconductor
Published by
Mitsubishi Electric Corp., Kitaitami Works
This book, or parts thereof, may not be reproduced in any form without
permission of Mitsubishi Electric Corporation.
©2001 MITSUBISHI ELECTRIC CORPORATION