RENESAS HD74CBT16212A

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April 1, 2003
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HD74CBT16212A
24-bit FET Bus-Exchange Switches
ADE-205-647A (Z)
Preliminary
Rev. 1
Feb. 2002
Description
The HD74CBT16212A devices provide 24-bits of high speed TTL-compatible bus switching or exchanging.
The low on state resistance of the switch allows connections to be made with minimal propagation delay.
Each device operates as a 24-bit bus switch or a 12-bit bus exchanger that provides data exchanging
between the four signal ports via the data-select (S0, S1, S2) terminals.
Features
• Minimal propagation delay through the switch.
• 5 Ω switch connection between two ports.
• TTL-compatible input levels.
• Ultra low quiescent power.
-Ideally suited for notebook applications.
• Package type
Product code example: HD74CBT16212ATEL
Package type
Package code
Package suffix
Taping code
TSSOP–56pin
TTP–56DAV
T
EL(1,000pcs / Reel)
HD74CBT16212A
Function Table
Inputs
Inputs / Outputs
S2
S1
S0
A1
A2
Function
L
L
L
Z
Z
Disconnect
L
L
H
B1 port
Z
A1 port = B1 port
L
H
L
B2 port
Z
A1 port = B2 port
L
H
H
Z
B1 port
A2 port = B1 port
H
L
L
Z
B2 port
A2 port = B2 port
H
L
H
Z
Z
Disconnect
H
H
L
B1 port
B2 port
A1 port = B1 port
A2 port = B2 port
H
H
H
B2 port
B1 port
A1 port = B2 port
A2 port = B1 port
H:
L:
Z:
High level
Low level
High impedance
Rev.1, Feb. 2002, page 2 of 11
HD74CBT16212A
Pin Arrangement
S0 1
56 S1
1A1 2
55 S2
1A2 3
54 1B1
2A1 4
53 1B2
2A2 5
52 2B1
3A1 6
51 2B2
3A2 7
50 3B1
GND 8
49 GND
4A1 9
48 3B2
4A2 10
47 4B1
5A1 11
46 4B2
5A2 12
45 5B1
6A1 13
44 5B2
6A2 14
43 6B1
7A1 15
42 6B2
7A2 16
41 7B1
VCC 17
40 7B2
8A1 18
39 8B1
GND 19
38 GND
8A2 20
37 8B2
9A1 21
36 9B1
9A2 22
35 9B2
10A1 23
34 10B1
10A2 24
33 10B2
11A1 25
32 11B1
11A2 26
31 11B2
12A1 27
30 12B1
12A2 28
29 12B2
(Top view)
Rev.1, Feb. 2002, page 3 of 11
HD74CBT16212A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VCC
−0.5 to 7.0
V
VI
−0.5 to 7.0
V
Input clamp current
IIK
−50
mA
VI < 0
Continuous output current
IO
128
mA
VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND
±100
mA
Maximum power dissipation
*2
at Ta = 25°C (in still air)
PT
1.32
W
Storage temperature
Tstg
−65 to 150
°C
Supply voltage range
Input voltage range
Notes:
*1
Conditions
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Supply voltage range
VCC
4.0
5.5
V
Input voltage range
VI
0
5.5
V
Output voltage range
VI/O
0
5.5
V
Input transition rise or fall rate
∆t / ∆v
0
5
ns / V
Operating free-air temperature
Ta
−40
85
°C
Note: Unused or floating inputs must be held high or low.
Rev.1, Feb. 2002, page 4 of 11
Conditions
VCC = 4.5 to 5.5 V
HD74CBT16212A
Block Diagram
1A1
1A2
•
•
•
12A1
12A2
S0
S1
S2
2
54
3
53
27
30
28
29
1B1
1B2
•
•
•
12B1
12B2
1
56
55
Rev.1, Feb. 2002, page 5 of 11
HD74CBT16212A
DC Electrical Characteristics
(Ta = −40 to 85°C)
Item
Symbol
VCC (V)
Min
Typ
Clamp diode voltage
VIK
4.5

Input voltage
VIH
4.0 to 5.5
VIL
RON
On-state switch
*2
resistance
*1
Max
Unit
Test conditions

−1.2
V
IIN = −18 mA
2.0


V
4.0 to 5.5


0.8
4.0

14
20
4.5

4
7
VIN = 0 V,
IIN = 64 mA
4.5

4
7
VIN = 0 V,
IIN = 30 mA
4.5

6
12
VIN = 2.4 V,
IIN = 15 mA
Ω
VIN = 2.4 V,
IIN = 15 mA
Typ at VCC = 4.0 V
Input current
IIN
0 to 5.5


±1.0
µA
VIN = 5.5 V or GND
Off-state leakage
current
IOZ
5.5


±1.0
µA
0 ≤ A, B ≤ VCC
Quiescent supply
current
ICC
5.5


3
µA
VIN = VCC or GND,
IO = 0 mA
Increase in ICC
*3
per input
∆ICC
5.5


2.5
mA
One input at 3.4 V,
other inputs at VCC or
GND
Notes:
For condition shown as Min or Max use the appropriate values under recommended operating
conditions.
1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the
switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals.
3. This is the increase in supply current for each input that is at the specified TTL voltage level
rather than VCC or GND.
Capacitance
(Ta = 25°C)
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
Test conditions
Control input
capacitance
CIN
5.0

5

pF
VIN = 0 or 3 V
Input / output
capacitance
CI/O (OFF)
5.0

9

pF
VO = 0 or 3 V
S0, S1, or S2 = VCC
Note: This parameter is determined by device characterization is not production tested.
Rev.1, Feb. 2002, page 6 of 11
HD74CBT16212A
Switching Characteristics
(Ta = −40 to 85°C)
•
VCC = 4.0 V
Test
conditions
FROM
(Input)
TO
(Output)
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
10.0
ns
CL = 50 pF
RL = 500 Ω
S
A or B

10.4
ns
CL = 50 pF
RL = 500 Ω
S
A or B
tHZ
tLZ

9.2
ns
CL = 50 pF
RL = 500 Ω
S
A or B
Item
Symbol
Min
Max
Unit
Test
conditions
FROM
(Input)
TO
(Output)
Propagation delay
*1
time
tPLH
tPHL

0.25
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
Propagation delay
time
tPLH
tPHL
1.5
9.1
ns
CL = 50 pF
RL = 500 Ω
S
A or B
Enable time
tZH
tZL
1.5
9.7
ns
CL = 50 pF
RL = 500 Ω
S
A or B
Disable time
tHZ
tLZ
1.5
8.8
ns
CL = 50 pF
RL = 500 Ω
S
A or B
Item
Symbol
Min
Max
Unit
Propagation delay
*1
time
tPLH
tPHL

0.35
Propagation delay
time
tPLH
tPHL

Enable time
tZH
tZL
Disable time
•
VCC = 5.0±0.5 V
Note:
1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the
switch and the specified load capacitance, when driven by an ideal voltage source (zero output
impedance).
Rev.1, Feb. 2002, page 7 of 11
HD74CBT16212A
Test Circuit
See under table
500 Ω
S1
OPEN
GND
*1
CL = 50 pF
500 Ω
Load circuit for outputs
Symbol
S1
t PLH / tPHL
OPEN
t ZH / t HZ
OPEN
t ZL / t LZ
7V
Note: 1. CL includes probe and jig capacitance.
Rev.1, Feb. 2002, page 8 of 11
HD74CBT16212A
Waveforms – 1
tr
tf
90 %
1.5 V
Input
3V
90 %
1.5 V
10 %
10 %
t PLH
GND
t PHL
V OH
1.5 V
Output
1.5 V
V OL
Waveforms – 2
tf
tr
90 %
Output
Control
3V
90 %
1.5 V
1.5 V
10 %
t ZL
10 %
GND
t LZ
3.5 V
Waveform - A
1.5 V
V OL + 0.3 V
t ZH
t HZ
V OH - 0.3 V
Waveform - B
V OL
V OH
1.5 V
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.1, Feb. 2002, page 9 of 11
HD74CBT16212A
Package Dimensions
As of July, 2001
14.0
14.2 Max
29
6.10
56
Unit: mm
1
*0.19 ± 0.05
0.50
28
0.08 M
1.0
8.10 ± 0.20
0.65 Max
*Pd plating
Rev.1, Feb. 2002, page 10 of 11
0.10 ± 0.05
0.10
*0.15 ± 0.05
1.20 Max
0˚ – 8˚
0.50 ± 0.1
Hitachi Code
JEDEC
JEITA
Mass (reference value)
TTP-56DAV
—
—
0.32 g
HD74CBT16212A
Disclaimer
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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
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traffic, safety equipment or medical equipment for life support.
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for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
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Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
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Rev.1, Feb. 2002, page 11 of 11