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HD74CBT16210 20-bit FET Bus Switch ADE-205-646A (Z) Preliminary Rev. 1 Feb. 2002 Description The HD74CBT16210 provides 20-bits of high speed TTL-compatible bus switching. The low on state resistance of the switch allows connections to be made with minimal propagation delay. The device is organized as a dual 10-bit bus switch with separate output enable (OE) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high impedance state exists between the ports. Features • Minimal propagation delay through the switch. • 5 Ω switch connection between two ports. • TTL-compatible input levels. • Ultra low quiescent power. -Ideally suited for notebook applications. • Package type Product code example: HD74CBT16210TEL Package type Package code Package suffix Taping code TSSOP–48pin TTP–48DBV T EL(1,000pcs / Reel) HD74CBT16210 Function Table Input OE Function L A port = B port H Disconnect H: L: High level Low level Pin Arrangement NC 1 48 1OE 1A1 2 47 2OE 1A2 3 46 1B1 1A3 4 45 1B2 1A4 5 44 1B3 1A5 6 43 1B4 1A6 7 42 1B5 GND 8 41 GND 1A7 9 40 1B6 1A8 10 39 1B7 1A9 11 38 1B8 1A10 12 37 1B9 2A1 13 36 1B10 2A2 14 35 2B1 VCC 15 34 2B2 2A3 16 33 2B3 GND 17 32 GND 2A4 18 31 2B4 2A5 19 30 2B5 2A6 20 29 2B6 2A7 21 28 2B7 2A8 22 27 2B8 2A9 23 26 2B9 2A10 24 25 2B10 (Top view) Rev.1, Feb. 2002, page 2 of 2 HD74CBT16210 Absolute Maximum Ratings Item Symbol Ratings Unit VCC −0.5 to 7.0 V VI −0.5 to 7.0 V Input clamp current IIK −50 mA VI < 0 Continuous output current IO 128 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Maximum power dissipation *2 at Ta = 25°C (in still air) PT 1.08 W Storage temperature Tstg −65 to 150 °C Supply voltage range Input voltage range Notes: *1 Conditions The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 4.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VI/O 0 5.5 V Input transition rise or fall rate ∆t / ∆v 0 5 ns / V Operating free-air temperature Ta −40 85 °C Conditions VCC = 4.5 to 5.5 V Note: Unused or floating inputs must be held high or low. Rev.1, Feb. 2002, page 3 of 3 HD74CBT16210 Block Diagram 1A1 2 46 1B1 • • • • • • 1A10 1OE 2A1 12 36 1B10 48 13 35 2B1 • • • 2A10 2OE • • • 24 47 Rev.1, Feb. 2002, page 4 of 4 25 2B10 HD74CBT16210 DC Electrical Characteristics (Ta = −40 to 85°C) Item Symbol VCC (V) Min Typ Clamp diode voltage VIK 4.5 Input voltage VIH 4.0 to 5.5 VIL RON On-state switch *2 resistance *1 Max Unit Test conditions −1.2 V IIN = −18 mA 2.0 V 4.0 to 5.5 0.8 4.0 14 20 4.5 5 7 VIN = 0 V, IIN = 64 mA 4.5 5 7 VIN = 0 V, IIN = 30 mA 4.5 8 12 VIN = 2.4 V, IIN = 15 mA Ω VIN = 2.4 V, IIN = 15 mA Typ at VCC = 4.0 V Input current IIN 0 to 5.5 ±1.0 µA VIN = 5.5 V or GND Off-state leakage current IOZ 5.5 ±1.0 µA 0 ≤ A, B ≤ VCC Quiescent supply current ICC 5.5 3 µA VIN = VCC or GND, IO = 0 mA Increase in ICC *3 per input ∆ICC 5.5 2.5 mA One input at 3.4 V, other inputs at VCC or GND Notes: For condition shown as Min or Max use the appropriate values under recommended operating conditions. 1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C. 2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals. 3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Capacitance (Ta = 25°C) Item Symbol VCC (V) Min Typ Max Unit Test conditions Control input capacitance CIN 5.0 5 pF VIN = 0 or 3 V Input / output capacitance CI/O (OFF) 5.0 7 pF VO = 0 or 3 V OE = VCC Note: This parameter is determined by device characterization is not production tested. Rev.1, Feb. 2002, page 5 of 5 HD74CBT16210 Switching Characteristics (Ta = −40 to 85°C) • VCC = 4.0 V Test conditions FROM (Input) TO (Output) ns CL = 50 pF RL = 500 Ω A or B B or A 9.3 ns CL = 50 pF RL = 500 Ω OE A or B 7.1 ns CL = 50 pF RL = 500 Ω OE A or B Symbol Min Max Unit Test conditions FROM (Input) TO (Output) Propagation delay *1 time tPLH tPHL 0.25 ns CL = 50 pF RL = 500 Ω A or B B or A Enable time tZH tZL 3.3 8.6 ns CL = 50 pF RL = 500 Ω OE A or B Disable time tHZ tLZ 2.8 7.9 ns CL = 50 pF RL = 500 Ω OE A or B Item Symbol Min Max Unit Propagation delay *1 time tPLH tPHL 0.35 Enable time tZH tZL Disable time tHZ tLZ Item • VCC = 5.0±0.5 V Note: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Rev.1, Feb. 2002, page 6 of 6 HD74CBT16210 Test Circuit See under table 500 Ω S1 OPEN GND *1 CL = 50 pF 500 Ω Load circuit for outputs Symbol S1 t PLH / tPHL OPEN t ZH / t HZ OPEN t ZL / t LZ 7V Note: 1. CL includes probe and jig capacitance. Rev.1, Feb. 2002, page 7 of 7 HD74CBT16210 Waveforms – 1 tr tf 90 % 1.5 V Input 3V 90 % 1.5 V 10 % 10 % t PLH GND t PHL V OH 1.5 V Output 1.5 V V OL Waveforms – 2 tf tr 90 % Output Control 3V 90 % 1.5 V 1.5 V 10 % t ZL 10 % GND t LZ 3.5 V Waveform - A 1.5 V V OL + 0.3 V t ZH t HZ V OH - 0.3 V Waveform - B V OL V OH 1.5 V GND Notes: 1. All input pulses are supplied by generators having the following characteristics : PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.1, Feb. 2002, page 8 of 8 HD74CBT16210 Package Dimensions As of July, 2001 12.5 12.7 Max 25 6.10 48 Unit: mm 1 *0.19 ± 0.05 0.50 24 0.08 M 1.0 8.10 ± 0.20 0.65 Max *Pd plating 0.10 ± 0.05 0.10 *0.15 ± 0.05 1.20 Max 0˚ – 8˚ 0.50 ± 0.1 Hitachi Code JEDEC JEITA Mass (reference value) TTP-48DBV — — 0.20 g Rev.1, Feb. 2002, page 9 of 9 HD74CBT16210 Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Sales Offices Hitachi, Ltd. Semiconductor & Integrated Circuits Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: (03) 3270-2111 Fax: (03) 3270-5109 URL http://www.hitachisemiconductor.com/ For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe Ltd. Electronic Components Group Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 585200 Hitachi Asia Ltd. Hitachi Tower 16 Collyer Quay #20-00 Singapore 049318 Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877 URL : http://semiconductor.hitachi.com.sg Hitachi Europe GmbH Electronic Components Group Dornacher Straße 3 D-85622 Feldkirchen Postfach 201, D-85619 Feldkirchen Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan. Colophon 5.0 Rev.1, Feb. 2002, page 10 of 10