PL611s-02

PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
FEATURES
DESCRIPTION
 Lowest-power, smallest Programmable PLL
 Very low Jitter and Phase Noise
 Output Frequency up to:
o 110MHz @ 1.8V operation
o 166MHz @ 2.5V operation
o 200MHz @ 3.3V operation
 Input Frequency:
o Fundamental Crystal: 10MHz to 50MHz
o Reference Clock: 1MHz to 200MHz
 Accepts >0.1V reference signal input voltage
 One I/O pin can be configured as Output Enable (OE),
Frequency switching (FSEL), Power Down (PDB)
input, or CLK1 output.
 <10µA current consumption with PDB active.
 Single 1.8V to 3.3V, ± 10% power supply
 Operating temperature range from -40C to 85C
 Available in 6-pin DFN and SOT23 GREEN/RoHS
compliant packages.
The PL611s-02 is a low-power, small form factor,
high performance OTP-base programmable
frequency synthesizer and a member of Micrel’s
PicoPLL Factory Programmable ‘Quick Turn Clocks.
Designed to fit in a small DFN or SOT23 package for
a broad range of applications, the PL611s-02 offers
the best phase noise and jitter performance, and
power consumption of its rivals. . In addition, one
programmable I/O pin can be configured as Output
Enable (OE), Frequency switching (FSEL), Power
Down (PDB) input, or CLK1 (F OUT , F REF , F REF /2)
output. The power down feature of PL611s-02,
when activated, allows the IC to consume less than
10µA of power, while its programming flexibility
allows generating any output, up to 200MHz using a
low-cost crystal or reference input.
PACKAGE PIN CONFIGURATION
6
5
4
1
GND
2
XIN, FIN
3
XOUT
VDD
CLK0
DFN-6L
(2.0 x 1.3 x 0.6mm)
PL611s-02
1
2
3
PL611s-02
XIN, FIN
OE, PDB, FSEL, CLK1
GND
OE, PDB,
FSEL, CLK1
6
CLK0
5
VDD
4
XOUT
SOT23-6L
(3.0 x 3.0 x 1.35mm)
BLOCK DIAGRAM
XIN/FIN
XOUT
XTAL
OSC
Programmable
CLoad
FREF
R-Counter
(8-bit)
M-Counter
(11-bit)
Phase
Detector
Charge
Pump
Loop
Filter
FVCO = FREF * (2 * M/R)
¸2
P-Counter
(5-bit)
FOUT = FVCO / (2 * P)
Programmable Function
Programming
Logic
VCO
CLK0
¸1, ¸2
OE, PDB,
FSEL, CLK1
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 1
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
KEY PROGRAMMING PARAM ETERS
CLK[0:1]
Output Frequency
Programmable
Input/Output
Output Drive Strength
F OUT = F REF * M / (R * P)
Where M = 11 bit
R = 8 bit
P = 5 bit
CLK0 = F OUT , F REF or F REF / (2*P)
CLK1 = F REF , F REF /2, CLK0 or CLK0/2
Three optional drive strengths to
choose from:
 Low: 4mA
 Std: 8mA (default)
 High: 16mA
One output pin can be configured
as:
 OE - input
 PDB - input
 FSEL - input
 CLK1 – output
PACKAGE PIN ASSIGNMENT
Name
OE, PDB,
FSEL, CLK1
Pin Assignment
SOT23
DFN
Pin #
Pin#
Type
Description
This programmable I/O pin can be configured as an Output Enable
(OE) input, Power Down input (PDB), On-the-Fly Frequency
Switching Selector (FSEL), or CLK1 clock output This pin has an
internal 60KΩ pull up resistor for OE, PDB & FSEL.
1
2
I/O
State
OE
PDB
FSEL
0
Tri-State CLK
Power Down Mode
Bank 1
1 (default)
Normal mode
Normal mode
Bank 2
GND
2
3
P
GND connection
XIN, FIN
3
1
I
Crystal or Reference Clock input pin
XOUT
4
6
O
VDD
5
5
P
VDD connection
CLK0
6
4
O
Programmable Clock Output
Crystal Output pin
Do Not Connect (DNC ) when FIN is present
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 2
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
FUNCTIONAL DESCRIPTION
PL611s-02 is a highly featured, very flexible, advanced programmable PLL design for high performance, low power, small form-factor applications. The PL611s -02 accepts a fundamental input crystal of 10M Hz to 50MHz or
reference clock input of 1MHz to 200MHz and is capable of producing two outputs up to 200MHz. This flexible
design allows the PL611s-02 to deliver any PLL generated frequency, F REF (Crystal or Ref Clk) frequency or
F REF /(2*P) to CLK0 and/or CLK1. Some of the design features of the PL611s -02 are mentioned below:
PLL Programming
The PLL in the PL611s-02 is fully programmable.
The PLL is equipped with an 8-bit input frequency
divider (R-Counter), and an 11-bit VCO frequency
feedback loop divider (M-Counter). The output of
the PLL is transferred to a 5-bit post VCO divider (PCounter). The output frequency is determined by the
following formula [F OUT = F REF * M / (R * P) ].
Clock Output (CLK0)
CLK0 is the main clock output. The output of CLK0
can be configured as the PLL output (F VCO /(2*P)),
F REF (Crystal or Ref Clk) output, or F REF /(2*P) output.
The output drive level can be programmed to Low
Drive (4mA), Standard Drive (8mA) or High Drive
(16mA). The maximum output frequency is
determined by the Power Supply Voltage; 200MHz at
3.3V, 166MHz at 2.5V and 110MHz at 1.8V.
Clock Output (CLK1)
The CLK1 feature allows the PL611s -02 to have an
additional clock output programmed to one of the
following:
Output Enable (OE)
The Output Enable feature allows the user to enable
and disable the clock output(s) by toggling the OE
pin. The OE pin incorporates a 60kΩ pull up
resistor giving a default condition of logic “1”.
Power-Down Control (PDB)
The Power Down (PDB) feature allows the user to
put the PL611s-02 into “Sleep Mode”. When
activated (logic ‘0’), PDB ‘Disables the PLL, the
oscillator circuitry, counters, and all other active
circuitry. In Power Down mode the IC consumes
<10µA of power. The PDB pin incorporates a 60kΩ
pull up resistor giving a default condition of logic “1”.
Frequency Select (FSEL)
The Frequency Select (FSEL) feature allows the
PL611s-02 to switch between two pre-programmed
outputs allowing the device “On the Fly” frequency
switching. The FSEL pin incorporates a 60kΩ pull
up resistor giving a default condition of logic “1”.
F REF - Reference (Crystal or Ref Clk) Frequency
F REF / 2
CLK0
CLK0 / 2
Maximum VCO Frequency:
For the best performance, we recommend to use the
highest VCO frequency allowed at the power supply
voltage where the PL611s -02 will be used. It is
actually the maximum VCO frequency that determines
the maximum output frequency. When a PL611s -02
is programmed for use at a certain power supply
voltage, it is safe to use that part at higher voltages
also because at higher voltages the maximum VCO
frequency is also higher. The other way around,
using the part at a lower voltage than what it was
originally configured for, is not safe.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 3
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
SYMBOL
MIN
MAX
UNITS
V DD
-0.5
7
V
Input Voltage Range
VI
-0.5
V DD+0.5
V
Output Voltage Range
VO
-0.5
V DD+0.5
V
260
C
Supply Voltage Range
Soldering Temperature (Green package)
10
Data Retention @ 85C
Storage Temperature
TS
Ambient Operating Temperature*
Year
-65
150
C
-40
85
C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied. *Operating temperature is guaranteed by design. Parts are tested to commercial grade only.
DC SPECIFICATIONS
PARAMETERS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current, Dynamic
I DD
VDD =3.3V,30MHz, load=15pF
6.0
mA
Supply Current, Dynamic
I DD
VDD =2.5V,30MHz, load=15pF
3.9
mA
Supply Current, Dynamic
I DD
VDD =1.8V,30MHz, load=15pF
2.1
mA
PLL Off: Supply Current, Dynamic
I DD
VDD =3.3V,30MHz, load=15pF
2.0
mA
PLL Off: Supply Current, Dynamic
I DD
VDD =2.5V,30MHz, load=15pF
1.6
mA
PLL Off: Supply Current, Dynamic
I DD
VDD =1.8V,30MHz, load=5pF
0.8
mA
Supply Current, Dynamic
I DD
When PDB=0
Operating Voltage
V DD
Power Supply Ramp
t PU
Output Low Voltage
V OL
Time for V DD to reach 90%
V DD. Power ramp must be
monotonic.
I OL = +4mA Standard Drive
Output High Voltage
V OH
I OH = -4mA Standard Drive
Output Current, Low Drive
I OSD
Output Current, Standard Drive
Output Current, High Drive
<10
µA
1.62
3.63
V
.001
100
ms
0.4
V
V DD – 0.4
V
V OL = 0.4V, V OH = 2.4V
4
mA
I OSD
V OL = 0.4V, V OH = 2.4V
8
mA
I OHD
V OL = 0.4V, V OH = 2.4V
16
mA
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 4
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
AC SPECIFICATIONS
PARAMETERS
CONDITIONS
Crystal Input Frequency (XIN) Fundamental Crystal
MIN
TYP
10
@ V DD =3.3V
Input (FIN) Frequency
@ V DD =2.5V
Input (FIN) Signal Amplitude
Output Frequency
Settling Time
Output Enable Time
Internally AC coupled (High Frequency)
Internally AC coupled (Low Frequency)
3.3V <50MHz, 2.5V <40MHz, 1.8V <15MHz
@ VDD =3.3V
UNITS
50
MHz
200
1
166
@ V DD =1.8V
Input (FIN) Signal Amplitude
MAX
MHz
110
0.9
VDD
Vpp
0.1
VDD
Vpp
200
MHz
@ VDD =2.5V
166
MHz
@ VDD =1.8V
110
MHz
2
ms
10
ns
2
ms
2
ppm
At power-up (after VDD increases over 1.62V)
OE Function; Ta=25º C, 15pF Load. Add one
clock period to this measurement for a usable
clock output.
PDB Function; Ta=25º C, 15pF Load
VDD Sensitivity
Frequency vs. VDD +/-10%
Output Rise Time
15pF Load, 10/90% VDD, High Drive, 3.3V
1.2
1.7
ns
Output Fall Time
15pF Load, 90/10% VDD, High Drive, 3.3V
@2.5V and 3.3V over entire frequency range,
V DD/2
@1.8V, < 75MHz F OUT, V DD/2
1.2
1.7
ns
45
50
55
45
50
55
@1.8V, 75MHz < F OUT <110MHz
40
Duty Cycle (See MTC-1)
Period Jitter, Pk-to-Pk*
(10,000 samples measured)
With capacitive decoupling between VDD and GND
-2
%
60
70
ps
* Note: Jitter perform ance depends on the programming parameters.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 5
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
(The IC can be programmed for any value in this range)
SYMBOL
MIN
F XIN
CL (x ta l)
TYP
MAX
UNITS
10
50
MHz
8
12
pF
100
W
Maximum Sustainable Drive Level
Operating Drive Level
Metal Can Crystal
Small SMD Crystal
W
30
Shunt Capacitance
ESR Max
Shunt Capacitance
ESR Max
C0
5.5
pF
ESR
50
Ω
C0
2.5
pF
ESR
80
Ω
LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
Signal Integrity and Termination Considerations
Decoupling and Power Supply Considerations
- Keep traces short!
- Place decoupling capacitors as close as possible to
the VDD pin(s) to limit noise from the power supply
- Trace = Inductor. With a capacitive load this
equals ringing!
- Long trace = Transmission Line. Without proper
termination this will cause reflections (looks like
ringing).
- Design long traces ( > 1 inch ) as “striplines” or
“microstrips” with defined impedance.
- Match trace at one side to avoid reflections
bouncing back and forth.
- Addition of a ferrite bead in series with VDD can
help prevent noise from other board sources
- Value of decoupling capacitor is frequency
dependant. Typical values to use are 0.1 F for
designs using frequencies < 50MHz and 0.01F for
designs using frequencies > 50MHz.
Crystal Tuning Circuit
Series and parallel capacitors used to fine tune the crystal load to the circuit load.
Typical CMOS termination
Place Series Resistor as close as possible to CMOS output
CMOS Output Buffer
(Typical buffer impedance 20Ω)
- Multiple VDD pins should be decoupled separately
for best performance.
Crystal
To CMOS Input
50Ω line
Cst
Series Resistor
Use value to match output buffer impedance to
50Ω trace. Typical value 30Ω
XIN
XOUT
1
Cpt
8
Cpt
CST – Series Capacitor, used to lower circuit load to match crystal load. Raises frequency offset.
This can be eliminated by using a crystal with a Cload of equal or greater value than the oscillator.
CPT – Parallel Capacitors, Used to raise the circuit load to match the crystal load. Lowers
frequency offset.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 6
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
PACKAGE DRAWINGS (GREEN PACKAGE COM PLIANT)
SOT23-6 L
Symbol
A
A1
A2
b
c
D
E
H
L
e
Dimension in MM
Min.
Max.
1.05
1.35
0.05
0.15
1.00
1.20
0.30
0.50
0.08
0.20
2.80
3.00
1.50
1.70
2.60
3.0
0.35
0.55
0.95 BSC
Pin1 Dot
E
H
D
A2 A
A1
C
b
e
L
DFN-6L
D1
Symbol
A
A1
A3
b
e
D
E
D1
E1
L
Dimension in MM
Min.
Max.
0.50
0.60
0.00
0.05
0.152
0.152
0.15
0.25
0.40BSC
1.25
1.35
1.95
2.05
0.75
0.85
0.95
1.05
0.20
0.30
b
e
D
Pin 6 ID
Chamfer
E
E1
Pin1 Dot
L
Bottom View
A A1
Top View
A3
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 7
PL611s-02
1.8V-3.3V PicoPLL TM , World’s Smallest Programmable Clock
ORDERING INFORM ATION (GREEN PACKAGE COM PLIANT)
For part ordering, please contact our Sales Department:
2180 Fortune Drive, San Jose, CA 95131 USA
Tel +1 (408) 944-1668 Fax +1 (408) 474-1000
PART NUMBER
The order number for this device is a combination of the following:
Part number, Package type and Operating temperature range
PL611s-02-XXX X X - X
Shipping Option
None=Tube
R=Tape & Reel
Part Number
3 DIGIT ID Code *
(will be assigned at
programming time)
Temperature
C=Commercial (0°C to 70°C)
I=Industrial (-40°C to 85°C)
Package Type
G=DFN-6L
T-SOT23-6L
* PhaseLink will assign a unique 3-digit ID code for each approved programmed part number.
Part/Order Number
PL611s-02-XXXGC-R
PL611s-02-XXXTC-R
Marking†
XXX
LLL
02XXX
LLL
Package Option
6-Pin DFN (Tape and Reel)
6-Pin SOT23 (Tape and Reel)
* Note: LLL and LLLLL designates lot number
† Note: ‘XXX’ designates marking identifier that, at times, could be independent of the part number.
Please consult your Micrel sales representative for marking information.
Micrel Inc. , reserves the right to make changes in its products or specifications, or both at any time without notice. The information f urnished by Micrel
is believed to be accurate and reliable. However, Micrel makes no guarantee or warranty concerning the accuracy of said information and shall not be
responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: Micrel’s products are not authorized for use as critical components in life support devices or systems without the e xpress
written approval of the President of Micrel Inc.
Solder reflow profile available at www.phaselink.com/QA/solderingGreen.pdf
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408)944-0800 • fax + 1(408)474-1000 • www.micrel.com • Rev 07/09/12 • Page 8