1.8V-3.3V, 5MHz to 60MHz XO IC

1.8V-3.3V, 5MHz to 60MHz XO IC
FEATURES
DESCRIPTION
 Wide Frequency Oscillator Design.
 Single IC to Cover up to 60MHz Output Frequency.
 Input Frequency:
o Fundamental Crystal: 5MHz to 60MHz
o Reference Clock: 5MHz to 60MHz
 Output Frequency: 5MHz to 60MHz
 Very Low Jitter and Phase Noise
 Low Current Consumption
 Single 1.8V, 2.5V, or 3.3V ± 10% power supply
 Operating Temperature Range:
o 0C to 70C (Commercial)
o -40C to 85C (Industrial)
 Available in 6-pin DFN or SOT23 GREEN/RoHS
Compliant Packages
The PL610-37 is a high performance general
purpose oscillator IC for outputs up to 60MHz. The
OE function will put the IC into standby mode with a
current consumption of <5uA. Designed to fit in a
small 2 x 1.3mm DFN or 3 x 3mm SOT23 package,
the PL610 offers the best phase noise and jitter
performance and lowest power consumption of any
comparable IC.
PACKAGE PIN CONFIGURATION
1
2
3
XIN/FIN
GND
CLK
6
5
4
XOUT
OE
VDD
CLK
1
6
VDD
GND
2
5
OE
XIN/FIN
3
4
XOUT
DFN-6L
SOT23-6L
(2.0 x 1.3 x 0.6mm)
(3.0 x 3.0 x 1.35mm)
BLOCK DIAGRAM
PACKAGE PIN ASSIGNMENT
Name
Pin Assignment
Type
Description
DFN Pin#
SOT Pin#
XIN/FIN
1
3
I
Crystal or Reference Clock input pin
GND
2
2
P
GND connection
CLK
3
1
O
Clock Output
VDD
4
6
P
V DD connection
OE
5
5
I
Output Enable (OE) input. Internal Pull Up.
XOUT
6
4
O
Crystal Output pin
Do Not Connect (DNC ) when FIN is present
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/11/09 Page 1
1.8V-3.3V, 5MHz to 60MHz XO IC
LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
Signal Integrity and Termination Considerations
Decoupling and Power Supply Considerations
- Keep traces short!
- Place decoupling capacitors as close as possible to the
VDD pin(s) to limit noise from the power supply
- Trace = Inductor. With a capacitive load this equals ringing!
- Long trace = Transmission Line. Without proper termination
this will cause reflections ( looks like ringing ).
- Design long traces as “striplines” or “microstrips” with
defined impedance.
- Match trace at one side to avoid reflections bouncing back
and forth.
- Addition of a ferrite bead in series with VDD can help
prevent noise from other board sources
- Value of decoupling capacitor is frequency dependant.
Typical values to use are 0.1F for designs using crystals <
50MHz and 0.01F for designs using crystals > 50MHz.
Crystal Tuning Circuit
Series and parallel capacitors used to fine tune the crystal load to the circuit load.
Typical CMOS termination
Place Series Resistor as close as possible to CMOS output
CMOS Output Buffer
(Typical buffer impedance 20Ω)
- Multiple VDD pins should be decoupled separately for best
performance.
Crystal
To CMOS Input
50Ω line
Cst
Series Resistor
Use value to match output buffer impedance to
50Ω trace. Typical value 30Ω
XIN
XOUT
1
8
Cpt
Cpt
CST – Series Capacitor, used to lower circuit load to match crystal load. Raises frequency offset.
This can be eliminated by using a crystal with a Cload of equal or greater value than the oscillator.
CPT – Parallel Capacitors, Used to raise the circuit load to match the crystal load. Lowers
frequency offset.
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
V DD
-0.5
4.6
V
Input Voltage Range
VI
-0.5
V DD +0.5
V
Output Voltage Range
VO
-0.5
V DD +0.5
V
Storage Temperature
TS
-65
150
C
-40
85
C
Supply Voltage Range
Ambient Operating Temperature
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/11/09 Page 2
1.8V-3.3V, 5MHz to 60MHz XO IC
AC SPECIFICATIONS
PARAMETERS
Crystal Input Frequency (XIN)
CONDITIONS
MIN.
Fundamental Crystal
Output Frequency
VDD Sensitivity
Frequency vs. V DD, ±10%
Output Enable Time
OE Function; Ta=25º C, 15pF Load.
Add one clock period to this
measurement for a usable clock output.
(OE pin change from GND to V DD )
TYP.
MAX.
UNITS
5
60
MHz
5
60
MHz
-2
2
ppm
2
ms
Output Rise Time
15pF Load, 10/90%V DD , 3.3V
1
2
ns
Output Fall Time
15pF Load, 90/10%V DD , 3.3V
1
2
ns
45
50
55
%
MIN.
TYP.
MAX.
UNITS
Duty Cycle
* For 1.8V operation, the 50% ±5% duty cycle is guaranteed for frequencies ≤40MHz.
DC SPECIFICATIONS
PARAMETERS
SYMBOL
Supply Current, Dynamic,
with Loaded CMOS Output
Supply Current, OE Low
I DD
CONDITIONS
V DD =3.3V, 40MHz, load=3pF
2.7
mA
V DD =2.5V, 40MHz, load=3pF
1.9
mA
V DD =1.8V, 40MHz, load=3pF
1.25
mA
V DD =1.8V, 2MHz, load=3pF
0.65
mA
I DD_SB
1.62
5
uA
3.63
V
0.4
V
Operating Voltage
V DD
Output Low Voltage
V OL
I OL = +4mA Standard Drive
Output High Voltage
V OH
I OH = -4mA Standard Drive
2.4
V
Output Current
I OD
V OL = 0.4V, V OH = 2.4V
16
mA
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
Crystal Loading Rating
SYMBOL
MIN.
F XIN
5
C L (xtal)
TYP.
MAX.
UNITS
60
MHz
12
Maximum Sustainable Drive Level
pF
100
Operating Drive Level
W
W
25
Crystal Shunt Capacitance
C0
3
pF
Effective Series Resistance
ESR
50

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/11/09 Page 3
1.8V-3.3V, 5MHz to 60MHz XO IC
PACKAGE DRAWINGS (GREEN PACKAGE COMPLIANT)
SOT23-6 L
Symbol
A
A1
A2
b
c
D
E
H
L
e
Dimension in MM
Min.
Max.
1.05
1.35
0.05
0.15
1.00
1.20
0.30
0.50
0.08
0.20
2.80
3.00
1.50
1.70
2.60
3.0
0.35
0.55
0.95 BSC
Pin1 Dot
E
H
D
A2 A
A1
C
b
e
L
DFN-6L
D1
Symbol
A
A1
A3
b
e
D
E
D1
E1
L
Dimension in MM
Min.
Max.
0.50
0.60
0.00
0.05
0.152
0.152
0.15
0.25
0.40BSC
1.25
1.35
1.95
2.05
0.75
0.85
0.95
1.05
0.20
0.30
b
e
D
Pin 6 ID
Chamfer
E
E1
L
Pin1 Dot
A A1
A3
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/11/09 Page 4
1.8V-3.3V, 5MHz to 60MHz XO IC
ORDERING INFORMATION (GREEN PACKAGE COMPLIANT)
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Part number, Package type and Operating temperature range
Part Number
Shipping Option
Blank=Tube
R=Tape & Reel
Package Type
G=DFN-6Liiiiiii
T=SOT23-6Liii
Part/Order Number
Temperature Range
C=Commercial (0°C to 70°C)
Marking
Package Option
PL610-37GC-R
E37
LLL
6-Pin DFN (Tape and Reel)
PL610-37TC-R
E37
LLL
6-Pin SOT-23 (Tape and Reel)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
Solder reflow profile available at www.phaselink.com/QA/solderingGreen.pdf
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/11/09 Page 5