DTA114TE

TAK CHEONG
®
SOT-523
Digital Transistor (Built-in Resistors)
DTA114TE
SEM IC O N DU C TO R
Green Product
PNP Silicon Surface Mount Transistor
Absolute Maximum Ratings (TA = 25°C unless otherwise noted)
Symbol
Parameter
Value
Units
VCBO
Collector-base Voltage
-50
V
VCEO
Collector-emitter Voltage
-50
V
VEBO
Emitter-base Voltage
-5
V
IC
Collector Current
-100
mA
PD
Power Dissipation
150
mW
TJ
Junction to Ambient
150
°C
-55 to +150
°C
TSTG
Storage Temperature Range
3
2
1
SOT-523 (SC-75A)
These ratings are limiting values above which the serviceability of the device may be impaired.
FEATURES:
ƒ
ELECTRICCAL SYMBOL:
Built-in resistors enable the configuration of a inverter circuit without
connecting external input resistors.
ƒ
The bias resistors consist of thin-film resistors with complete isolation
to allow positive biasing of the input. They also have the advantage of
almost completely eliminating parasitic effects.
ƒ
Only the on/off conditions need to be set for operation, making device
design easy.
ƒ
RoHS Compliant
ƒ
Green EMC
ƒ
Matte Tin(Sn) Lead Finish
ƒ
Weight: approx. 0.002g
DEVICE MARKING CODE:
Device Type
Device Marking
DTA114TE
94
DB Number: DB-261
Sept. 2014, Revsion A
Page 1
TAK CHEONG
®
SEM IC O N DU C TO R
Electrical Characteristics (TA = 25°C unless otherwise noted)
Parameter
Symbol
Limits
Test Condition
Min
Typ
Unit
Max
Collector-base breakdown Voltage
BVCBO
IC=-50uA, IE =0
-50
V
Collector-emitter breakdown Voltage
BVCEO
IC=-1mA, IB =0
-50
V
Emitter-base breakdown Voltage
BVEBO
IE = -50uA, IC =0
-5
V
Collector cut-off Current
ICBO
VCB = -50V, IE =0
-0.5
uA
Emitter cut-off Current
IEBO
VEB = -4V, IC =0
-0.5
uA
IC = -10mA, I IE =B =-1mA
-0.3
V
Collector-emitter saturation voltage
VCE(sat)
DC current gain
hFE
Input Resistance
R1
Transition Frequency
fT
VCE = -5V, IC= -1mA
100
250
600
7
10
13
VCE = -10V, IE = -5mA
KΩ
250
f=100MHz
MHz
SOT-523 Package Outline
DIM
MILLIMETERS
MIN
MAX
MIN
MAX
A
0.70
0.90
0.028
0.035
A1
0.00
0.10
0.000
0.004
A2
0.70
0.80
0.028
0.031
b1
0.15
0.25
0.006
0.010
b2
0.25
0.35
0.010
0.014
c
0.10
0.20
0.004
0.008
D
1.50
1.70
0.059
0.067
E
0.70
0.90
0.028
0.035
E1
1.45
1.75
0.057
0.069
e
Typical Soldering Pattern:
INCHES
e1
0.50 TYP.
0.90
L
0.020 TYP.
1.10
0.035
0.40 REF.
L1
0.10
θ
0
O
0.043
0.016 REF.
0.30
8
O
0.004
0
O
0.012
8
O
NOTES:
1. Above package outline conforms to JEITA EAIJ ED-7500A SC-75A.
2. Dimensions are exclusive of Burrs, Mold Flash & Tie Bar extrusions.
DB Number: DB-261
Sept. 2014, Revsion A
Page 2
TAK CHEONG
®
DISC LA I MER NOTIC E
NOTICE
The information presented in this document is for reference only. Tak Cheong reserves the right to make
changes without notice for the specification of the products displayed herein.
The product listed herein is designed to be used with ordinary electronic equipment or devices, and not
designed to be used with equipment or devices which require high level of reliability and the malfunction of with
would directly endanger human life (such as medical instruments, transportation equipment, aerospace
machinery, nuclear-reactor controllers, fuel controllers and other safety devices), Tak Cheong Semiconductor
Co., Ltd., or anyone on its behalf, assumes no responsibility or liability for any damagers resulting from such
improper use of sale.
This publication supersedes & replaces all information reviously supplied. For additional information, please visit
our website http://www.takcheong.com, or consult your nearest Tak Cheong’s sales office for further assistance.
Number: DB-100
April 14, 2008 / A