UM10339 User Manual for the BGU7003 GPS LNA demo

UM10339
User Manual for the BGU7003 GPS LNA demo boards v2.0
Rev. 1 — 15 September 2011
User manual
Document information
Info
Content
Keywords
LNA, GPS, BGU7003
Abstract
This document explains the BGU7003 GPS LNA evaluation Board
UM10339
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Revision history
Rev
Date
Description
1
Initial document
20110915
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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1. Introduction
The BGU7003 is a wideband Silicon Germanium Amplifier MMIC for high speed, low
noise applications. It can be used mainly for LNA applications up to 6 GHz like GPS,
satellite radio, cordless phone. The BGU7003 contains one RF stage and internal bias
that is temperature stabilized. It also contains a power down function to shutdown the
amplifier by means of a logic signal on the enable pin.
The BGU7003 is ideal for use in portable electronic devices, such as mobile phones,
Personal Digital Assistants (PDAs), Personal Navigation Devices (PNDs) etc.
The GPS LNA EValuation Board (EVB) is designed to evaluate the performance of the
BGU7003 applied as a GPS LNA. In this document, the application diagram, board
layout, bill of material, and some typical results are given.
Figure Fig 1 shows the evaluation board.
Fig 1. BGU7003_GPS LNA evaluation board
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2. General description
The BGU7003 design is a wideband Silicon Germanium (SiGe) transistor with internal
bias circuit. This bias circuit is temperature stabilized, which keeps the current constant
over temperature. The bias current for the RF stage can be set via an external bias
resister in order to give the designer flexibility in choosing the bias current. The MMIC is
also supplied with a power-down function that allows the designer to control the MMIC
via a logic signal. This power-down mode only consumes 0.4 µA. In Figure Fig 2 the
simplified internal circuit of the BGU7003 is given.
1
Rb
6
Bias AND
Enable
Circuit
RFin
GND
2
5
3
6
Vcc
Enable
RFout
Fig 2. Simplified internal circuit of the BGU7003
The BGU7003 is not internally matched so for both input and output a matching circuit
needs to be designed. The fact that no internal matching is available makes the product
suitable for different application areas.
In the next paragraphs the BGU7003 applied as a GPS LNA is described.
3. Application board
The BGU7003 EVB simplifies the evaluation of the BGU7003 wideband amplifier MMIC,
for the GPS application area. The EVB enables testing of the device performance and
requires no additional support circuitry. The board is fully assembled with the BGU7003
IC, including input- and output matching, to optimize the performance. The board is
connectorized with signal input and output SMA connectors for connection to RF test
equipment.
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3.1 Application circuit
In Figure Fig 3 the application diagram as supplied on the evaluation board is given.
Fig 3. Circuit diagram of the evaluation board
3.2 Board layout
Figure Fig 4 shows the board layout with the component identifiers.
Fig 4. Printed-Circuit Board (PCB) of the BGU7003 evaluation board
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3.3 PCB layout
A good PCB Layout is an essential part of an RF circuit design. The EVB of the
BGU7003 can serve as a guideline for laying out a board using the BGU7003. Use
controlled impedance lines for all high frequency inputs and outputs. Bypass V CC with
decoupling capacitors, preferable located as close as possible to the device. For long
bias lines it may be necessary to add decoupling capacitors along the line further away
from the device. Proper grounding the GND pin is also essential for the performance.
Either connect the GND pin directly to the ground plane or through vias, or do both.
The material that has been used for the EVB is FR4 using the stack shown in
figure Fig 5.
Fig 5. Stack of the PCB material
Material supplier is ISOLA DURAVER; r = 4.6 to 4.9; tan  = 0.02.
3.4 Bill of materials
Table 1.
BOM of the BGU7003 evaluation board
Component
Description
Footprint
Value
Supplier name / type
Remarks
C1, C2
capacitor
0402
100 pF
MurataGRM1555
DC blocking
C3
capacitor
0402
180 pF
MurataGRM1555
decoupling
L1
inductor
0402
2.7 nH
input matching
L2
inductor
0402
30 nH
L3
inductor
0402
33 nH
Murata/LQW15A high quality
factor, low series resistance
Murata/LQW15A high quality
factor, low series resistance
Murata/LQG15HS
output matching / DC Bias
L4
inductor
0402
3.9 nH
Murata/LQG15HS
output matching
R1
resistor
0402
180 
R2
resistor
0402
0
bridge, proper routing
makes it not necessary
R3
resistor
0402
3300 
bias setting
X1, X2
SMA RF connector
-
Johnson, end launch SMA
input matching
RF input / RF output
142-0701-841
X3
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DC header
-
Molex, PCB header, right angle,
1 row, 4 way 90121-0764
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bias connector
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4. Required equipment
In order to measure the evaluation board the following is necessary.
 A DC power supply up to 30 mA at 2 V to 2.8 V (up to 15V for bias control).
 An RF signal generator capable of generating an RF signal at the operating
frequency of 1575.42 MHz.
 An RF spectrum analyzer that covers at least the operating frequency of
1575.42 MHz as well as a few of the harmonics, so up to 6 GHz should be sufficient.
”Optional” a version with the capability of measuring noise figure is convenient.
 An amp meter to measure the supply current (optional).
 A network analyzer for measuring gain, return loss and reverse isolation.
 A noise figure analyzer.
5. Connections and set_up
The BGU7003 EVB is fully assembled and tested. Please follow the steps below for a
step-by-step guide to operate the EVB and testing the device functions.
1. Connect the DC power supply set to 2.5 V to the VCC, VRb Ven and GND terminals.
2. Connect the RF signal generator and the spectrum analyzer to the RF input and the
RF output of the EVB respectively. Do not turn on the RF output of the signal
generator yet, set it to 40 dBm output power at 1575.42 MHz. Set the spectrum
analyzer on 1575.42MHz center frequency and a reference level of 0 dBm.
3. Turn on the DC power supply and it should read approximately 5.1 mA.
4. Enable the RF output of the generator; the spectrum analyzer displays a tone of
1575.42 MHz at around –21 dBm.
5. In order to evaluate the board on different bias currents through RF stage of the
MMIC the voltage on R3 (VRb) can be connected to a separate power supply. One is
now able to control the bias current.
6. To evaluate the enable function the Ven terminal of the board can also be connected
to a separate DC power supply that either gives a voltage > 0.6 V (amplifier on) or
< 0.5 V (amplifier off).
7. Instead of using a signal generator and spectrum analyzer one can also use a
network analyzer NWA in order to measure gain as well as in- and output return loss
8. For noise figure evaluation, either a noise figure analyzer or a spectrum analyzer with
noise option can be used. The use of a 5 dB noise source, like the Agilent 364A is
recommended. When measuring the noise figure of the evaluation board any kind of
adaptors, cables etc between the noise source and the EVB should be avoided,
since this affects the noise performance.
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Fig 6. Evaluation board including its connections
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6. Typical EVB results
Table 2.
Typical results measured on the evaluation boards
Operating frequency is 1575.42 MHz; VCC, VRb and Ven = 2.5 V; ICC = 5 mA; Tamb = 25 °C; unless
otherwise specified.
Symbol
Parameter
NF
noise figure
Gp
power gain
18.2 dB
RLin
input return loss
5.6 dB
RLout
output return loss
18 dB
ISLrev
reverse isolation
24 dB
Pi(1dB)
input power at 1 dB gain compression
19 dBm

Po(1dB)
output power at 1 dB gain compression
2 dBm

IP3I
input third-order intercept point
6 dBm

IP3O
output third-order intercept point
10.5 dBm
on/off switching
tsw
switching time
0.7 s
[1]
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Value
[1]
Remarks
0.85 dB
The NF and Gp figures are measured at the SMA connectors of the EVB, so the losses of the connectors
and the PCB are not subtracted. If you do so the NF will improve approximately 0.1 dB.
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7. Legal information
7.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
7.2 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
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Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
7.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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8. List of figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
BGU7003_GPS LNA evaluation board ............. 3
Simplified internal circuit of the BGU7003 ......... 4
Circuit diagram of the evaluation board ............ 5
Printed-Circuit Board (PCB) of the BGU7003
evaluation board ............................................... 5
Stack of the PCB material ................................. 6
Evaluation board including its connections ....... 8
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9. List of tables
Table 1.
Table 2.
BOM of the BGU7003 evaluation board ............ 6
Typical results measured on the evaluation boards 9
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10. Contents
1.
2.
3.
3.1
3.2
3.3
3.4
4.
5.
6.
7.
7.1
7.2
7.3
8.
9.
10.
Introduction ......................................................... 3
General description ............................................. 4
Application board ................................................ 4
Application circuit ............................................... 5
Board layout ....................................................... 5
PCB layout ......................................................... 6
Bill of materials ................................................... 6
Required equipment ............................................ 7
Connections and set_up ..................................... 7
Typical EVB results ............................................. 9
Legal information .............................................. 10
Definitions ........................................................ 10
Disclaimers....................................................... 10
Trademarks ...................................................... 10
List of figures..................................................... 11
List of tables ...................................................... 12
Contents ............................................................. 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 15 September 2011
Document identifier: UM10339