UM8401 8 Line ESD/EMI Protection for Color LCD Interfaces UM8401 DFN16 4.0×1.6 General Description The UM8401 is a low pass filter array with integrated TVS diodes. It is designed to suppress unwanted EMI/RFI signals and provide electrostatic discharge (ESD) protection in portable electronic equipment. This state-of-the-art device utilizes silicon-avalanche technology for superior clamping performance and DC electrical characteristics. It has been optimized for protection of color LCD panels in cellular phones and other portable electronics. The device consists of eight identical circuits comprised of TVS diodes for ESD protection, and a RC network for EMI filtering. A series resistor value of 100Ω and a capacitance value of 10pF are used to achieve 25dB minimum attenuation from 800 MHz to 2.5GHz. The TVS diodes provide effective suppression of ESD voltages in excess of ±15kV (air discharge) and ±8kV (contact discharge) per IEC 61000-4-2, level 4. The UM8401 is in a 16-pin, RoHS compliant DFN16 package. It measures 4.0mm×1.6mm. The leads are spaced at a pitch of 0.5mm and are finished with lead-free Ni Pd. The small package makes it ideal for use in portable electronics such as cell phones, digital still cameras, and PDAs. Applications Features EMI Filtering and ESD Protection for Data Lines Wireless Phones Handheld Products Notebook Computers LCD Displays Pin Configurations EMI/RFI Filter with Integrated TVS for ESD Protection ESD Protection to IEC 61000-4-2 (ESD) Level 4, ±15kV (Air), ±8kV (Contact) 25dB Minimum Attenuation: 800MHz to 2.5GHz Working Voltage: 5V Resistor: 100Ω ±15% Typical Capacitance: 15pF (VR = 2.5V) Solid-State Technology DFN16 Package: 4.0mm×1.6 mm Moisture Sensitivity Level 1 Top View XX: Week Code UM8401 DFN16 4.0×1.6 ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 1/7 UM8401 Ordering Information Part Number Working Voltage Packaging Type Channel Marking Code Shipping Qty UM8401 5.0V DFN16 4.0×1.6 8 8401 3000pcs/7 Inch Tape & Reel Absolute Maximum Ratings PARAMETER SYMBOL VALUE UNIT Junction Temperature TJ 125 °C Steady State Power per Resistor @ 25℃ PR 328 mW Operating Temperature Range TOP -40 to 85 °C Storage Temperature Range TSTG -55 to 150 °C TL 260 °C Maximum Lead Temperature for Soldering Electrical Characteristics PARAMETER Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Total Series Resistance SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VRWM VBR It = 1mA IR VRWM = 3.3V RA Total Capacitance Cd Total Capacitance Cd Cut-Off Frequency (Note 1) f3dB IR=20mA Each Line Input to GND, Each Line VR = 0V, f = 1MHz Input to GND, Each Line VR = 2.5V, f = 1MHz Above this frequency, appreciable attenuation occurs 6.0 7.0 5.0 V 8.0 V 100 nA 85 100 115 Ω 20 23 26 pF 13 15 18 pF 150 MHz Note 1: 50Ω source and 50Ω load termination. ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 2/7 UM8401 Typical Operating Characteristics Typical Insertion Loss S21 Analog Crosstalk Curve (S41) Typical Resistance vs. Temperature Capacitance vs. Reverse Voltage 104 1.0 103 0.9 101 Cj(Vr)/Cj(Vr=0) Resistance(ohm) 102 100 99 98 0.8 0.7 0.6 f=1M 97 0.5 96 -40 -20 0 20 40 Temperature(Celsiur scale) 60 80 0.4 0 1 2 3 4 5 Reverse Voltage - Vr(V) ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 3/7 UM8401 Applications Information Device Connection The UM8401 is comprised of eight identical circuits each consisting of a low pass filter for EMI/RFI suppression and dual TVS diodes for ESD protection. The device is in a 16-pin DFN package. Electrical connection is made to the 16 pins located at the bottom of the device. A center tab serves as the ground connection. The device has a flow through design for easy layout. All path lengths should be kept as short as possible to minimize the effects of parasitic inductance in the board traces. Recommendations for the ground connection are given below. Ground Connection Recommendation Parasitic inductance present in the board layout will affect the filtering performance of the device. As frequency increases, the effect of the inductance becomes more dominant. This effect is given by Equation 1. Pin 1-8 Identification Input Lines 9 - 16 Output Lines Center Tab Ground Equation 1: The Impedance of an Inductor at Frequency XLF XLF(L, f ) = 2×л×f ×L Where: L= Inductance (H) f = Frequency (Hz) Via connections to the ground plane form rectangular wire loops or ground loop inductance as shown in Figure 2. Ground loop inductance can be reduced by using multiple vias to make the connection to the ground plane. Bringing the ground plane closer to the signal layer (preferably the next layer) also reduces ground loop inductance. Multiple vias in the device ground pad will result in a lower inductive ground loop over two exterior vias. Vias with a diameter d are separated by a distance y run between layers separated by a distance x. The inductance of the loop path is given by Equation 2. Thus, decreasing distance x and y will reduce the loop inductance and result in better high frequency filter characteristics. ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 4/7 UM8401 Where: d = Diameter of the wire (in) x = Length of wire loop (in) y = Breath of wire loop (in) Figure 3 shows the recommended device layout. The ground pad vias have a diameter of 0.008 inches (0.20 mm) while the two external vias have a diameter of 0.010 inches (0.250mm). The internal vias are spaced approximately evenly from the center of the pad. The designer may choose to use more vias with a smaller diameter (such as 0.005 inches or 0.125mm) since changing the diameter of the via will result in little change in inductance (i.e. the log function in Equation 2 in highly insensitive to parameter d) . Figure 3 – Recommended Layout Using Ground Vias ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 5/7 UM8401 Package Information DFN16 4.0×1.6 Outline Drawing Symbol D E D1 c A A1 A2 b L e DIMENSIONS MILLIMETERS Min Typ Max 3.90 4.00 4.10 1.50 1.60 1.70 3.10 3.20 3.30 0.30 0.40 0.50 0.545 0.575 0.80 0 0.02 0.05 0.13 0.253 0.18 0.25 0.30 0.25 0.33 0.38 0.50TYP Land Pattern NOTES: 1. Compound dimension: 4.0×1.6; 2. Unit: mm; 3. General tolerance ±0.05mm otherwise specified; 4. The layout is just for reference. unless Tape and Reel Orientation ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 6/7 UM8401 IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai 201210 Tel: 021-51093966 Fax: 021-51026018 Website: www.union-ic.com ___________________________________________________________________________ http://www.union-ic.com Rev.09 Dec.2014 7/7