FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Features Description 3:1 Switch Handles: Negative-Swing-Capable Audio Channel The FSA805 is a 3:1 USB accessory switch that enables USB data, stereo/mono audio, and UART data to share a common connector port. It is designed for high-speed USB 2.0 signaling. The architecture is designed to allow audio signals to swing below ground (to -0.8V) so a common USB and headphone jack can be used for personal media players and portable peripheral devices. Built-in Termination Resistors for Audio Pop Reduction The FSA805 meets both USB Rev. 2.0 and micro-USB specifications. Simple Switch Control Using Two Select Pins Audio Headsets UART Up to 2 High-Full and Low-Speed USB Data Applications Cell Phones, MP3 Players, PDAs Ordering Information Part Number Operating Temperature Range Top Mark FSA805UMX -40 to +85°C JZ Eco Status Green Package 12-Lead Quad, UMLP, 1.8x1.8mm For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. VCC FSA805 R_HOST L_HOST R RxD_HOST TxD_HOST 3:1 MUX and Charge Pump DP_HOST DM_HOST SEL[0] SEL[1] DP_CON DM_CON GND Switch Control Figure 1. Functional Block Diagram © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability July 2013 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Application Diagram Baseband Processor Audio Codec VCC R_HOST RxD_HOST DM_HOST UART or HS USB Micro USB L_HOST TxD_HOST UART or HS USB FSA805 R 3:1 MUX and Charge Pump VBUS DM_CON DP_CON ID DP_HOST GND SEL[0] Switch Control SEL[1] Figure 2. Typical Application © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 2 The FSA805 USB2.0 accessory switch is designed to consolidate wired accessories for portable devices, such as cellular telephones and portable audio players. The benefits of consolidation include reduced space requirements from a reduction of connectors and their size. The micro-USB connector, for example, reduces connector height and depth, allowing for slimmer overall designs. Using the USB industry standard and a common connector type for devices such as chargers and headsets, greatly reduces the waste associated with new phone purchases by allowing re-use of the devices. Applications with Multiple USB Controllers The FSA805 UART port (RxD_HOST, TxD_HOST) can be used as a High-speed USB interface. This allows it to operate in an application with two USB controllers (one full speed, and the other full or high speed). In this configuration, it is recommended to configure the switches to OPEN before switching to the other (second) USB interface. The OPEN setting duration should be long enough for the accessory to go to a SE0 state, so when the switch is set to the other (second) USB port, the new controller re-enumerates. Using just five wires for all connection types considerably reduces the cost of wired accessories and simplifies their construction. The FSA805 facilitates adopting this methodology because it is designed to redirect the DP/DM pins from the USB connector to one of three ports at the baseband’s discretion. Table 1. Mode Descriptions The FSA805 has two select pins to control the switching operations, SEL[0], and SEL[1]. Table 1 describes mode operation. Selection Truth Table SEL[1] SEL[0] Switch Action Description 0 0 OPEN Open all switch paths (device in low-power mode)(1) 0 1 USB, UART Closes USB/UART1 path to D+/D-, default condition - DP_CON connected to RxD_HOST - DM_CON connected to TxD_HOST 1 0 USB, UART Closes USB/UART2 path to D+/D- DP_CON connected to DP_HOST - DM_CON connected to DM_HOST 1 1 AUDIO (2) Closes audio path to D+/D- only - DP_CON connected to R_HOST - DM_CON connected to L_HOST Notes: 1. When the audio switch is in the OPEN position (Table 1, line1), the R and L are terminated to GND with internal termination resistors to discharge any stray capacitance that could cause audio pop. 2. The SELECT pins are CMOS inputs and should not be left in a floating condition. Some applications require the UART path be in the CLOSED position on power-up for initial programming of the device under test. If that condition is desired, the two SELECT pins should be pulled to the correct levels with external resistors that should exceed 100K to reduce the static power consumption. In other applications, adding weak pull-down resistors to GND defaults the device to all paths open (low-power mode). © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 3 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Functional Description GND DM_CON DP_CON SEL[1] 12 11 10 9 VCC 2 7 R_HOST 3 4 5 6 RxD_HOST L_HOST TxD_HOST 8 DM_HOST 1 DP_HOST SEL[0] Figure 3. 12-Pin, UMLP Pin Assignments (Top-Through View) Pin Descriptions Name Pin # Description USB Interface DP_HOST 3 DM_HOST 4 D+ signal, dedicated USB port to be connected to the resident USB transceiver on the phone. Can also be used for UART signaling. D- signal, dedicated USB port to be connected to the resident USB transceiver on the phone. Can also be used for UART signaling. Audio Interface R_HOST 7 Right audio channel from phone audio-out codec L_HOST 8 Left audio channel from phone audio-out codec 5 Tx connection from resident UART transceiver on the phone. Can also be used for HS USB signaling. 6 Rx connection from resident UART transceiver on the phone. Can also be used for HS USB signaling. 2 Input voltage supply pin to be connected to the phone battery output UART Interface TxD_HOST RxD_HOST Power Interface VCC Connector Interface GND DP_CON DM_CON 9 Ground 11 Connected to the USB connector D+ pin; depending on the signaling mode, this pin can share D+, R, Rxd, or MIC signals 10 Connected to the USB connector D- pin; depending on the signaling mode, this pin can share D-, L, or Txd signals Switch Control SEL[1:0] 1,12 Switch selection pins; refer to Table 1 for truth table © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 4 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VSW Parameter Switch I/O Voltage Input Clamp Diode Current ISW Switch I/O Current (Continuous) TSTG Max. Unit -0.5 6.0 V USB -1.0 VCC +0.5 Stereo/Mono Audio Path Active -1.5 VCC +0.5 All Other Channels -0.5 VCC +0.5 Supply Voltage from Battery / Baseband IIK ISWPEAK Min. -50 Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle) V mA USB 50 Audio 60 All Other Channels 50 USB 150 mA Audio 150 mA All Other Channels 150 mA +150 C Storage Temperature Range -65 mA TJ Maximum Junction Temperature +150 C TL Lead Temperature (Soldering, 10 Seconds) +260 C IEC 61000-4-2 System ESD USB Connector Pins (D+, D-) Air Gap 13.0 Contact 8.0 JEDEC JESD22-A114, Human Body Model All Pins 4.5 JEDEC JESD22-C101, Charged Device Model All Pins 1.5 kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VSW Parameter Min. Max. Units 2.7 4.4 V USB Path Active 0 3.6 V Audio Path Active -0.8 0.8 V 0 4.4 V -40 +85 ºC Battery Supply Voltage Switch I/O Voltage UART Active TA Operating Temperature © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 5 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Absolute Maximum Ratings All typical values are at TA=25ºC unless otherwise specified. Symbol Parameter VCC (V) Conditions TA = -40 to +85°C Min. Typ. Max. Unit Host Interface Pins (SEL[1:0]) VIH Input High Voltage 3.2 to 4.4 VIL Input Low Voltage 3.2 to 4.4 1.3 V 0.7 V 10 µA 3.6 V 9 Ω 0.8 V 3 Ω Switch Off Characteristics IOFF Power Off Leakage Current 0 All Ports Except Audio Path VSW=0V to 4.4V, Figure 9 USB Switch On Path USB Analog Signal Range RONUSB 3.2 to 4.4 HS Switch On Resistance(3) 3.2 to 4.4 0 VD+/D-=0V, 0.4V, ION=8mA, Figure 8 6 Audio R/L Switch On Paths Audio Analog Signal Range RONAUD 3.2 to 4.4 (3) Audio Switch On Resistance (4) RFLAT Audio RON Flatness RTERM Internal Termination Resistors(5) -0.8 3.2 to 4.4 V =-0.8V, 0.8V, I =30mA, L/R ON Figure 8 3.2 to 4.4 0.1 Ω 1 kΩ UART Switch On Path Analog Signal Range RONUART Switch On Resistance(3) 3.2 to 4.4 VSW=0V, 4.4V, ION=8mA 0 VCC 3.2 to 4.4 VTxD/RxD=0V, 3.2V, ION=8mA, Figure 8 25 V Ω Total Switch Current Consumption ICCSL Battery Supply Sleep Mode Average Current 3.2 to 4.4 Static Current During Sleep Mode (SEL[1:0]=0) 10 15 µA ICCWK Battery Supply Active Mode Average Current 3.2 to 4.4 Average Pulse Current (~100µs Pulse) 80 110 µA ICCSELT Increase in ICCSL/ICCWK Current per Control Voltage and VCC 3.2 to 4.4 VSEL = 2.8V and VCC = 4.4V 8 µA VSEL = 1.8V and VCC = 4.4V 10 µA Notes: 3. On resistance is determined by the voltage drop between the both sides of the switch at the indicated current through the switch. 4. Flatness is defined as the difference between the maximum and minimum values of on resistance over the specified range of conditions. 5. Guaranteed by characterization; not production tested. © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 6 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Switch Path DC Electrical Characteristics All typical value are for VCC =3.8V at TA=25ºC unless otherwise specified. Symbol Parameter Conditions Audio Mode Q Charge Injection 1.0nF, VS=0V, RS=0Ω UART Mode USB Mode Active Channel Crosstalk DP_CON to DM_CON Audio Mode UART Mode USB Mode Xtalk Active Channel Crosstalk MIC MIC on VBUS to R_HOST, L_HOST MIC on DP_CON to L_HOST (DM_CON) Audio Path L_HOST to DM_CON, R_HOST to DP_CON OIRR tJ BW Total Jitter (USB Mode) -3db Bandwidth (USB Mode DPHost/DMHost) Figure 4 pC Figure 13 dB Figure 12 dB Figure 11 6 -95 f=1MHz, RT=50Ω, CL=0pF -75 f=20kHz, RT=32Ω, CL=0pF -105 f=20kHz, RT=32Ω, CL=0pF -100 -80 f=1 MHz, RT=50Ω, CL=0pF UART Path TxD_HOST to DM_CON, RxD_HOST to DP_CON Unit 4 f=20kHz, RT=32Ω, CL=0pF USB Path Off Isolation Rejection Ratio DM_HOST to DM_CON, DP_HOST to DP_CON THD+N Total Harmonic Distortion + Noise (Audio Path) Typical -85 20Hz to 20kHz, RL=16Ω, Input Signal Range 1.6VPP 0.037 % Figure 16 20Hz to 20kHz, RL=32Ω, Input Signal Range 1.6VPP 0.025 % Figure 16 RL=50Ω, CL=50pF, tr=tf=500ps (10-90%) at 480Mbps (PRBS=215–1) 130 ps RL=50Ω, CL=0pF 1150 MHz Figure 10 RL=50Ω, CL=5pF 550 MHz Figure 10 Note: 6. Guaranteed by characterization; not production tested. © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 7 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Switch Path AC Electrical Characteristics(6) Symbol Parameter VCC (V) CIN Select Pins Capacitance(7) 0 CON(D+, D-) D+, D- On Capacitance (7) (HS USB Mode) 3.8 Conditions TA = -40 to +85°C Min. Typ. Max. Unit Figure VBIAS=0.2V 2.0 pF Figure 14 VBIAS=0.2V, f=1MHz 6.5 pF Figure 15 Note: 7. Guaranteed by characterization; not production tested. High Speed USB Eye Compliance Results for All FSA805 Signal Paths The following figures show high-speed USB 2.0 eye diagrams for each path of the FSA805. Full compliance reports are available upon request. Figure 4 shows the eye diagram of the high-speed USB source used for testing of the FSA800 and FSA805 paths. Figure 4. High-Speed Eye Diagram for Source Used for All Testing Figure 5. USB (DP_HOST/DM_HOST) Path High-Speed Eye Diagram Figure 6. UART (TxD_HOST/RxD_HOST) High-Speed Eye Diagram Figure 7. Audio Path High-Speed Eye Diagram © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 8 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Capacitance VON I A(OFF) NC nBn A nA V IN V IN GND I ON Select RON = VON / ION V Sel = Select VSel = GND 0 or Vcc GND 0 orVcc **Each switch port is tested separately. Figure 8. On Resistance Figure 9. Off Leakage Network Analyzer Network Analyzer RS RS V IN GND VS VSel GND VSel VOU T GND RL and CL are functions of the application environment (see AC/DC tables). L test fixture and stray capacitance. CL includes GND GND VOUT GND RT GND RS and RT are functions of the application environment (see AC/DC tables). GND VS GND RT GND RT GND Off-Isolation = 20 Log (VOUT / VIN ) Figure 10. Bandwidth Figure 11. Channel Off Isolation Network Analyzer NC RS VS1, S2, S3 GND VIN VS GND GND RT GND VOUT GND RS and RT are functions of the application environment (see AC tables for values). RT GND CROSSTALK = 20 Log (VOUT / VIN ) Figure 12. Adjacent Channel Crosstalk © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 9 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Test Diagrams Generator VCC B VS RS VIN Input – VSEL mA CL GND nSn Off On Off 0V VOUT VOUT GND VOUT VSEL CL includes test fixture and stray capacitance GND Q = VOUT • CL Figure 13. Charge Injection Test nBn Capacitance Meter f = 1MHz Capacitance Meter nSn VSel = 0 or Vcc nBn nSn V Sel = f = 1MHz 0 orV cc nBn nBn Figure 14. Channel Off Capacitance Figure 15. Channel On Capacitance Audio Analyzer RS GND V IN VS GND V CNTRL GND VSel = GND 0 or Vcc RS and RT are functions of the application environment (see AC Tables for specific values). V OUT RT GND Figure 16. Total Harmonic Distortion © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 10 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Test Diagrams (Continued) 0.10 C A 1.80 2X 2.55 12X 0.75 B 1 2.55 1.80 PIN #1 QUADRANT 0.40 0.10 C 12X 2X TOP VIEW 0.20 RECOMMENDED LAND PATTERN ALL DIMENSIONS REFERENCE 0.55 MAX. 0.10 C 0.08 C 0.152 SEATING PLANE 0.05 0.00 C SIDE VIEW 3 6 0.40 0.425 TYP 11X 0.45 0.35 0.100 1 12 0.44 0.40 0.100 9 0.22 10X 0.18 0.10 C A B 0.05 C BOTTOM VIEW 0.100 DETAIL A PIN #1 TERMINAL SCALE: 2X A. DIMENSIONS ARE IN MILLIMETERS. B. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C. LANDPATTERN PER IPC LANDPATTERN CALCULATOR V 2009.18.00 D. DRAWING FILENAME: MKT-UMLP12A REVISION2 Figure 17. 12-Lead Quad, UMLP, 1.8x1.8mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0 www.fairchildsemi.com 11 FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability Physical Dimensions FSA805 — USB2.0 High-Speed (480Mbps), UART, and Audio Switch with Negative Signal Capability 12 www.fairchildsemi.com © 2009 Fairchild Semiconductor Corporation FSA805 • Rev. 1.0.0