FSA3200 —Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Features Description The FSA3200 is a bi-directional, low-power, two-port, high-speed, USB2.0 and video data switch. Configured as a double-pole, double-throw (DPDT) switch for data and a single-pole, double-throw (SPDT) switch for ID; it is optimized for switching between high- or full-speed USB and Mobile Digital Video sources (MDV), including supporting the MHL™ Rev. 2.0 specification. Low On Capacitance: 2.7 pF / 3.1 pF MHL / USB (Typical) Low Power Consumption: 30μA Maximum Supports MHL Rev. 2.0 MHL Data Rate: 4.68 Gbps VBUS Powers Device with No VCC Packaged in 16-Lead UMLP (1.8 x 2.6 mm) Over-Voltage Tolerance (OVT) on all USB Ports Up to 5.25 V without External Components Applications Cell Phones and Digital Cameras The FSA3200 contains special circuitry on the switch I/O pins, for applications where the VCC supply is powered off (VCC=0), that allows the device to withstand an over-voltage condition. This switch is designed to minimize current consumption even when the control voltage applied to the control pins is lower than the supply voltage (VCC). This feature is especially valuable to mobile applications, such as cell phones, allowing direct interface with the general-purpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, digital cameras, and notebook computers. Ordering Information Part Number FSA3200UMX Top Mark Operating Temperature Range GB -40 to +85°C Package 16-Lead, Ultrathin Molded Leadless Package (UMLP), 1.8 x 2.6 mm Figure 1. Analog Symbol All trademarks are the property of their respective owners. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) November 2012 operating supply power with VCC present, the VBUS supply is not utilized and normal switch operation commences. Optionally, the Power Select Override (PSO) pin can be set HIGH to force the device to be powered from VBUS. In normal operation, the FSA3200 is powered from the VCC pin, which typically is derived from a regulated power management device. In special circumstances, such as production test or system firmware upgrade, the device can be powered from the VBUS pin. In this mode of operation, a valid VBUS voltage is present (per USB2.0 specification) and VCC=0 V, typically due to a no-battery condition. With the SELn pins strapped LOW (via external resistor), the FSA3200 closes the USB path, enabling the initial programming of the system directly from the USB connector. Once the system has normal VBUS The VBUS / VCC detection capability is not intended to be an accurate determination of the voltages present, rather a state condition detection to determine which supply should be used. These state determinations rely on the voltage conditions as described in the Electrical Characterization tables below. VCC PSO Switch Power Selection Switch Power Source Charge Pump & Regulator Switch Power Figure 2. Simplified Logic of Switch Power Selection Circuit Table 1. Switch Power Selection Truth Table VCC VBUS PSO(1) Switch Power Source 0 0 0 No switch power, switch paths high-Z 0 1 0 VBUS 1 0 0 VCC 1 1 0 VCC 0 0 1 No switch power, switch paths high-Z 0 1 1 VBUS 1 0 1 VCC(2) 1 1 1 VBUS Notes: 1. Control inputs should never be left floating or unconnected. If the PSO function is used, a weak pull-up resistor (3 MΩ) should be used to minimize static current draw. If the PSO function is not used, tie directly to GND. 2. PSO control is overridden with no VBUS and the power selection is switched to VCC. FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Switch Power Operation Table 2. Data Switch Select Truth Table SEL1(3) SEL2(3) 0 0 D+/D- connected to USB+/USB-, IDCO connected to IDUSB 0 1 D+/D- connected to USB+/USB-, IDCOM connected to IDMDV 1 0 D+/D- connected to MDV+/MDV-, IDCOM connected to IDUSB 1 1 D+/D- connected to MDV+/MDV-, IDCOM connected to IDMDV Function Note: 3. Control inputs should never be left floating or unconnected. To guarantee default switch closure to the USB position, the SEL pins should be tied to GND with a weak pull- down resistor (3 MΩ) to minimize static current draw. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 2 Figure 3. Pin Assignments (Top-Through View) Pin Definitions Pin# Name Description 1 GND 2 D+ Data Switch Output (Positive) 3 D- Data Switch Output (Negative) 4 PSO Power Select Override 5 SEL1 Data Switch Select 6 USB- USB Differential Data (Negative) 7 USB+ USB Differential Data (Positive) 8 GND Ground Ground 9 SEL2 ID Switch Select 10 MDV- MDV Differential Data (Negative) 11 MDV+ MDV Differential Data (Positive) 12 IDUSB ID Switch MUX Output for USB 13 IDMDV ID Switch MUX Output for MDV 14 IDCOM ID Switch Common 15 VBUS Device Power when VCC Not Available 16 VCC Device Power from System(4) FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Pin Configuration Note: 4. Device automatically switches from VBUS when valid VCC minimum voltage is present. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC, VBUS Parameter Supply Voltage (5) Min. Max. Unit -0.5 5.5 V -0.5 VCC V 5.25 V VCNTRL DC Input Voltage (SELn, PSO) VSW(6) DC Switch I/O Voltage -0.50 IIK DC Input Diode Current -50 (5) IOUT DC Output Current TSTG Storage Temperature MSL Moisture Sensitivity Level (JEDEC J-STD-020A) -65 100 mA +150 °C 1 All Pins 3.5 (7) Contact 8.0 (7) Air 15.0 Human Body Model, JEDEC: JESD22-A114 ESD mA IEC 61000-4-2, Level 4, for D+/D- and VCC Pins IEC 61000-4-2, Level 4, for D+/D- and VCC Pins kV 2.0 Charged Device Model, JESD22-C101 Notes: 5. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. 6. VSW refers to analog data switch paths (USB, MDV, and ID). 7. Testing performed in a system environment using TVS diodes. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VBUS Supply Voltage Running from VBUS Voltage 4.20 5.25 V VCC Supply Voltage Running from VCC 2.7 4.5 V tRAMP(VBUS) Power Supply Slew Rate from VBUS 100 1000 µs/V tRAMP(VCC) Power Supply Slew Rate from VCC 100 1000 µs/V 336 C°/W 0 4.5 V ΘJA VCNTRL Thermal Resistance Control Input Voltage (SELn, PSO) (8) VSW(USB) Switch I/O Voltage (USB and ID Switch Paths) -0.5 3.6 V VSW(MDV) Switch I/O Voltage (MDV Switch Path) 1.65 3.45 V Operating Temperature -40 +85 °C TA FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Absolute Maximum Ratings Note: 8. The control inputs must be held HIGH or LOW; they must not float. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 4 All typical value are at TA=25°C unless otherwise specified. Symbol Parameter Condition VCC (V) VIK Clamp Diode Voltage IIN=-18 mA 2.7 VIH Control Input Voltage High SELn, PSO 2.7 to 4.3 VIL Control Input Voltage Low SELn, PSO 2.7 to 4.3 IIN Control Input Leakage VSW=0 V to 3.6 V, VCNTRL=0 V to 1.98 V 4.3 IOZ(MDV) Off-State Leakage for Open MDV Data Paths VSW=1.65 V ≤ MDV ≤ 3.45 V IOZ(USB) Off-State Leakage for Open USB Data Paths VSW=0 V ≤ USB ≤ 3.6 V IOZ(ID) Off-State Leakage for Open ID VSW=0 V ≤ ID ≤ 3.6 V Data Path TA=- 40ºC to +85ºC Min. Typ. Max. -1.2 1.25 Unit V V 0.6 V -1 1 µA 4.3 -1 1 µA 4.3 -1 1 µA 4.3 -0.5 0.5 µA ICL(MDV) On-State Leakage for Closed (9) MDV Data Paths VSW=1.65 V ≤ MDV ≤ 3.45 V 4.3 -1 1 µA ICL(USB) On-State Leakage for Closed (9) USB Data Paths VSW=0 V ≤ USB ≤ 3.6 V 4.3 -1 1 µA On-State Leakage for (9) Closed ID Data Path VSW=0 V ≤ ID ≤ 3.6 V 4.3 -0.5 0.5 µA Power-Off Leakage Current (All I/O Ports) VSW=0 V or 3.6 V, Figure 5 0 -1 1 µA RON(USB) HS Switch On Resistance (USB to D Path) VSW=0.4 V, ION=-8 mA Figure 4 2.7 3.9 6.5 Ω RON(MDV) HS Switch On Resistance (MDV to D Path) VSW=VCC-1050mV, ION=-8mA, Figure 4 2.7 5 Ω RON(ID) LS Switch On Resistance (ID Path) VSW=3V, ION=-8mA Figure 4 2.7 12 Ω ICL(ID) IOFF Difference in R Between VSW=VCC-1050 mV, ION=-8 mA, Figure 4, 2.7 0.03 Ω Difference in R Between VSW=0.4 V, ION=-8 mA Figure 4 2.7 0.18 Ω VSW=3 V, ION=-8 mA Figure 4 2.7 0.4 Ω VSW=1.65 V to 3.45 V, ION=-8 mA, Figure 4 2.7 1 Ω ON ∆RON(MDV) MDV Positive-Negative ON ∆RON(USB) USB Positive-Negative ∆RON(ID) Difference in RON Between ID Switch Paths RONF(MDV) Flatness for RON MDV Path IVBUS VBUS Quiescent Current VBUS=5.25 V, VCNTRL=0 V or 1.98 V, IOUT=0 4.3 100 µA ICC VCC Quiescent Current VBUS=0 V, VCNTRL=0 V or 1.98 V, IOUT=0 4.3 30 µA FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) DC Electrical Characteristics Note: 9. For this test, the data switch is closed with the respective switch pin floating. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 5 All typical value are for VCC=3.3 V and TA=25°C unless otherwise specified. Symbol Parameter Condition VCC (V) TA=- 40ºC to +85ºC Min. Typ. Max. Unit tON Turn-On Time, SELn to Output RL=50 Ω, CL=5 pF, VSW(USB)=0.8 V, VSW(MDV)=3.3 V, Figure 6, Figure 7 2.7 to 3.6 445 600 ns tOFF Turn-Off Time, SELn to Output RL=50 Ω, CL=5 pF, VSW(USB)=0.8 V, VSW(MDV)=3.3V, Figure 6, Figure 7 2.7 to 3.6 125 300 ns tPD Propagation Delay(10) CL=5 pF, RL=50 Ω, Figure 6, Figure 8 2.7 to 3.6 0.25 tBBM Break-Before-Make(10) RL=50 Ω, CL=5 pF, VID=VMDV=3.3 V, VUSB=0.8 V, Figure 10 2.7 to 3.6 VS=1 Vpk-pk, RL=50 Ω, f=240 MHz, Figure 12 2.7 to 3.6 -45 dB VS=400m Vpk-pk, RL=50Ω, f=240MHz, Figure 12 2.7 to 3.6 -38 dB VS=1 Vpk-pk, RL=50 Ω, f=240 MHz, Figure 13 2.7 to 3.6 -44 dB VS=400 mVpk-pk, RL=50 Ω, f=240 MHz, Figure 13 2.7 to 3.6 -39 dB OIRR(MDV) Off Isolation (10) OIRR(USB) XtalkMDV XtalkUSB (10) Non-Adjacent Channel Crosstalk VIN=1 Vpk-pk, MDV Path, RL=50 Ω, CL=0 pF, Figure 11, Figure 16 BW Differential -3 db Bandwidth(10) VIN=400 mVpk-pk, USB Path, RL=50 Ω, CL=0 pF, Figure 11, Figure 17 ID Path, RL=50 Ω, CL=0 pF, Figure 11 Note: 10. Guaranteed by characterization. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 2.0 ns 13 ns 2.34 GHz 2.7 to 3.6 1.59 100 MHz FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) AC Electrical Characteristics www.fairchildsemi.com 6 Typical values are at TA= -40ºC to +85ºC. Symbol tSK(P) tJ Parameter Condition VCC (V) Typ. Unit Skew of Opposite Transitions of the Same Output(11) CL=5 pF, RL=50 Ω, Figure 9 3.0 to 3.6 3 ps Total Jitter(11) RL=50 Ω, CL=5 pf, tR=tF=500 ps (10-90%) at 480 Mbps, PN7 3.0 to 3.6 15 ps VCC (V) Typ. Unit Note: 11. Guaranteed by characterization. MDV AC Electrical Characteristics Typical values are at TA= -40ºC to +85ºC. Symbol tSK(P) tJ Parameter Condition Skew of Opposite Transitions of the Same Output(12) RPU=50 Ω to VCC, CL=0 pF 3.0 to 3.6 3 ps Total Jitter(12) f=2.25 Gbps, PN7, RPU=50 Ω to VCC, CL=0 pF 3.0 to 3.6 15 ps Typ. Unit Note: 12. Guaranteed by characterization. Capacitance Typical values are at TA= -40ºC to +85ºC. Symbol Parameter Condition Control Pin Input Capacitance(13) VCC=0 V, f= 1 MHz 1.5 CON(USB) USB Path On Capacitance(13) VCC=3.3 V, f=240 MHz, Figure 15 3.1 COFF(USB) USB Path Off Capacitance(13) VCC=3.3 V, f=240 MHz, Figure 14 1.6 CON(MDV) (13) VCC=3.3 V, f=240 MHz, Figure 15 2.7 COFF(MDV) MDV Path Off Capacitance(13) VCC=3.3 V, f=240 MHz, Figure 14 1.1 CIN MDV Path On Capacitance pF FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) USB High-Speed AC Electrical Characteristics Note: 13. Guaranteed by characterization. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 7 Note: 14. HSD refers to the high-speed data USB or MDV paths. VON I Dn(OFF) NC HSDn A Dn VSW VSW Select GND RO ION Select = VO / ION V Sel = V Sel = GND 0 or VC GND 0 orV V cc **Each switch port is tested separately Figure 4. On Resistance Figure 5. Off Leakage tRISE = 2.5ns tFALL = 2.5ns VCC GND Input – VSEL1, VSEL 10% GND VOH Output- VOUT VOL Figure 6. AC Test Circuit Load 90% 90% VCNTRL-HI VCNTRL-HI 90% tON 90% tOF F Figure 7. Turn-On / Turn-Off Waveforms tRISE = 500ps 50% Input 0V 400mV +400mV tPHL - 400mV 90% 0V 50% tPLH 10% 10% tFALL = 500ps 90% FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Test Diagrams 10% VOH Output 50% 50% Output VOL t PHL Figure 8. Propagation Delay (tRtF – 500 ps) © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 t PLH Figure 9. Intra-Pair Skew Test tSK(P) www.fairchildsemi.com 8 tRISE = 2.5ns Vcc HSDn VSW1 GND 0V VOUT CL VSW2 90% Vcc/2 Input VSel 10% Dn RL VOUT GND GND 0.9*Vout 0.9*Vout RS tBBM VSel GND RL , RS and CL are function of application environment (see AC Tables for specific values) CL includes test fixture and stray capacitance Figure 10. Break-Before-Make Interval Timing Network Analyzer VS Network Analyzer FSA3200 RS RS VIN RT VOUT RT VIN GND RT GND RS VS Network Analyzer VSel VOUT VS GND GND V OUT GND GND V IN GND RT RS and RT are functions of the application environment (see AC Tables for specific values). GND Off isolation = 20 Log (V OUT / VIN) VS, RS and RT are function of application environment (see AC/DC Tables for values) Figure 11. Insertion Loss Figure 12. Channel Off Isolation Network Analyzer NC RS V IN GND VS VSel GND GND RT GND GND RS and RT are functions of the application environment (see AC Tables for specific values). RT V OUT GND FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Test Diagrams (Continued) Crosstalk = 20 Log (VOUT / VIN) Figure 13. Non-Adjacent Channel-to-Channel Crosstalk HSDn Capacitance Meter S Capacitance Meter S VSel = 0 or Vcc V Sel = 0 or Vcc HSDn HSDn Figure 14. Channel Off Capacitance © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 HSDn Figure 15. Channel On Capacitance www.fairchildsemi.com 9 One of the key factors for using the FSA3200 in mobile digital video applications is the small amount of insertion loss experienced by the received signal as it passes through the switch. This results in minimal degradation of the received eye. One of the ways to measure the quality of the high data rate channels is using balanced ports and 4-port differential S-parameter analysis, particularly SDD21. Bandwidth is measured using the S-parameter SDD21 methodology. Figure 16 shows the bandwidth (GHz) for the MDV path and Figure 17 the bandwidth curve for the USB path. Figure 16. MDV Path SDD21 Insertion Loss Curve FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Insertion Loss Figure 17. USB Path SDD21 Insertion Loss Curve © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 10 Figure 18 shows the FSA3200 utilizing the VBUS connection from the micro-USB connector. The 3M resistor is used to ensure, for manufacturing test via the micro-USB connector, that the FSA3200 configures for connectivity through the FSA9280A accessory switch. Figure 19 shows the configuration for the FSA3200 “self powered” by the battery only. Figure 18. Typical FSA3200 Application Using VBUS FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Typical Applications Figure 19. Typical FSA3200 “Self-Powered” Application Using VBAT © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 11 1.80 0.10 C A 2.10 B 0.563 (15X) 0.663 2X 1 2.60 PIN#1 IDENT 0.10 C TOP VIEW 0.10 C 2.90 0.40 0.55 MAX. 0.08 C 0.225 (16X) 2X RECOMMENDED LAND PATTERN 0.152 TERMINAL SHAPE VARIANTS SEATING C PLANE 0.05 0.00 0.40 0.60 SIDE VIEW 0.15 0.25 0.45 0.35 15X 0.10 0.10 PIN 1 5 0.30 15X 0.50 0.15 0.25 NON-PIN 1 Supplier 1 9 0.40 0.30 0.50 0.15 0.25 1 0.15 15X 0.25 PIN 1 PIN#1 IDENT 16 0.55 0.45 BOTTOM VIEW NON-PIN 1 0.3015X 0.50 Supplier 2 13 0.25 0.15 0.10 C A B 0.05 C R0.20 PACKAGE EDGE NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP16Arev4. F. TERMINAL SHAPE MAY VARY ACCORDING TO PACKAGE SUPPLIER, SEE TERMINAL SHAPE VARIANTS. LEAD OPTION 1 SCALE : 2X LEAD OPTION 2 SCALE : 2X FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) Physical Dimensions Figure 20. 16-Lead, Ultrathin Molded Leadless Package (UMLP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 12 FSA3200 — Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHL™) © 2010 Fairchild Semiconductor Corporation FSA3200 • Rev. 1.0.8 www.fairchildsemi.com 13