FSA2147 - Fairchild Semiconductor

FSA2147 — Low-Voltage, DPST Analog Switch with
Negative Signal Capability and Built-in Termination
to Eliminate Pop
Features
Description
ƒ
Built-In Termination on Unselected Audio Paths
Inhibits Audio Pop
ƒ
ƒ
ƒ
ƒ
ƒ
6pF Typical Switch Off Capacitance
The FSA2147 is a Double-Pole, Single Throw (DPST)
switch. The audio path defaults to audio mute and is
enabled with /OE. The FSA2147 includes a power-off
feature on the common port when VCC=0V to guarantee
signal isolation.
2.5Ω Typical On Resistance
Negative-Swing-Capable
IMPORTANT NOTE:
Power-Off Protection
For
additional
information,
[email protected].
Flow-Through Pin Out Eliminates PCB Vias
please
contact
Applications
ƒ
MP3 Player, Cell Phone, PDA, Digital Camera, and
Notebook Computers
Ordering Information
Part
Number
Top
Mark
FSA2147K8X
2147
Operating
Eco
Temperature Range Status
-40°C to +85°C
RoHS
Package Description
Packing
Method
8-Lead US8, JEDEC MO-187, Variation
CA, 3.0mm Wide Package
3000 Units
Tape and Reel
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
VCC
Rpu
Control
Block
R
/OE
R
RT
L
L
RT
Figure 1.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
Analog Symbol
www.fairchildsemi.com
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
July 2009
NC
1
8
VCC
/R
2
7
/OE
/L
3
6
R
GND
4
5
L
Figure 2.
8-Pin US8
Pin Descriptions
Pin #
Name
Description
8
VCC
Power supply.
7
/OE
Output enable. This pin defaults HIGH, allowing the user to mute the audio channel during
power up. The audio path is only connected when /OE is driven LOW.
6, 5
R, L
Audio right and left input sources.
2, 3
/R, /L
Audio common connector port.
Truth Table
VCC
/OE
LOW
Switch
OPEN
HIGH
LOW
ON
HIGH
HIGH
OPEN
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
www.fairchildsemi.com
2
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Pin Configuration
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VCC
Supply Voltage
/OE
Output Enable Control Signal
VSW
Max.
Units
-0.5
4.6
V
-0.5
4.6
V
4.6
V
IIK
Input Clamp Diode Current
- 50
mA
ISW
Switch I/O Current (Continuous)
100
mA
Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle)
150
mA
+150
°C
ISWPEAK
TSTG
Switch I/O Voltage
(1)
Min.
VCC–4.6
Storage Temperature Range
-65
TJ
Maximum Junction Temperature
+150
°C
TL
Lead Temperature (Soldering, 10 seconds)
+260
°C
ESD
Human Body Model, JEDEC: JESD22-A114
Charged Discharge Model, JEDEC: JESD22-C101
I/O to GND
12
All Other Pins
2
VCC to GND
12
kV
2
Note:
1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Units
VCC
Supply Voltage
2.7
4.3
V
/OE
Output Enable Control Signal
3.0
4.3
V
VSW
Switch I/O Voltage
VCC -4.3
4.3
V
-40
+85
°C
TA
Operating Temperature
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
www.fairchildsemi.com
3
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Absolute Maximum Ratings
All typical values are at 25ºC unless otherwise specified.
Symbol
Parameter
VCC (V)
Conditions
TA = -40 to +85°C
Min.
(5)
Typ.
Unit
Max.
Common Pins
VIK
Clamp Diode Voltage
3.0
VIH
Control Input Voltage
HIGH
2.7 to 4.3
VIL
Control Input Voltage
LOW
2.7 to 4.3
IIN
/OE Input Leakage
Current
4.3
IOFF
Power Off Leakage
Current (Common Port
Only /R, /L)
0
INC(0N)
On-Leakage Current of
Port /R or /L
4.3
RPu,
/OE Internal Pull-Up
Resistor
4.3
RT
Audio Path Termination
Resistors
4.3
VAudio
Analog Signal Range
RONAudio
Switch On Resistance
2.7
∆RONAudio
Delta RON
(3)
RFLAT(Audio)
(4)
-1.2
1.7
V
0.6
1
-1
µA
Common Port (/R, /L)
VSW = 4.3V or Floating
-10
10
µA
/R, /L = 0.3V, 4.0V
R, L = Floating
Figure 8
-250
250
nA
VIN = 4.3V
VIN=0.3V or 4.0V
1
3
MΩ
100
Ω
VCC4.3V
2.7 to 4.3
(2)
RON Flatness
IIK = -18mA
VCC
V
3.0
Ω
VL/R = -1.5V, 0V,1.5V
ION = 60ma
1.5
2.7
VL/R = 0.7V ION = 60mA
0.4
2.7
VSW=-1.5V to 1.5V,
ION = 60mA
0.4
0.8
Ω
4.3
/OE = Low or VCC, IOUT = 0
1.5
15
µA
Ω
Power Supply
ICC
Quiescent Supply Current
Notes:
2. On resistance is determined by the voltage drop between the A and B pins at the indicated current through the switch.
3. ∆ RON = RON max – RON min measured at identical VCC, temperature, and voltage.
4. Flatness is defined as the difference between the maximum and minimum values of on resistance over the
specified range of conditions.
5. Guaranteed by characterization; not production tested.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
www.fairchildsemi.com
4
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
DC Electrical Characteristics
All typical value are for VCC = 3.6V at 25ºC unless otherwise specified.
Symbol
Parameter
VCC (V)
Conditions
TA = - 40 to +85°C
(6)
Min. Typ.
Unit
Max.
2.7 to 4.3
V/R,/L = 1.0V
RL = 50Ω, CL = 50Pf
Figure 9, Figure 10,
Figure 11
2
μs
Turn-Off Time, /OE to Output
2.7 to 4.3
V/R,/L = 1.0V
RL = 50Ω, CL = 50pF
Figure 9, Figure 10,
Figure 11
2
μs
Xtalk
Non-Adjacent Channel Crosstalk
(Audio Mode)
3.3 to 4.3
f = 20kHz, RT = 32Ω,
CL = 0pF
Figure 16
-75
dB
THD
Total Harmonic Distortion
(Audio Mode)
3.0 to 4.3
f = 20Hz to 20 kHz
RL = 32Ω, VIN = 2Vpp
Figure 14
0.05
%
SNR
Signal-to-Noise Ratio (Audio
Mode)
3.3 to 4.3
f = 20kHz to 20kHz,
RL = 32Ω, VIN = 2VPP
Figure 14
80
dB
tON
tOFF
Turn-On Time, /OE to Output
Note:
6. Guaranteed by characterization; not production tested.
Capacitance
All typical values are at 25ºC unless otherwise specified.
Symbol
Parameter
VCC (V)
Conditions
TA = - 40 to +85°C
Min.
CIN
Control Pin Input Capacitance
3.0 to 4.3
VBIAS = 0.2V
(7)
Typ.
2.5
Unit
Max.
pF
Note:
7. Guaranteed by characterization; not production tested.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
www.fairchildsemi.com
5
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
AC Electrical Characteristics
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Typical Characteristics
4.00
RON (Ω)
3.00
-40°C
25°C
85°C
2.00
1.00
0.00
-2.00
-1.00
0.00
1.00
2.00
VIN
Figure 3.
RON, VCC=2.7V
4.00
RON (Ω)
3.00
-40°C
25°C
85°C
2.00
1.00
0.00
-2.00
-1.00
0.00
1.00
2.00
VIN
Figure 4.
0
RON, VCC=2.7V
1
10
100
Harmonic Distortion (%)
0.06
0.05
0.04
V CC = 3.0V
V CC = 3.6V
0.03
VCC = 4.3V
0.02
0.01
0.00
Frequency (KHz)
Figure 5.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
Total Harmonic Distortion
www.fairchildsemi.com
6
VON
IDn(OFF)
NC
A
Dn
V IN
VIN
ION
/OE
/OE
GND
GND
V S = 0 to VCC
GND
VS = 0 or VCC
Each switch port is tested separately.
R ON = VON / ION
Figure 6.
On Resistance
Figure 7.
Off Leakage
HSD
VIN
IA(ON)
R/L
RL VOUT
CL*
RS
GND
A
D+/R or
D-
GND
Vsw
V/OE
GND
GND
VCNTRL= fn (VCC)
RL, RS, and CL are functions of the application environment
(see tables for specific values).
*CL includes test fixture and stray capacitance.
Figure 8.
On Leakage
Figure 9.
VCC
90%
Input – /OE
VCC/2
GND
t RISE = 1µs
tFALL = 2.5ns
tRISE = 2.5ns
Input -VCNTRL
10%
GND
VOH
10%
VOH
90%
Output -VOUT
90%
VOL
Output – VOUT
VOL
tON
Figure 10.
tOFF
90%
Vth(max)
Vth(min)
90%
tON
10%
90%
tOFF
VCNTRL = fn (VCC)
Turn-On / Turn-Off Waveforms
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
t FALL= 1µs
VCC
90%
VCC/2
10%
AC Test Circuit Load
Figure 11.
Turn-On / Turn-Off Waveforms
www.fairchildsemi.com
7
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Test Diagrams
Capacitance R/L or /R or /L
Meter
R/L or /R or /L
Capacitance
Meter
V CNTRL =
f = 240MHz
fn (VCC)
R/L or
/R or /L
f = 1MHz
Figure 12.
V CNTRL =
fn (VCC)
R/L or /R or /L
Channel Off Capacitance
Figure 13.
Channel On Capacitance
Audio Analyzer
Network Analyzer
RS
GND
RS
VIN
VS
RT
GND
VCNTRL
GND
GND
VCNTROL = fn (VCC)
RS and R are functions of the application
VCNTRL
VOUT
RT
GND
GND
T
GND
VS
GND
GND
VOUT
GND
VCNTRL = fn (VCC )
R S and R T are functions of the application
environment (see tables for specific values).
VIN
RT
GND
environment (see tables for specific values).
Off Isolation = 20 Log (VOUT / VIN )
Figure 14. Total Harmonic Distortion
Figure 15. Channel Off Isolation
Network Analyzer
NC
RS
GND
VIN
VS
VCNTRL
GND
GND
RT
GND
VCNTRL= fn (VCC)
GND
R S and R T are functions of the application
environment (see tables for specific values
RT
VOUT
GND
CROSSTALK = 20 Log (VOUT / VIN)
Figure 16.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
Non-Adjacent Channel-to-Channel Crosstalk
www.fairchildsemi.com
8
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Test Diagrams (Continued)
8
5
0.70
-B-
2.3±0.1
3.1±.1
2.70
0.15
3.40
-A-
1.80
1.00
1.55
0.30 TYP
1
0.2 C B A
ALL LEAD TIPS
4
PIN #1 IDENT.
ALL LEAD TIPS
0.1 C
0.90 MAX
0.5 TYP
DETAIL A
0.70±0.10
0.10-0.18
-C0.10
0.00
0.17-0.27
0.13
0.50TYP
A B
C
0.4 TYP
GAGE PLANE
0.12
0°-8°
A. CONFORMS TO JEDEC REGISTRATION MO-187
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS.
SEATING PLANE
DETAIL A
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
MAB08AREVC
Figure 17.
8-Lead US8, JEDEC MO-187, Variation CA, 3.0mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1
www.fairchildsemi.com
9
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
Physical Dimensions
FSA2147 — Low-Voltage, DPST Analog Switch with Negative Signal Capability and Built-in Termination to Eliminate Pop
10
www.fairchildsemi.com
© 2008 Fairchild Semiconductor Corporation
FSA2147 Rev. 1.0.1