FAN7387 Self-Oscillated, High-Voltage Gate Driver Features Description The FAN7387 is a simple control IC for common halfbridge inverters, SMPS, and ballast for fluorescent and HID lamps. The FAN7387 has an oscillating circuit using an external resistor and capacitor. Internal Clock Using RCT External Sync Function Using RCT Dead Time Control Using Resistor Shut Down (Disable Mode) Internal Shunt Regulator UVLO Function, High and Low Side Applications The frequency variation is very stable across a wide temperature range. The FAN7387 has an external pin for dead-time control and shutdown. Using this resistor, the designer can choose the optimum dead time to reduce power loss on switching devices, such as transistors and MOSFETs. Half-Bridge Inverter SMPS Ballast Solution for High-Intensity Discharge (HID) Lamp Ballast for Fluorescent Lamp 8-DIP 8-SOP Ordering Information Part Number (1) FAN7387MX Package Operating Temperature Packing Method 8-SOP -40 to +125°C Tape & Reel Note: 1. These device passed wave soldering test by JESD22A-111. © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com FAN7387 — Self-Oscillated, High-Voltage Gate Driver March 2014 C1 VDC D1 C2 VDD CT 1 RCT 2 VDD RDT 3 DT/ SD Q1 Frequency Control Q2 4 GND FAN7387 RT1 VB 8 HO 7 D2 R1 M1 C3 C5 C4 VS 6 LO 5 D3 R2 M2 Cb* RT2 C6 Shutdown GND * Note: This capacitor, Cb, is for system stability and must use at least 470nF. FAN7387 Rev1.0 Figure 1. Typical Application Circuit for SMPS (Self Oscillation Method) Figure 2. Typical Application Circuit for SMPS by Using External Signal © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 2 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Typical Applications Diagrams FAN7387 — Self-Oscillated, High-Voltage Gate Driver Typical Application Diagrams (Continued) FAN7387 FAN7387 Figure 3. Typical Application Circuit for Full-Bridge Converter Figure 4. Typical Application Circuit for Fluorescent Lamp Ballast © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 3 FAN7387 — Self-Oscillated, High-Voltage Gate Driver 15V Shunt Internal Block Diagram SHORT-PULSE GENERATOR Low-Side First Logic Dead-time Generation Figure 5. Functional Block Diagram Pin Configuration Figure 6. Pin Configurations (Top View) Pin Definitions Pin # Name Description 1 RCT Oscillator frequency set resistor and capacitor. 2 VDD Supply Voltage. 3 DT/SD 4 GND 5 LO Dead-time control and shutdown (active LOW). Signal Ground. Low-Side Output. 6 VS High-Side floating supply return. 7 HO High-Side output. 8 VB High-Side floating supply. © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 4 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol Parameter Min. Typ. Max. Unit V VB High-Side Floating Supply Voltage -0.3 625.0 -0.3 VS High-Side Offset Voltage 600.0 V VRCT RCT Pins Input Voltage VCL V ICL Clamping current level(2) 25 mA dVS/dt TA TSTG Allowable Offset Voltage Slew Rate 50 V/ns Operating Temperature Range -40 +125 °C Storage Temperature Range -65 +150 °C PD Power Dissipation JA Thermal Resistance (Junction-to-Air) 0.625 W 200 °C/W Note: 2. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD pin of this device. Recommended Operating Ratings The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Unit. VB High-Side Floating Supply Voltage VS+11 VS+14 V VS High-Side Offset Voltage 6-VDD 600 V VDD Low-Side Supply Voltage 11 14 V VHO High-Side (HO) Output Voltage GND VDD V VLO Low-Side (LO) Output Voltage GND VDD V VIH Logic “1” Input Voltage of RCT (3/4 VDD)+1 VIL Logic “0” Input Voltage of RCT RT Timing Resistor Value of RCT CT TA V (3/5 VDD)-1 V 2 k Timing Capacitor Value of RCT 100 pF Ambient Temperature -40 © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 +125 °C www.fairchildsemi.com 5 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Absolute Maximum Ratings VBIAS (VDD, VB -VS)=14.0 V, CL=1 nF, RT=50 kΩ and CT=330 pF and TA=25C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit Low-Side Supply Characteristics (VDD) VDDUV+ VDD Supply Under-Voltage Positive-Going Threshold VDD Increasing 9.50 11.00 12.50 V VDDUV- VDD Decreasing 7.5 9.0 10.5 V VDD Supply Under-Voltage Negative-Going Threshold VDDUVH VDD Supply Under-Voltage Lockout Hysteresis 14.8 2 V 15.4 V VCL Supply Camping Voltage IDD=10 mA IQDD Low-Side Quiescent Supply Current RDT=100 kΩ 220 500 µA IST Startup Supply Current VDD=9 V 50 130 µA ILK Offset Supply Leakage Current VB=VS=600 V 10 µA IPDD Low-Side Dynamic Operating Supply Current 0.8 mA High-Side Supply Characteristics (VB-VS) VBSUV+ VBS Supply Under-Voltage Negative-Going Threshold VB-VS Increasing 7.7 9.2 10.7 V VBSUV- VB-VS Decreasing 7.1 8.6 10.1 V VBS Supply Under-Voltage Negative-Going Threshold VBSUVH VBS Supply Under-Voltage Lockout Hysteresis 0.6 V IQBS High-Side Quiescent Supply Current 50 130 µA IPBS High-Side Dynamic Operating Supply Current 400 800 µA Oscillator Characteristics fosc1 Oscillation Frequency 1 RT=50 kΩ, CT=330 pF 18 20 22 kHz fosc2 Oscillation Frequency 2 RT=1 kΩ, CT=1 nF 210 250 290 kHz Duty Cycle Running Mode 47.5 49.0 % VRCT+ Upper Threshold Voltage of RCT Running Mode VDD V VRCT- Lower Threshold Voltage of RCT Running Mode VDD /4 V VIH Logic “1” Input Voltage of RCT Running Mode 3/4 VDD V VIL Logic “0” Input Voltage of RCT Running Mode tD Dead-Time RDT=100 kΩ 500 Minimum Dead-Time VDT/SD=VDD 300 D tDMIN 3/5 VDD V 600 700 ns 400 500 ns Output Characteristics IO+ Output High, Short-Circuit Pulse Current(3) PW≤10 µs 350 mA IO- Output Low, Short-Circuit Pulse Current(3) PW≤10 µs 650 mA VS Allowable Negative VS Pin voltage for Input Signal (VRCT) Propagation to HO -9.8 -7.0 V Continued on the following page... © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 6 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Electrical Characteristics VBIAS (VDD, VB -VS)=14.0 V, CL=1 nF, RT=50 kΩ and CT=330 pF and TA=25C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit Output Characteristics tON Turn-On Propagation Time VDD=VBS=14 V, VDT/SD=VDD, VRCT=4 V~VDD, fOSC=20 kHz 550 ns tOFF Turn-Off Propagation Time VDD=VBS=14 V, VDT/SD=VDD, VRCT=4 V~VDD, fOSC=20 kHz 160 ns tR Turn-On Rising Time CL=1000 pF 50 120 ns tF Turn-Off Falling Time CL=1000 pF 30 70 ns Protection Characteristics /SD+ Shutdown “1” Input Voltage /SD- Shutdown “0” Input Voltage ISD Shutdown Current tSD Shutdown Propagation Delay 2.7 V 1 VDT/SD=0 After Running Mode V 250 µA 180 ns Note: 3. These parameters, although guaranteed, is not 100% tested in production. © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 7 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Electrical Characteristics (Continued) RCT FAN7387 10 F 10 F LO DT HO Figure 7. Test Circuit for Self-Oscillation Method Figure 8. Basic Operating Waveforms of Self-Oscillation Figure 9. Shutdown Delay Definition FAN7387 10 F 10 F Figure 10. Test Circuit for Forced-Oscillation Method Using External Signal Figure 11. Basic Operation Waveforms of Forced-oscillation Method Using External Signal © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 8 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Switching Definitions 12.5 200 12.0 VDDUV+ [V] IST [A] 150 100 11.5 11.0 10.5 50 10.0 0 -40 -20 0 20 40 60 80 100 9.5 -40 120 -20 0 Figure 12. Startup Current vs. Temperature 60 80 100 120 10.0 9.6 10.0 9.2 9.5 VBSUV+ [V] VDDUV- [V] 40 Figure 13. VDD UVLO+ vs. Temperature 10.5 9.0 8.8 8.4 8.5 8.0 8.0 7.6 7.5 -40 20 Temperature [°C] Temperature [°C] 7.2 -20 0 20 40 60 80 100 120 -40 -20 0 Temperature [°C] 20 40 60 80 100 120 Temperature [°C] Figure 14. VDD UVLO- vs. Temperature Figure 15. VBS UVLO+ vs. Temperature 16.0 10.0 9.6 15.8 VCL [V] VBSUV- [V] 9.2 8.8 8.4 15.6 15.4 15.2 8.0 7.6 15.0 7.2 -40 -20 0 20 40 60 80 100 14.8 -40 120 Temperature [°C] 0 20 40 60 80 100 120 Temperature [°C] Figure 16. VBS UVLO- vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 -20 Figure 17. VCL vs. Temperature www.fairchildsemi.com 9 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Typical Performance Characteristics FAN7387 — Self-Oscillated, High-Voltage Gate Driver 2.5 500 2.0 400 IQDD [A] IPDD [mA] Typical Performance Characteristics (Continued) 1.5 1.0 0.5 0.0 -40 300 200 100 -20 0 20 40 60 80 100 0 -40 120 Temperature [°C] 20 40 60 80 100 120 Figure 19. IQDD vs. Temperature 3.0 500 2.5 VSD+ [V] 400 ISD [A] 0 Temperature [°C] Figure 18. IPDD vs. Temperature 300 200 2.0 1.5 1.0 0.5 100 0 -40 -20 -20 0 20 40 60 80 100 0.0 -40 120 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 20. ISD vs. Temperature Figure 21. VSD+ vs. Temperature 23 3.0 22 fOSC1[kHz] VSD- [V] 2.5 2.0 21 20 19 1.5 18 1.0 -40 -20 0 20 40 60 80 100 17 -40 120 Figure 22. VSD- vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 23. Operating Frequency 1 vs. Temperature www.fairchildsemi.com 10 500 270 475 260 450 tDMIN[ns] fOSC2[kHz] 280 250 425 400 240 375 230 350 325 220 210 -40 -20 0 20 40 60 80 100 300 -40 120 -20 0 20 Figure 24. Operating Frequency 2 vs. Temperature 60 80 100 120 100 120 Figure 25. tDMIN vs. Temperature 50 Duty at High-Side Output [%] 52 40 tDMIN_mismatch[ns] 40 Temperature [°C] Temperature [°C] 30 20 51 50 49 10 48 0 -40 -20 0 20 40 60 80 100 -40 120 -20 0 20 40 60 80 Temperature [°C] Temperature [°C] Figure 26. Dead-Time Mismatch vs. Temperature Figure 27. High-Side Duty Ratio vs. Temperature Duty at Low-Side Output [%] 52 51 50 49 48 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Figure 28. Low-Side Duty Ratio vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 Figure 29. Frequency vs. RT www.fairchildsemi.com 11 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Typical Performance Characteristics (Continued) 1. Under-Voltage Lockout (UVLO) Function FAN7387 has a UVLO circuit for a low-side and highside block. When VDD reaches to the VDDUV+, the UVLO circuit is released and the FAN7387 operates normally. At UVLO condition, the FAN7387 has a low supply current of less than 130 µA. Once UVLO is released, FAN7387 operates normally until VDD goes below VDDUV-, the UVLO hysteresis. FAN7387 also has a high-side gate driver. The supply for the high-side driver is applied between VB and VS. To prevent malfunction at low supply voltage between VB and VS, FAN7387 provides an additional UVLO circuit. If VB-VS is under VBSUV+, the driver holds LOW state to turn off the high-side switch. Once the voltage of VB-VS is higher than VBSUVH, after VB-VS exceeds VBSUV-, the operation of driver resumes. where, t is the discharging time of the RCT voltage and tfix is constant value about 450 ns of IC. 3. Programming Dead-Time Control / Shutdown A multi-function pin controls dead-time using an external resistor (RDT) and protects abnormal condition using an external switch. This pin should be connected to an external capacitor to maintain stable operation. If the voltage of DT/SD is decreased under 1 V by an external switch, such as the TR or MOSFET, the FAN7387 enters shutdown mode. In this mode, the FAN7387 doesn’t have any output signal. 2. Oscillator The running frequency is determined by an external timing resistor (RT) and timing capacitor (CT). The charge time of capacitor CT from 1/4 VDD to VDD determines the running frequency of LO and HO gate driver output. Figure 30 shows connection configuration. Figure 32. External Shutdown Circuit VDD RCT 1 8 VB 2 7 HO 3 6 VS 4 5 LO CT VDD DT/SD RT GND Figure 30. Typical Connection Method Figure 31 shows the typical waveforms of RCT, LO, and HO. From the circuit analysis, the discharging time of RCT, t, is given by Equation 1: VRCT t VDD In( ) Rt Ct (1) Equation 1 enables calculation of discharging time, t, from VDD to 1/4 VDD by substituting VRCT(t) with 1/4 VDD. t 1.38 Rt Ct (2) The running frequency of IC is determined by 1/T and is approximately given as: frunning 1 1 T 2(t Tfix ) (3) Figure 33. Adjustable Dead Time 4. Gate Driver Operation The FAN7387 has a two operating modes. One is the self-oscillation mode by using external timing resistor (RT) and external timing capacitor (CT) and the other is the forced oscillation mode by external PWM signal comes from U-com and the other devices. Figure 33 shows operation of the IC using an external PWM circuit with additional resistors (R1 and R2) for internal limitation of the IC. The input signal range from an external circuit must be within 3/5 VDD and 3/4 VDD. The external signal produces the HO and LO output and HO signal is in-phase with the external input signal. Figure 34. Gate Driver Using External PWM Signal Figure 31. Typical Waveforms of RCT,LO and HO © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 12 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Functional Description 0.65 A 4.90±0.10 (0.635) 8 5 B 1.75 6.00±0.20 1 PIN ONE INDICATOR 5.60 3.90±0.10 4 1.27 1.27 0.25 C B A LAND PATTERN RECOMMENDATION SEE DETAIL A 0.175±0.75 1.75 MAX 0.22±0.30 C 0.10 0.42±0.09 OPTION A - BEVEL EDGE (0.86) x 45° R0.10 GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08Arev15 F) FAIRCHILD SEMICONDUCTOR. SEATING PLANE 0.65±0.25 (1.04) DETAIL A SCALE: 2:1 Figure 35. 8-Lead Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/M0/M08A.pdf. © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 13 FAN7387 — Self-Oscillated, High-Voltage Gate Driver Physical Dimensions FAN7387 — Self-Oscillated, High-Voltage Gate Driver © 2008 Fairchild Semiconductor Corporation FAN7387 • 1.0.4 www.fairchildsemi.com 14