NC7SV126 TinyLogic® ULP-A Buffer with Three-State Output Features Description 0.9 V to 3.6 V VCC Supply Operation Extremely High Speed tPD - 1.0 ns: Typical for 2.7 V to 3.6 V VCC - 1.8 ns: Typical for 2.3 V to 2.7 V VCC - 3.0 ns: Typical for 1.65 V to 1.95 V VCC - 3.5 ns: Typical for 1.4 V to 1.6 V VCC - 6.0 ns: Typical for 1.1 V to 1.3 V VCC - 13.0 ns:Typical for 0.9 V VCC The NC7SV126 is a single buffer with 3-STATE output from Fairchild’s Ultra-Low Power-A (ULP-A) Series of TinyLogic®. ULP-A is ideal for applications that require extreme high speed, high drive, and low power. This product is designed for a wide low-voltage operating range (0.9 V to 3.6 V VCC) and applications that require more drive and speed than the TinyLogic® ULP series, but still offer best in class low power operation. 3.6 V Over-Voltage Tolerant I/O’s at VCC from 0.9 V to 3.6 V The NC7SV126 is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Power-Off High-Impedance Inputs and Outputs High Static Drive (IOH/IOL) - 24 mA at 3.00 V VCC -18 mA at 2.30 V VCC -6 mA at 1.65 V VCC - 4 mA at 1.4V VCC - 2 mA at 1.1 V VCC - 0.1 mA at 0.9 V VCC Uses Proprietary Quiet Series™ Noise/EMI Reduction Circuitry Ultra-Small MicroPak™ Leadfree Package Ultra-Low Dynamic Power Ordering Information Part Number Top Mark Package Packing Method NC7SV126P5X V26 5-Lead SC70, EIAJ SC-88a, 1.25 mm Wide 3000 Units on Tape & Reel NC7SV126L6X H7 6-Lead MicroPak™, 1.00 mm Wide 5000 Units on Tape & Reel For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. TinyLogic®is a registered trademark of Fairchild Semiconductor Corporation. MicroPak™and Quiet Series™are trademarks of Fairchild Semiconductor Corporation. © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output June 2014 Notes: 1. TinyLogic® ULP and ULP-A with up to 50% less power consumption can extend your battery life significantly. Battery Life (Vbattery•Ibattery•.9)/(Pdevice)/24hrs/day Where, Pdevice (ICC • VCC) (CPD CL) • VCC2 • f. 2. Assumes ideal 3.6 V Lithium Ion battery with current rating of 900 mAH and derated 90% and device frequency at 10 MHz, with CL = 15 pF load. Figure 1. Battery Life vs. VCC Supply Voltage Connection Diagram NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output Battery Life Figure 2. Logic Symbol © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 2 Figure 3. SC70 (Top View) Figure 4. MicroPak (Top Through View) Pin Definitions Pin # SC70 Pin # MicroPak Name Description 1 1 OE Input 2 2 A Input 3 3 GND Ground 4 4 Y Output 5 6 VCC Supply Voltage 5 NC No Connect NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output Pin Configurations Function Table Inputs OE Output A Out Y H L L H H H L X Z H = HIGH Logic Level L = LOW Logic Level X = HIGH or LOW Logic Level Z = HIGH Impedance State © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VCC Supply Voltage VIN DC Input Voltage Min. Max. Unit -0.5 4.6 V -0.5 4.6 V HIGH or LOW State -0.5 VCC + 0.5 VCC = 0 V -0.5 4.6 (3) VOUT DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IOH/IOL ICC or IGND TSTG PD ESD VIN < 0 V -50 VOUT < 0 V -50 VOUT > VCC +50 V mA mA DC Output Source/Sink Current ±50 mA DC VCC or Ground Current per Supply Pin ±50 mA +150 °C Storage Temperature Range Power Dissipation at +85°C -65 SC70-5 150 MicroPak-6 130 Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 mW V Note: 3. IO absolute maximum rating must be observed. Recommended Operating Conditions NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output Absolute Maximum Ratings The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter VCC Supply Voltage Operating VIN Input Voltage VOUT IOH/IOL Output Voltage Output Current Conditions Min. Max. Unit 0.9 3.6 V 0 3.6 V VCC = 0 V 0 3.6 HIGH or LOW State 0 VCC VCC = 3.0 V to 3.6 V ±24 VCC = 2.3 V to 3.6 V ±18 VCC = 1.65 V to 1.95 V ±6 VCC = 1.4 V to 1.6 V ±4 VCC = 1.1 V to 1.3 V ±2 VCC = 0.9 V TA t/V JA Operating Temperature, Free Air Minimum Input Edge Rate Thermal Resistance V mA ±0.1 -40 +85 °C VIN = 0.8 V to 2.0, VCC = 3.0 V 10 ns/V SC70-5 425 MicroPak-6 500 °C/W Note: 4. Unused inputs must be held HIGH or LOW. They may not float. © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 4 Symbol VIH Parameter HIGH Level Input Voltage VCC Conditions TA=25°C Min. .65 x VCC 1.10 VCC 1.30 .65 x VCC .65 x VCC 1.40 VCC 1.60 .65 x VCC .65 x VCC 1.65 VCC 1.95 .65 x VCC .65 x VCC 1.6 1.6 2.0 0.90 1.10 VCC 1.30 2.0 .35 x VCC .35 x VCC .35 x VCC .35 x VCC .35 x VCC 1.65 VCC 1.95 .35 x VCC .35 x VCC 2.30 VCC 2.70 0.7 0.7 2.70 VCC 3.60 0.8 0.8 0.90 VCC-0.1 VCC-0.1 1.10 VCC 1.30 VCC-0.1 VCC-0.1 VCC-0.2 VCC-0.2 VCC-0.2 VCC-0.2 2.30 VCC 2.70 VCC-0.2 VCC-0.2 2.70 VCC 3.60 VCC-0.2 VCC-0.2 IOH=-100 µA 1.10 VCC 1.30 IOH=-2 mA .75 x VCC .75 x VCC 1.40 VCC 1.60 IOH=-4 mA .75 x VCC .75 x VCC 1.25 1.25 1.65 VCC 1.95 2.30 VCC 2.70 2.30 VCC 2.70 2.70 VCC 3.60 2.30 VCC 2.70 2.70 VCC 3.60 2.70 VCC 3.60 IOH=-6 mA IOH=-12 mA IOH=-18 mA IOH=-24 mA 2.0 2.0 1.8 1.8 2.2 2.2 1.7 1.7 2.4 2.4 2.2 Units V .35 x VCC 1.65 VCC 1.95 VOH Max. 1.40 VCC 1.60 1.40 VCC 1.60 HIGH Level Output Voltage Min. .65 x VCC 2.70 VCC 3.60 LOW Level Input Voltage Max. 0.90 2.30 VCC 2.70 VIL TA=-40 to 85°C V V NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output DC Electrical Characteristics 2.2 Continued on following page… © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 5 Symbol Parameter VCC Conditions Max. Min. Max. 0.1 0.1 1.10 VCC 1.30 0.1 0.1 1.40 VCC 1.60 0.2 0.2 0.2 0.2 0.2 0.2 IOL=100 µA 2.30 VCC 2.70 2.70 VCC 3.60 LOW Level Output Voltage Min. TA=-40 to 85°C 0.90 1.65 VCC 1.95 VOL TA=25°C 0.2 0.2 1.10 VCC 1.30 IOL=2 mA 0.25 x VCC 0.25 x VCC 1.40 VCC 1.60 IOL=4 mA 0.25 x VCC 0.25 x VCC 1.65 VCC 1.95 IOL=6 mA 0.3 0.3 0.4 0.4 0.4 0.4 0.6 0.6 2.30 VCC 2.70 2.70 VCC 3.60 2.30 VCC 2.70 2.70 VCC 3.60 2.70 VCC 3.60 IOL=12 mA IOL=18 mA 0.4 0.4 IOL=24 mA 0.55 0.55 Units V IIN Input Leakage Current 0.90 to 3.60 0 VIN 3.60 ±0.1 ±0.5 µA IOZ 3-STATE Output Leakage 0.90 to 3.6 VIN=VIH or VIL 0 VIN 3.60 ±0.5 ±0.5 µA IOFF Power Off 0 (VIN, vo) 3.60 0.5 0.5 µA ICC Quiescent Supply Current VIN=VCC, or GND 0.9 0.9 0 0.90 to 3.60 © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 VCC VIN 3.6 V ±0.9 µA NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output DC Electrical Characteristics (Continued) www.fairchildsemi.com 6 Symbol Parameter VCC 0.90 1.10 VCC 1.30 tPHL, tPLH Propagation Delay TA=25°C Conditions Min. CL=15 pF, RL=1 M Max. 1.9 14.9 1.0 3.5 5.3 0.8 5.7 0.9 3.0 4.3 0.8 4.6 0.8 1.8 2.8 0.7 3.0 0.5 1.0 2.6 0.3 2.8 3.0 6.0 9.7 2.0 16.4 1.2 4.0 6.0 1.0 7.5 1.0 3.0 4.5 0.9 5.0 2.30 VCC 2.60 0.8 2.0 3.0 0.7 3.4 2.70 VCC 3.60 0.5 1.2 2.6 0.4 2.9 1.40 VCC 1.60 CL=15 pF, RL=2 k 1.65 VCC 1.95 CL=30 pF, RL=500 12 0.90 Output Enable 1.40 VCC 1.60 Time 1.65 VCC 1.95 CL=30 pF, RU=1 k RD=1 k ns 2.0 5.0 9.5 2.0 14.0 1.2 3.0 5.5 1.1 7.0 1.0 2.0 5.6 0.8 5.8 2.30 VCC 2.60 0.6 1.3 4.2 0.5 5.0 2.70 VCC 3.60 0.5 1.0 3.9 0.4 4.2 1.40 VCC 1.60 1.65 VCC 1.95 Figure 5 Figure 6 ns ns Figure 5 Figure 6 ns Figure 5 Figure 6 14 0.90 1.10 VCC 1.30 Units Figure 13 9.8 1.10 VCC 1.30 Output Disable Time Min. 6.0 2.70 VCC 3.60 tPHZ,tPLZ Max. 3.0 2.30 VCC 2.60 tPZL,tPZH Typ. TA=-40 to 85°C CL=30 pF, RU=1 k RD=1 k CIN Input Capacitance 0.00 2 pF COUT Output Capacitance 0.00 4.5 pF CPD Power Dissipation Capacitance 0.90 to 3.60 10 pF © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 VI=0 V or VCC, f=10 MHz NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output AC Electrical Characteristics www.fairchildsemi.com 7 Figure 5. AC Test Circuit NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output AC Loadings and Waveforms Figure 6. AC Waveforms © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 8 NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output Physical Dimensions Figure 7. 5-Lead, SC70, EIAJ SC-88a, 1.25 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf. Package Designator P5X © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 9 NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.49) 5X 1.00 (0.75) (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X 0.25 0.15 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X BOTTOM VIEW DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER (0.13) 4X Notes: 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 MAC06AREVC Figure 8. 6-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 10 NC7SV126 — TinyLogic® ULP-A Buffer with Three-State Output © 1996 Fairchild Semiconductor Corporation NC7SV126 • Rev. 1.0.3 www.fairchildsemi.com 11