RENESAS RD74LVC1G125

RD74LVC1G125
Bus Buffer with 3–state Output
REJ03D0731–0100
Rev.1.00
Apr 13, 2006
Description
The RD74LVC1G125 has bus buffer with 3–state output in a 5-pin package. Low voltage and high-speed operation is
suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the
battery life.
Features
•
•
•
•
•
•
The basic gate function is lined up as renesas uni logic series.
Supply voltage range: 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs: VO (Max.) = 5.5 V (@VCC = 0 V)
Output current:
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±24 mA (@VCC = 3.0 V)
±32 mA (@VCC = 4.5 V)
• Ordering Information
Part Name
RD74LVC1G125WPE
Package Type
WCSP–5 pin
Package Code
(Previous Code)
Package
Abbreviation
SXBG0005LB–A
(TBS–5CV)
WP
Article Indication
Marking
Year code
Month code
EBYM
Rev.1.00 Apr 13, 2006 page 1 of 7
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
RD74LVC1G125
Function Table
Inputs
OE
A
Output Y
L
H
H
L
L
L
H
X
Z
H: High level
L: Low level
X: Immaterial
Z: High impedance
Pin Arrangement
0.7 mm
3
A
2
OE
4
Y
1.1 mm
Height 0.4 mm
0.4 mm pitch
0.17 mm 5–Ball (WP) GND
1
5
Pin#1 INDEX
VCC
(Bottom view)
(Top view)
Logic Diagram
O
OE
A
Rev.1.00 Apr 13, 2006 page 2 of 7
1
2
4
Y
RD74LVC1G125
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VCC
–0.5 to 6.5
V
Supply voltage range
Input voltage range
*1
Output voltage range *1, 2
VI
–0.5 to 6.5
V
VO
–0.5 to VCC +0.5
V
Test Conditions
Output : H or L
VCC: OFF or Output “Z”
–0.5 to 6.5
Input clamp current
IIK
–50
mA
VI < 0
Output clamp current
IOK
–50
mA
VO < 0
VO = 0 to VCC
Continuous output current
Continuous current through
VCC or GND
IO
±50
mA
ICC or IGND
±100
mA
θja
200
°C/W
Tstg
–65 to 150
°C
Package Thermal impedance
Storage temperature
Notes:
WP
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two
of which may be realized at the same time.
1. The input and output voltage ratings
ngs may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
Recommended Operating Conditions
Item
Supply voltage range
Symbol
Min
Max
Unit
Conditions
VCC
1.65
5.5
V
Input voltage range
VI
0
5.5
V
Output voltage range
VO
0
VCC
V
0
5.5
Output current
IOL
—
4
—
8
VCC = 2.3 V
—
16
VCC = 3.0 V
—
24
—
32
VCC = 4.5 V
—
–4
VCC = 1.65 V
—
–8
VCC = 2.3 V
—
–16
VCC = 3.0 V
—
–24
—
–32
0
20
0
10
VCC = 3.0 to 3.6 V
0
5
VCC = 4.5 to 5.5 V
–40
85
IOH
Input transition rise or fall rate
Operating free-air temperature
∆t / ∆v
Ta
Note: Unused or floating inputs must be held high or low.
Rev.1.00 Apr 13, 2006 page 3 of 7
Output : Z
mA
VCC = 1.65 V
VCC = 4.5 V
ns / V
°C
VCC = 1.65 to 1.95 V,
2.3 to 2.7 V
RD74LVC1G125
Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol
VIH
VIL
Output voltage
VOH
VOL
VCC (V)
Min
1.65 to 1.95 VCC×0.65
Typ
Max
Unit
V
—
—
2.3 to 2.7
1.7
—
—
3.0 to 3.6
2.0
—
—
Test condition
4.5 to 5.5
VCC×0.7
—
—
1.65 to 1.95
—
—
VCC×0.35
2.3 to 2.7
—
—
0.7
3.0 to 3.6
—
—
0.8
4.5 to 5.5
—
—
VCC×0.3
Min to Max
VCC–0.1
—
—
1.65
1.2
—
—
IOH = –4 mA
2.3
1.9
—
—
IOH = –8 mA
3.0
2.4
—
—
IOH = –16 mA
2.3
—
—
IOH = –24 mA
4.5
3.8
—
—
IOH = –32 mA
Min to Max
—
—
0.1
IOL = 100 µA
1.65
—
—
0.45
IOL = 4 mA
V
IOH = –100 µA
2.3
—
—
0.3
IOL = 8 mA
3.0
—
—
0.4
IOL = 16 mA
—
—
0.55
IOL = 24 mA
4.5
—
—
0.55
Input current
IIN
0 to 5.5
—
—
±5
µA
IOL = 32 mA
VIN = 5.5 V or GND
Off state Output
current
IOZ
3.6
—
—
10
µA
VO = 5.5 V or GND
Quiescent
supply current
ICC
1.65 to 5.5
—
—
10
µA
VIN = VCC or GND,
IO = 0
∆ICC
3 to 5.5
—
—
500
Output leakage
current
IOFF
0
—
—
±10
µA
VIN or VO = 0 to 5.5 V
Input capacitance
CIN
3.3
—
3.5
—
pF
VIN = VCC or GND
One input at VCC–0.6 V,
Other input at VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.1.00 Apr 13, 2006 page 4 of 7
RD74LVC1G125
Switching Characteristics
VCC = 1.8±0.15 V
FROM
Ta = –40 to 85°C
Symbol
Min
Max
Unit
Propagation delay time
tPLH
tPHL
2.8
8.0
ns
Output enable time
tZH
tZL
3.3
9.4
Output disable time
tHZ
tLZ
1.3
9.2
Item
Test Conditions
(Input)
TO
(Output)
A
Y
ns
OE
Y
ns
OE
Y
CL = 30 pF, RL = 1.0 kΩ
VCC = 2.5±0.2 V
Ta = –40 to 85°C
Item
FROM
Symbol
Min
Max
Unit
Propagation delay time
tPLH
tPHL
1.2
5.5
ns
Output enable time
tZH
tZL
1.5
6.6
Output disable time
tHZ
tLZ
1.0
5.0
Test Conditions
CL = 30 pF, RL = 500 Ω
(Input)
TO
(Output)
A
Y
ns
OE
Y
ns
OE
Y
VCC = 3.3±0.3 V
Ta = –40 to 85°C
Item
FROM
Symbol
Min
Max
Unit
Propagation delay time
tPLH
tPHL
1.0
4.5
ns
Output enable time
tZH
tZL
1.0
5.3
Output disable time
tHZ
tLZ
1.0
5.0
Test Conditions
CL = 50 pF, RL = 500 Ω
(Input)
TO
(Output)
A
Y
ns
OE
Y
ns
OE
Y
VCC = 5.0±0.5 V
FROM
Ta = –40 to 85°C
Symbol
Min
Max
Unit
Propagation delay time
tPLH
tPHL
1.0
4.0
ns
Output enable time
tZH
tZL
1.0
5.0
Output disable time
tHZ
tLZ
1.0
4.2
Item
Test Conditions
CL = 50 pF, RL = 500 Ω
(Input)
TO
(Output)
A
Y
ns
OE
Y
ns
OE
Y
Operating Characteristics
Ta = 25°C
Item
Power dissipation
capacitance
Symbol
VCC (V)
Min
Typ
Max
Unit
CPD
1.8
—
19
—
pF
2.5
—
19
—
3.3
—
20
—
5.0
—
22
—
Rev.1.00 Apr 13, 2006 page 5 of 7
Test Conditions
f = 10 MHz
RD74LVC1G125
Test Circuit
VTT
RL
From Output
OPEN
S1
OPEN
t ZH / t HZ
GND
t ZL / t LZ
VTT
GND
RL
CL
TEST
t PLH / tPHL
S1
Load circuit
INPUTS
VCC (V)
1.8±0.15
2.5±0.2
3.3±0.3
5.0±0.5
VI
VCC
VCC
VCC
VCC
tr / tf
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
Vref
VTT
CL
RL
∆V
VCC / 2
VCC / 2
1.5 V
VCC / 2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1.0 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Vref
Input A
Vref
t PLH
0V
t PHL
V OH
Output Y
Vref
Vref
V OL
VI
Input OE
Vref
Vref
t ZL
0V
t LZ
VOH
Vref
Output Y
(Waveform – A)
VOL + ∆V
t ZH
t HZ
VOH – ∆V
Output Y
(Waveform – B)
V OL
V OH
Vref
VOL
Notes: 1. CL includes probe and jig capacitance.
2. Waveform–A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10MHz, Zo = 50 Ω.
5. The output are measured one at a time with one transition per measurement.
Rev.1.00 Apr 13, 2006 page 6 of 7
RD74LVC1G125
Package Dimensions
JEITA Package Code
S-XFBGA5-0.7x1.1-0.40
RENESAS Code
SXBG0005LB-A
Previous Code
TBS-5CV
MASS[Typ.]
0.001g
D
e
ZD
ZE
C
E
B
e
B
A
1
Pin#1 index area
2
A
5×φb
y1 C
φx M C A B
φx M C
C
Reference
Symbol
Dimension in Millimeters
Min
Nom
A
A2
A1
Seating plane
y C
A1
0.110
0.140
(0.235) *
A2
0.19
0.15
b
*Reference value.
0.70
D
E
1.10
e
0.40
0.05
x
0.05
y
y
Rev.1.00 Apr 13, 2006 page 7 of 7
Max
0.40
A
0.20
1
ZD
0.15
ZE
0.15
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
Technology Corp. or a third party.
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas T
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information
on products at the time of
i
improvements or other reasons. It is
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvement
distributor for the latest product
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distrib
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Technology Corp. Semiconductor
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Techn
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances
in which human life
ci
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
aerospace, nuclear, or undersea repeater
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
materi
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license
from the Japanese government and
lic
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network"
http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology (Shanghai) Co., Ltd.
Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120
Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2730-6071
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
Renesas Technology Malaysia Sdn. Bhd
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2006. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .6.0