HA1630D07 Dual CMOS High Drive Operational Amplifier REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Description HA1630D07 is a low power dual CMOS operational amplifier featuring high output current with typical current supply of 120 µA for both channels (2.7 V to 5.5 V). This IC designed to operate from a single power supply and have full swing outputs. Available in MMPAK-8 and TSSOP-8 package, the miniature size of this IC not only allows compact integration in portable devices but also minimizes distance of signal sources (sensors), thus reducing external noise pick up prior to amplification. This IC exhibit excellent current drive-power ratio capable of 2 kΩ load driving and yet resistant to oscillation for capacitive loads up to 200 pF. Features • • • • • IDD = 120 µA Typ (VDD = 3 V, RL = No load) VDD = 2.7 V to 5.5 V VIO = 6 mV Max IIB = 1 pA Typ IOSOURCE = 15 mA Typ (VDD = 3.0 V, VOH = 2.5 V) IOSINK = 15 mA Typ (VDD = 3.0 V, VOL = 0.5 V) • Input common voltage range includes ground Low supply current Low voltage operation Low input offset voltage Low input bias current High output current Ordering Information Part No. HA1630D07MM HA1630D07T REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 1 of 14 Package Name MMPAK-8 TSSOP-8 Package Code PLSP0008JC-A PTSP0008JC-B HA1630D07 Pin Arrangement VOUT1 1 VIN1(–) 2 VIN1(+) 3 8 VDD 7 VOUT2 − + + − VSS 4 6 VIN2(–) 5 VIN2(+) (Top view) Equivalent Circuit (1/2) VDD Vbias2 VIN(–) VIN(+) VOUT Vbias1 VSS REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 2 of 14 Vbias3 HA1630D07 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Supply voltage Differential input voltage Input voltage Output current Power dissipation VDD VIN(diff) VIN IOUT PT Operating temperature Storage temperature Topr Tstg Note: Ratings 7.0 –VDD to +VDD –0.1 to +VDD 40 145 (MMPAK-8) 192 (TSSOP-8) –40 to +85 –55 to +125 Unit V V V mA mW Note 1 2 °C °C 1. Do not apply input voltage exceeding VDD or 7 V. 2. If Ta > 25°C, MMPAK-8: derate by –1.45 mW/°C TSSOP-8: derate by –1.92 mW/°C Electrical Characteristics DC Characteristics (Ta = 25°C, VDD = 3.0 V, VSS = 0 V) Item Input offset voltage Input bias current Input offset current Common mode input voltage range Supply current Output source current Output sink current Open loop voltage gain Common mode rejection ratio Power supply rejection ratio Output high voltage Output low voltage Note: Symbol VIO IIB IIO VCM IDD IOSOURCE IOSINK AV CMRR PSRR VOH VOL Min — — — –0.1 — 7.5 7.5 55 50 55 2.9 — Typ — (1) (1) — 120 15 15 80 80 80 — — Max 6 — — 1.8 340 — — — — — — 0.1 Unit mV pA pA V µA mA mA dB dB dB V V Test Conditions VIN = 1.5 V, RL = 1 MΩ VIN = 1.5 V VIN = 1.5 V VIN(+) = 1.0 V, RL = ∞ VOUT = 2.5 V VOUT = 0.5 V RL = 100 kΩ VIN1 = 0 V, VIN2 = 1.8 V VDD1 = 2.7 V, VDD2 = 5.5 V RL = 2 kΩ to VSS RL = 2 kΩ to VDD ( ) : Design specification AC Characteristics (Ta = 25°C, VDD = 3.0 V, VSS = 0 V) Slew rate Item Symbol SRr SRf Gain bandwidth product GBW Note: ( ) : Design specification REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 3 of 14 Min — — Typ (1) (1) Max — — Unit V/µs — (1.5) — MHz Test Conditions VIN = 1.5 V, CL = 15 pF (VINL = 0.2 V, VINH = 1.7 V) VIN = 1.5 V, CL = 15 pF HA1630D07 Table of Graphs Supply current Electrical Characteristics IDD Output high voltage Output low voltage Output source current VOH VOL IOSOURCE Output sink current IOSINK Input offset voltage VIO Common mode input voltage range VCM Common mode rejection ratio Power supply rejection ratio Input bias current CMRR PSRR IIB Slew rate (rising) SRr Slew rate (falling) SRf Open loop gain AV Phase margin Channel separation Noise input voltage PM CS VNI REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 4 of 14 vs. Supply voltage vs. Temperature vs. Rload vs. Rload vs. Output high voltage vs. Temperature vs. Output low voltage vs. Temperature vs. Supply voltage vs. Input voltage vs. Temperature vs. Supply voltage vs. Temperature vs. Input voltage vs. Supply voltage vs. Input voltage vs. Temperature vs. Cload vs. Temperature Time waveform vs. Cload vs. Temperature Time waveform vs. Rload vs. Frequency vs. Cload vs. Frequency vs. Frequency Characteristic Curves 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25, 26 27 28 29 Test Circuit No. 1 1 2 3 4 4 5 5 6 6 7 8 8 9 10 11, 12 11, 12 13 13 13 13 13 13 14 14 14 15 16 HA1630D07 Test Circuits (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 1. Supply Current, IDD − + 2. Output High Voltage, VOH A − + VDD 1V V 1V 4. Output Source Current, IOSOURCE 3. Output Low Voltage, VOL RLOAD = 2 kΩ V − + VDD RLOAD = 2 kΩ − + VDD 1V VDD A 1V 5. Output Sink Current, IOSINK VOUT 6. Input Offset Voltage vs. Operating Voltage 1 MΩ 1 kΩ − + VDD A 1V − + VOUT V 1 kΩ VDD VDD/2 VOUT 1 MΩ VIO = VOUT / 1001 7. Input Offset Voltage, VIO 8. Common Mode Input Voltage Range, VCM 1 MΩ 1 kΩ 1 kΩ 1 MΩ 1 MΩ VOUT V − + 1 kΩ 1.5 V –1.5 V 1 kΩ VIN − + 1 MΩ VCML 1.5 V VIO = VOUT / 1001 REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 5 of 14 VOUT V Note: VCML and VCMH are values of VIN when VIO changes more than 50 dB taking VIN = 0 V as reference. VDD VIO VIN = 0 V VIN VCMH HA1630D07 Test Circuits (cont.) (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 9. Common Mode Rejection Ratio, CMRR 1 MΩ 1 kΩ VOUT V − + 1.5 V 1 kΩ VIN Measure Point Calculate VIO –1.5 V VOUT1 VIO1 = VOUT1 / 1001 0.3 V VOUT2 VIO2 = VOUT2 / 1001 VDD Measure Point Calculate VIO 2.7 V VOUT1 VIO1 = VOUT1 / 1001 VOUT2 VIO2 = VOUT2 / 1001 VIN –1.5 V 1 MΩ CMRR Calculation CMRR = 20log10 |[VIO2 – VIO1]| 0.3 – (–1.5 V) 10. Power Supply Rejection Ratio, PSRR 1 MΩ 1 kΩ 1 kΩ 1 MΩ VOUT V − + VDD/2 –VDD/2 5.5 V 11. Input Bias Current, IIB+ 12. Input Bias Current, IIB– − A + A VDD VIN CMRR Calculation PSRR = 20log10 − + |[VIO2 – VIO1]| 5.5 V – 2.7 V VDD VIN 13. Slew Rate (Large Signal Input) VIN 1.7 V – 0.2 V − + 50 Ω VOUT V VDD 15 pF 90% ∆Vtr VOUT 10% ∆ttr REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 6 of 14 SRr = ∆Vtr / ∆ttr SRf = ∆Vtf / ∆ttf 90% ∆Vtf 10% ∆ttf HA1630D07 Test Circuits (cont.) (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 14. Open Loop Voltage Gain, AV 1 MΩ 10 kΩ 10 to 100 MHz –40 dBm VOUT V − + V VIN 50 Ω 1.5 V AV = 20log10 101 × |VOUT| |VIN| –1.5 V 15. Channel Separation, CS 10 kΩ 10 kΩ 10 to 100 MHz 10 dBm − + 50 Ω 1 MΩ VOUT1 V 10 kΩ 1.5 V –1.5 V Channel 2 CS = 20log10 101 × |VOUT2| 16. Noise Input Voltage, VNI 1 MΩ − + VOUT V 1.5 V –1.5 V REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 7 of 14 VOUT2 V –1.5 V Channel 1 1 kΩ − + VNI = VOUT 1001 |VOUT1| 1.5 V HA1630D07 Characteristic Curves Figure 2 HA1630D07 Supply Current vs. Ambient Temperature 180 Supply Current, IDD (µA) Supply Current, IDD (µA) Figure 1 HA1630D07 Supply Current vs. Supply Voltage 160 140 120 100 80 60 40 2 3 4 5 Supply Voltage, VDD (V) 6 180 160 140 80 60 40 –50 3.0 2.9 2.8 2.7 100 1k 10 k Resistor Load, RL (Ω) 100 k Figure 5 HA1630D07 Output High Voltage vs. Output Source Current 6 VDD = 5.5 V 5 VDD = 5.0 V 4 3 VDD = 3.0 V 2 1 VDD = 2.7 V 0 0 10 20 30 40 50 Output Source Current, IOSOURCE (mA) REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 8 of 14 Output Low Voltage, VOL (V) 3.1 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 4 HA1630D07 Output Low Voltage vs. Resistor Load Output Source Current, IOSOURCE (mA) Output High Voltage, VOH (V) Output High Voltage, VOH (V) VDD = 3.0 V VDD = 2.7 V, 3.0 V 100 Figure 3 HA1630D07 Output High Voltage vs. Resistor Load 3.2 VDD = 5.5 V 120 0.3 VDD = 3.0 V 0.2 0.1 0.0 –0.1 100 1k 10 k Resistor Load, RL (Ω) 100 k Figure 6 HA1630D07 Output Source Current vs. Ambient Temperature 30 VDD = 3.0 V 25 20 15 10 5 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) HA1630D07 VDD = 2.7 V 1 0 VDD = 5.0 V VDD = 5.5 V 0 10 20 30 40 50 Output Sink Current, IOSINK (mA) Figure 9 HA1630D07 Input Offset Voltage vs. Supply Voltage 6 4 2 0 –2 –4 –6 2 3 4 5 Supply Voltage, VDD (V) 6 Output Sink Current, IOSINK (mA) VDD = 3.0 V 2 Input Offset Voltage, VIO (mV) Figure 7 HA1630D07 Output Low Voltage vs. Output Sink Current 3 Figure 11 HA1630D07 Input Offset Voltage vs. Ambient Temperature 6 VDD = 2.7 V, 3.0 V, 5.5 V 4 2 0 –2 –4 –6 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 9 of 14 Figure 8 HA1630D07 Output Sink Current vs. Ambient Temperature 30 VDD = 3.0 V 25 20 15 10 5 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 10 HA1630D07 Input Offset Voltage vs. Input Voltage 15 VDD = 1.5 V, VSS = –1.5 V 10 5 0 –5 –10 –15 –2.5 –1.5 –0.5 0.5 Input Voltage, VIN (V) 1.5 Figure 12 HA1630D07 Common Mode Input Voltage vs. Supply Voltage 5 Common Mode Input Voltage, VCM (V) Input Offset Voltage, VIO (mV) Input Offset Voltage, VIO (mV) Output Low Voltage, VOL (V) Characteristic Curves (cont.) 4 VCM+ 3 2 Common Mode Input Voltage Range 1 0 –1 –2 VCM– 2 3 4 5 Supply Voltage, VDD (V) 6 HA1630D07 VDD = 3.0 V VCM+ 1.0 Common Mode Input Voltage Range 0.0 VCM– Input Bias Current, IIB (pA) Power Supply Rejection Ratio, PSRR (dB) –1.0 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 15 HA1630D07 Power Supply Rejection Ratio vs. Supply Voltage 120 100 80 60 40 20 0 2 3 4 5 Supply Voltage, VDD (V) 6 Figure 17 HA1630D07 Input Bias Current vs. Ambient Temperature 100 VDD = 3.0 V 50 0 –50 –100 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 10 of 14 Figure 14 HA1630D07 Common Mode Rejection Ratio vs. Input Voltage 120 VDD = 1.5 V, VSS = –1.5 V 100 80 60 40 20 0 –2 –1 0 Input Voltage, VIN (V) 1 Figure 16 HA1630D07 Input Bias Current vs. Input Voltage Input Bias Current, IIB (pA) 2.0 Slew Rate (rising), SRr (V/µs) Common Mode Input Voltage, VCM (V) Figure 13 HA1630D07 Common Mode Input Voltage vs. Ambient Temperature 3.0 Common Mode Rejection Ratio, CMRR (dB) Characteristic Curves (cont.) 100 VDD = 3.0 V 50 0 –50 –100 0 1 2 Input Voltage, VIN (V) 3 Figure 18 HA1630D07 Slew Rate (rising) vs. Capacitive Load 3.0 VDD = 3.0 V 2.0 1.0 0.0 0 100 200 300 Capacitive Load, CL (pF) 400 HA1630D07 Characteristic Curves (cont.) 3.0 Figure 20 HA1630D07 Slew Rate (rising) VDD = 2.7 V, 3.0 V, 5.5 V 2.0 SRr = 1.10 V/µs 1.0 0.0 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 21 HA1630D07 Slew Rate (falling) vs. Capacitive Load 3.0 VDD = 3.0 V 2.0 1.0 0.0 0 50 100 150 200 250 300 350 400 Capacitive Load, CL (pF) Slew Rate (falling), SRf (V/µs) Slew Rate (falling), SRf (V/µs) Slew Rate (rising), SRr (V/µs) Figure 19 HA1630D07 Slew Rate (rising) vs. Ambient Temperature Figure 22 HA1630D07 Slew Rate (falling) vs. Ambient Temperature 3.0 VDD = 2.7 V, 3.0 V, 5.5 V 2.0 1.0 0.0 –50 Figure 23 HA1630D07 Slew Rate (falling) REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 11 of 14 Figure 24 HA1630D07 Open Loop Gain vs. Resistor Load Open Loop Gain, AV (dB) SRf = 1.23 V/µs –25 0 25 50 75 100 Ambient Temperature, Ta (°C) 120 VDD = 3.0 V 100 80 60 40 20 0 100 1k 10 k Resistor Load, RL (Ω) 100 k HA1630D07 Characteristic Curves (cont.) Figure 26 HA1630D07 Open Loop Gain, Phase vs. Frequency 0 270 180 90 Phase 0 –50 –100 10 100 1 k 10 k 100 k 1 M Frequency, f (Hz) –90 10 M 100 0 50 40 30 20 10 0 50 100 150 200 250 300 350 400 Capacitive Load, CL (pF) Figure 29 HA1630D07 Noise Input Voltage vs. Frequency 1.0 VDD = 3.0 V 0.8 0.6 0.4 0.2 0.0 10 100 1k Frequency, f (Hz) REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 12 of 14 10 k Channel Separation, CS (dB) Phase Margin, PM (deg.) Noise Input Voltage, VNI (µV/√Hz) 60 0 180 90 Phase –50 –100 10 270 0 100 1 k 10 k 100 k 1 M Frequency, f (Hz) –90 10 M Figure 28 HA1630D07 Channel Separation vs. Frequency VDD = 3.0 V 70 Gain 50 Figure 27 HA1630D07 Phase Margin vs. Capacitive Load 80 VDD = 3.0 V CL = 400 pF 150 VDD = 3.0 V 100 50 0 –50 10 100 1 k 10 k 100 k 1 M Frequency, f (Hz) 10 M Phase (deg.) Gain 50 VDD = 3.0 V RL = 100 kΩ Open Loop Gain, AV (dB) 100 Phase (deg.) Open Loop Gain, AV (dB) Figure 25 HA1630D07 Open Loop Gain, Phase vs. Frequency HA1630D07 Package Dimensions Package Name MMPAK-8 JEITA Package Code P-LSOP8-2.8 x 2.95 - 0.65 RENESAS Code PLSP0008JC-A Previous Code MASS[Typ.] 0.02 g Unit: mm 0.13 +0.12 -0.03 2.8 ± 0.1 4.0 ± 0.3 2.95 ± 0.2 0.6 0 to 0.1 0.65 0.2 0.1 M +0.1 -0.05 1.1 ± 0.1 0.3 1.95 0.1 JEITA Package Code P-TSSOP8-4.4x3-0.65 RENESAS Code PTSP0008JC-B *1 Previous Code TTP-8DAV MASS[Typ.] 0.034g D 8 F 5 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. c HE *2 E bp Terminal cross section ( Ni/Pd/Au plating ) Reference Dimension in Millimeters Symbol Index mark L1 1 e *3 bp x M θ A1 A Z 4 L Detail F y REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 13 of 14 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Min Nom Max 3.00 3.30 4.40 0.03 0.07 0.10 1.10 0.15 0.20 0.25 0.10 0.15 0.20 0° 8° 6.20 6.40 6.60 0.65 0.13 0.10 0.805 0.40 0.50 0.60 1.00 HA1630D07 Taping & Reel Specification [Taping] W 12 12 P 8 4.0 Ao 6.9 3.15 Bo 3.6 4.35 Ko 1.7 — E 1.75 — F 5.5 5.5 D1 1.5 1.05 4.0 φ 1.5 Maximum Storage No. 3,000 pcs/reel 3,000 pcs/reel Unit: mm 1.75 Package Code TSSOP-8 MMPAK-8 2.0 Cover Tape W B0 F A0 K0 D1 P Tape withdraw direction Tape width 12 12 W1 17.4 17.0 W2 13.4 13.0 A 330 178 φA [Reel] Package TSSOP-8 MMPAK-8 φ13.0 ± 0.5 W1 [Ordering Information] Ordering Unit 3,000 pcs 2.0 2.0 W2 Mark Indication • TSSOP-8 • MMPAK-8 0 D 0 7 D 0 7 Trace Code Trace Code REJ03D0859-0200 Rev.2.00 Nov 30, 2007 Page 14 of 14 Sales Strategic Planning Div. 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