™ VE890 Series Voice Solution Single hardware design with The VE8910 chipset is supported by the Zarlink VoicePath™ API-II (VP API-II) software package, which enables designers to program a single hardware circuit for worldwide markets. The VP API-II 'C' code is used to abstract the Zarlink devices from application code while providing functions for controlling, supervising, and testing a set of subscriber lines. The Zarlink VeriVoice™ Test Suite software package provides metallic loop testing based on the Telcordia GR-909 and TIA-1063 recommendations. ILSN IRSN RTV IHL TAC IBO 35 TFLT SWISG 3 34 IBT SWVS 4 33 IBR SWCMP 5 32 RSVD SWOUT 6 Le89116 SLAC 31 AGND SWOUT 7 LQFP-48 30 RSVD DVDD 8 29 AVDD I/O1 9 28 RSVD DGND 10 27 CSMODE I/O2 11 26 I/O3 RST 12 25 I/O4 DGND DVDD 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION The VE8910 chipset is an integrated, low-cost 1FXS chipset that is optimized for VoIP access devices. The chipset implements a complete BORSHT functionality by providing the necessary voice interface functions to power, ring, signal, and connect one or more telephones. On the digital side, the VE8910 chipset provides standard MPI and PCM interfaces to leading VoIP processors. The VE8910 features low power consumption in all modes of operation; In the on-hook / standby mode, it typically draws 120 mW, less than half that of competing solutions. RAC 36 2 INT Devices (IADs), Analog Telephone Adapters (ATAs), and VoIP Gateways 1 FS Residential and SOHO VoIP CPE, such as ADSL2+/VDSL2 Integrated Access 48 47 46 45 44 43 42 41 40 39 38 37 LFC SWIS DXA APPLICATIONS TDC modes. Typical on-hook standby power consumption is 120 mW, less than half that of competing solutions DRA Low power consumption in all RDC 16-kHz sample rates PCLK Standard 8-kHz and Wideband PIN ASSIGNMENTS IREF generator capable of driving 5 REN at 70 VPK or 3 REN at 92 VPK CSEN Integrated balanced ringing VREF configurable for buck-boost or flyback operation FP 16-Pin S (wide OIC ) AVDD Built-in DC/DC controller — Significantly reduces development and testing time — Enables modular designs based on the VE8910 and other members of the VE890 Series for 1FXS, 1FXS+1FXO, and 2FXS+1FXO product variants — Allows for a seamless migration between products using a common software architecture — Supported by SDK, development board, and reference designs Support for GR-909/TIA-1063 metallic loop (line) testing using VeriVoiceTM Test Suite software DIN functions in LQ AGND Implements all the key BORSHT 48-P VoicePathTM API-II Software DCLK Cost-optimized 1FXS chipset for VoIP access devices PACKAGE OPTIONS software support for worldwide markets CS FEATURES DOUT A VE8910 Chipset 1FXS TIP 1 16 RING VBAT 2 15 RSVD BGND 3 14 RSVD VCC 4 13 AGND RSN 5 12 RSVD LSN 6 11 IBR VREF 7 10 IBT IBI 8 9 TFLT Le89810 SLIC SOIC-16 (Wide) FUNCTIONAL BLOCK DIAGRAM T elephone FX S Tip & Ring Line Driver Control Le89810 SLIC Level Shifting Buffer Le89116 SLAC Line Driver Interface Sw itching Regulator Controller Audio Processing Analog Ref. & PLL Supervision, Control, & Test VoIP Processor µProcessor Interface (M PI) PCM Interface & Tim e Slot Assigner (TSA) The information in this document is Preliminary and may be changed in whole or in part without notice. Zarlink makes no guarantee that the device(s) described herein will ever be considered for commercialization or mass production. If you are considering using the proposed device(s) or doing any related design work, please call a Zarlink sales representative for current information. VoicePath API-II Softw are Document ID# 081575 Date: May 1, 2008 Version: 2 Distribution: Protected Document NOTE: On August 3, 2007, Zarlink Semiconductor acquired the products and technology of Legerity Holdings. VE8910 Product Brief FEATURES BENEFITS • Integrated power management enables lowest power solution across all operating modes • Provides the best solution for battery-backed and power sensitive applications • Highly programmable • Offers design flexibility to develop one application for worldwide markets • Full support for wideband audio with 16kHz sampling • One solution meets all market requirements • Comprehensive line sensing and line monitoring with VeriVoice Test Software • Provides complete GR-909 and TIA-1063 diagnostics, loop test and supervision functions • Integrated VoicePath™ API-II Software implements all FXS and FXO functions • Significantly reduces development time SoC MPI & PCM Highway VE8910 Chipset—1 Channel FXS Switching Regulator Controller Internal Balanced Ringing Linear/G.711 A/D & D/A Tip & Ring Line Driver Voice Signal Processor, Supervision, and Test Functions Le89810 Le89116 Related Literature 081575 - VE890 Series, VE8910 Chipset 1FXS Data Sheet* 081560 - VE890 Series, VE8911 Chipset 1FXS + 1FXO Data Sheet* LE71HR8921G - VE890 Series Line Module supporting 2FXS + 1FXO LE71HK0002 - Universal VoicePath™ Development / Demo Platform LE71SK0002 - VoicePath™ API-II Software *Contact your Zarlink Sales Representative to obtain the data sheet. Packaging and Availability See Ordering Information on first page. For More Information: To find the Zarlink Sales Office nearest you or for technical support, visit our website at: www.zarlink.com 2 Zarlink Semiconductor Inc.