DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS Low-Inductance X5R / X7R 6.3 V TO 50 V 10 nF to 1 uF Product Specification – June 26, 2015 V.0 RoHS compliant & Halogen Free Product specification Surface-Mount Ceramic Multilayer Capacitors SCOPE This specification describes Midvoltage X7R series chip capacitors with lead-free terminations Low Inductance 6.3V to 50V 2 13 ORDERING INFORMATION - GLOBAL PART NUMBER, PHYCOMP CTC All part numbers are identified by the series, size, tolerance, TC material, packing style, voltage, process code, termination and capacitance value. APPLICATIONS High speed IC packages YAGEO BRAND ordering code Processor package decoupling GLOBAL PART NUMBER ( PREFERRED ) AC noise reduction in multi-chip modules. CL FEATURES Supplied in tape on reel Nickel-barrier end termination RoHS compliant Halogen Free compliant X5R, X7R XXXX X X XXX X (1) (2) (3) (4) (5) BB XXX (6) (1) SIZE – INCH BASED (METRIC) 0204(0510) 0306(0816) 0508(1220) 0612(1632) (2) TOLERANCE K = ±10% M = ±20% (3) PACKING STYLE R = Paper/PE taping reel; Reel 7 inch K = Blister taping reel; Reel 7 inch (4) TC MATERIAL X5R / X7R (5) RATED VOLTAGE 5 = 6.3 V 6 = 10 V 7 = 16 V 8 = 25 V 9 = 50 V (6) CAPACITANCE VALUE 2 significant digits+number of zeros The 3rd digit signifies the multiplying factor, and letter R is decimal point Example: 121 = 12 x 101 = 120 pF Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 3 13 CONSTRUCTION The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two end terminations and finally covered with a layer of plated tin (NiSn). The terminations are lead-free. A cross section of the structure is shown in Fig.1. Fig. 1 Surface mounted multilayer ceramic capacitor construction DIMENSION Table 1 For outlines see fig. 2 TYPE L1 (mm) W (mm) OUTLINES T (mm) L2 / L3 (mm) min. max. L4 (mm) min. 0204 0.5 ±0.1 1.0 ±0.1 0.3 ±0.1 0.1 0.3 0.1 0306 0.8 ±0.15 1.6 ±0.2 0.5 ±0.1 0.1 0.3 0.2 0508 1.25 ±0.2 2.0 ±0.2 0.85 ±0.1 0.13 0.46 0.38 0612 1.6 ±0.2 3.2 ±0.2 0.85 ±0.1 0.13 0.46 0.50 0612* 1.6 ±0.2 3.2 ±0.2 1.15 ±0.1 0.13 0.46 0.50 0612*: 1uF/16V, 470nF~1uF/25V, 120nF~470nF/50V Jun. 26, 2015 V.0 For dimension see Table 1 Fig. 2 Surface mounted multilayer ceramic capacitor dimension www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 4 13 CAPACITANCE RANGE & THICKNESS FOR X5R Table 2 Sizes from 0204 CAP. 0204 6.3 V / 10V 10 nF 0.3 ±0.1 15 nF 0.3 ±0.1 22 nF 0.3 ±0.1 33 nF 0.3 ±0.1 47 nF 0.3 ±0.1 68 nF 0.3 ±0.1 100 nF 0.3 ±0.1 150 nF 220 nF 330 nF 470 nF 680 nF 1 uF NOTE 1. Values in shaded cells indicate thickness class in mm 2. Capacitance value of non E-6 series is on request 3. For special ordering code, please contact local sales force before order. Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 5 13 CAPACITANCE RANGE & THICKNESS FOR X7R Table 3 Sizes from 0306 to 0508 CAP. 0306 0508 6.3 V / 10V 10 V 16 V 25 V 10 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 15 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 22 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 33 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 47 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 68 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 100 nF 0.5 ±0.1 150 nF 220 nF 0.5 ±0.1 330 nF 470 nF 0.85 ±0.1 680 nF 1 uF 0.85 ±0.1 NOTE 1. Values in shaded cells indicate thickness class in mm 2. Capacitance value of non E-6 series is on request 3. For special ordering code, please contact local sales force before order. Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 6 13 CAPACITANCE RANGE & THICKNESS FOR X7R Table4 Sizes from 0612 CAP. 0612 6.3 V 10 V 16 V 25 V 50 V 10 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 15 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 22 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 33 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 47 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 68 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 100 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 150 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 1.15 ±0.1 1.15 ±0.1 220 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 1.15 ±0.1 1.15 ±0.1 330 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 1.15 ±0.1 1.15 ±0.1 470 nF 0.85 ±0.1 0.85 ±0.1 0.85 ±0.1 1.15 ±0.1 1.15 ±0.1 680 nF 1.15 ±0.1 1.15 ±0.1 1.15 ±0.1 1.15 ±0.1 1 uF 1.15 ±0.1 1.15 ±0.1 1.15 ±0.1 1.15 ±0.1 NOTE 1. Values in shaded cells indicate thickness class in mm 2. Capacitance value of non E-6 series is on request 3. For special ordering code, please contact local sales force before order THICKNESS CLASSES AND PACKING QUANTITY Table 5 SIZE CODE THICKNESS CLASSIFICATION TAPE WIDTH QUANTITY PER REEL 0204 Ø 180 MM / 7 INCH Paper Blister Ø 330 MM / 13 INCH Paper Blister QUANTITY PER BULK CASE 0.3 ±0.1 mm 8 mm 10,000 --- --- --- --- 0306 0.5 ±0.1 mm 8 mm 4,000 --- --- --- --- 0508 0.85 ±0.1 mm 8 mm 4,000 --- --- --- --- 0612 0.85 ±0.1 mm 8 mm 4,000 --- --- --- --- 0612 1.15 ±0.1 mm 8 mm --- 3,000 --- --- --- Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 7 13 6.3V to 50V ELECTRICAL CHARACTERISTICS X7R DIELECTRIC CAPACITORS; Unless otherwise specified, all test and measurements shall be made under standard atmospheric conditions for testing as given in 5.3 of IEC 60068-1: - Temperature: 15 °C to 35 °C Relative humidity: 25% to 75% Air pressure: 86 kPa to 106 kPa Before the measurements are made, the capacitor shall be stored at the measuring temperature for a time sufficient to allow the entire capacitor to reach this temperature. The period as prescribed for recovery at the end of a test is normally sufficient for this purpose. Table 6 DESCRIPTION Capacitance range VALUE 10 nF to 1 uF Capacitance tolerance X5R / X7R ±10%, ±20% Dissipation factor (D.F.) X5R / X7R Insulation resistance after 1 minute at Ur (DC) ≤5% Rins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less Maximum capacitance change as a function of temperature (temperature characteristic/coefficient): X5R / X7R ±15% Operating temperature range: X5R –55 °C to +85 °C X7R –55 °C to +125 °C Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 8 13 SOLDERING RECOMMENDATION Table 7 SIZE SOLDERING METHOD 0204 0306 0508 0612 O O O O Reflow Reflow/Wave TESTS AND REQUIREMENTS Table 8 TEST Test procedures and requirements TEST PROCEDURE METHOD Mounting IEC 6038421/22 REQUIREMENTS 4.3 The capacitors may be mounted on printed-circuit boards or ceramic substrates No visible damage Visual Inspection and Dimension Check 4.4 Any applicable method using × 10 magnification In accordance with specification Capacitance 4.5.1 Class 1: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at Within specified tolerance 20 °C f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C Class 2: f = 1 KHz, measuring at voltage 0.5 Vrms at 20 °C Dissipation Factor (D.F.) 4.5.2 Class 1: f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 Vrms In accordance with specification at 20 °C f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C Class 2: f = 1 KHz, measuring at voltage 0.5 Vrms at 20 °C Insulation Resistance Jun. 26, 2015 V.0 4.5.3 At Ur (DC) for 1 minute In accordance with specification www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors TEST TEST METHOD Temperature coefficient 4.6 Low Inductance X5R, X7R 6.3V to 50V PROCEDURE REQUIREMENTS Capacitance shall be measured by the steps shown in the following table. <General purpose series> Class1: ∆ C/C: ±30ppm The capacitance change should be measured after 5 min at each specified temperature stage. Step Temperature(℃) a 25±2 b Lower temperature±3℃ c 25±2 d Upper Temperature±2℃ e 25±2 (1) Class I Temperature Coefficient shall be calculated from the formula as below C2 - C1 106 [ppm/℃] Temp, Coefficient = C1xΔT 9 13 Class2: X7R: ∆ C/C: ±15% Y5V: ∆ C/C: 22~-82% <High Capacitance series> Class2: X7R/X5R: ∆ C/C: ±15% Y5V: ∆ C/C: 22~-82% In case of applying voltage, the capacitance change should be measured after 1 more min. with applying voltage in equilibration of each temp. stage. C1: Capacitance at step c C2: Capacitance at 125℃ ∆T: 100℃(=125℃-25℃) (2) Class II Capacitance Change shall be calculated from the formula as below C2 - C1 ∆C = x 100% C1 C1: Capacitance at step c C2: Capacitance at step b or d Adhesion Bending Strength Jun. 26, 2015 V.0 IEC 6038421/22 4.7 A force applied for 10 seconds to the line joining the terminations and in a plane parallel to the substrate Force size ≥ 0306: 5N size = 0204: 2.5N 4.8 Mounting in accordance with IEC 6038422 paragraph 4.3 No visible damage Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm ∆C/C Class2: X7R: ±10% www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors TEST TEST METHOD Resistance to Soldering Heat 4.9 6.3V to 50V 10 13 REQUIREMENTS Precondition: 150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at room temperature Dissolution of the end face plating shall not exceed 25% of the length of the edge concerned Preheating: 120 °C to 150 °C for 1 minute and 170 °C to 200 °C for 1 minute. ∆C/C Class2: X7R: ±10% Dipping time: 10 ±0.5 seconds Recovery time: 24 ±2 hours 4.10 X5R, X7R PROCEDURE Solder bath temperature: 260 ±5 °C Solderability Low Inductance Preheated the temperature of 80 °C to 140 °C and maintained for 30 seconds to 60 seconds. D.F. within initial specified value Rins within initial specified value The solder should cover over 95% of the critical area of each termination Test conditions for leadfree containing solder alloy Temperature: 245 ±5 °C Dipping time: 3 ±0.3 seconds Depth of immersion: 10 mm Rapid Change of Temperature IEC 6038421/22 4.11 Preconditioning; 150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at room temperature 5 cycles with following detail: 30 minutes at lower category temperature 30 minutes at upper category temperature No visual damage ∆C/C Class2: X7R: ±15% D.F. meet initial specified value Rins meet initial specified value Recovery time 24 ±2 hours Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors TEST TEST METHOD Damp Heat with Ur load 4.13 Low Inductance 6.3V to 50V PROCEDURE REQUIREMENTS 1. Preconditioning, class 2 only: No visual damage after recovery 150 +0/-10 °C /1 hour, then keep for 24 ±1 hour at room temp 2. Initial measure: Spec: refer initial spec C, D, IR 3. Damp heat test: 500 ±12 hours at 40 ±2 °C; 90 to 95% R.H; 1.0 Ur applied. 4. Recovery: Class 1: 6 to 24 hours Class 2: 24 ±2 hours Jun. 26, 2015 V.0 X5R, X7R 11 13 ∆C/C Class2: X7R: ±20% D.F. Class 1: NP0: ≤ 2 x specified value Class2: X7R: ≤ 2 x specified value Rins 5. Final measure: C, D, IR Class2: X7R: ≥ 500 MΩ or Rins x Cr ≥ 25s P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be precondition according to “IEC 60384 4.1” and then the requirement shall be met. whichever is less ΔC/C Class2: X7R: ±25% D.F. Class2: X7R: ≤ 2 x specified value Rins Rins x Cr ≥ 25 Ω· F www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R TEST TEST METHOD PROCEDURE REQUIREMENTS Endurance IEC 6038421/22 1. Preconditioning, class 2 only: No visual damage 4.14 150 +0/-10 °C /1 hour, then keep for 24 ±1 hour at room temp 2. Initial measure: Spec: refer initial spec C, D, IR 3. Endurance test: Temperature: NP0: 125 °C Specified stress voltage applied for 1,000 hours: Applied 2.0 x Ur for general product 6.3V to 50V 12 13 ∆C/C Class2: X7R: ±20% D.F. Class2: X7R: ≤ 2x initial value max Rins Class2: Temperature: X7R: 125°C Specified X7R: ≥ 1,000 MΩ or stress voltage applied for 1,000 hours: Rins x Cr ≥ 50s whichever is less Recovery time: 24 ±2 hours 4. Final measure: C, D, IR Voltage Proof IEC 60384-1 4.5.4 Δ C/C P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be precondition according to “IEC 60384 4.1” and then the requirement shall be met. Class2: X7R: ±25% Specified stress voltage applied for 1 to 5 seconds Ur ≤ 100 V: series applied 2.5 Ur No breakdown or flashover D.F. Class2: X7R: ≤ 2x initial value max Rins Class2: Rins x Cr ≥ 50 Ω· F Charge/Discharge current less than 50mA Jun. 26, 2015 V.0 www.yageo. com Product specification Surface-Mount Ceramic Multilayer Capacitors Low Inductance X5R, X7R 6.3V to 50V 13 13 REVISION HISTORY REVISION DATE Version 0 CHANGE NOTIFICATION Jun. 26, 2015 - Jun. 26, 2015 V.0 DESCRIPTION - New www.yageo. com