DATA SHEET

DATA SHEET
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
Product Specification – December 4, 2014 V.19
General data
Product specification
Surface-Mount Ceramic Multilayer Capacitors
2
18
General data
PACKING
TAPE AND REEL SPECIFICATIONS
Packing conforms fully with “IEC 60286-3”, “EIA 481-1”
and “JIS C0806” industrial standards.
Multilayer Chip Capacitors (MLCCs) are supplied on
tape on reel or in bulk case. For MLCCs with a product
thickness of <1 mm, paper/PE tape is preferred. MLCCs
with a product thickness of ≥ 1 mm, are supplied in
embossed blister tape.
For the combination carrier/cover tape no electrostatic
behaviour is observed (relative humidity ≥ 30%). The
products do not stick to the cover tape. The technical
and thermal properties of polycarbonate tapes are
excellent, so there is no change in dimensions as a
function of time. The peel off force is very stable as a
function of time and temperature, and it is defined as
0.1 to 0.7 N at a peel-off speed of 300 mm/minute.
Table 1 Properties of carrier tape - polycarbonate
8.1/12 MM TAPE WIDTH, 0.2 MM TOLERANCE
Thickness
130 to 360µm
Tensile strength at break
> 60 MPa
Elongation at break
100 to 150%
Surface resistance
< 1012 Ω/sq.
Table 2 Properties of cover tape - polyester (antistatic)
5.5/9.5 MM TAPE WIDTH, 0.1 MM TOLERANCE
Thickness
62 µm
Breaking force
> 20 N / ≥ 17.6 N
Elongation at break
105 ± 60%
< 1011 Ω/sq.
Surface resistance
BULK-CASE SPECIFICATION
In accordance with “IEC 60286-6”.
Reduced costs
-
Storage
-
Transport
-
Machine handling
-
Packing
Customized labelling (bar codes)
Available component size please
see table 3
Fig. 1 Bulk-case outline
OUTLINES
Table 3 Packing quantities for component size; see note 1 and Fig.1
For dimension see Table 3
Fig. 2 Surface mounted multilayer
ceramic capacitor dimension
L1 (mm)
W (mm)
T (mm)
QUANTITY PER BULK CASE
0402
1.0
0.5
0.5
50,000
0603
1.6
0.8
0.8
15,000
0805
2.0
1.25
0.6
10,000
0805
2.0
1.25
0.85
8,000
0805
2.0
1.25
1.25
5,000
SIZE CODE
NOTE
1. Refer to the selection charts in product data for specific values
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
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General data
PAPER/PE TAPE SPECIFICATION
Fig. 3 Paper/PE tape
Table 4 Dimensions of paper/PE tape for relevant chip size; see Fig.3
SIZE
SYMBOL
Unit: mm
(1)
CODE
A0
0201
0.37 ± 0.03 0.69 ± 0.05 8.0 ± 0.20 1.75 ± 0.1
3.50 ± 0.05 4.0 ± 0.10 2.0 ± 0.05 2.0 ± 0.05 1.55 ± 0.03
0402
0.65 ± 0.15 1.10 ± 0.15 8.0 ± 0.20 1.75 ± 0.1
3.50 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0 0.60 ± 0.10
0603
0.95 ± 0.15 1.78 ± 0.15 8.0 ± 0.20 1.75 ± 0.1
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0 0.95 ± 0.15
0805
1.50 ± 0.15 2.26 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
1206
1.90 ± 0.15 3.50 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
(0.95 / 0.75)±
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0
0.10
(0.95 / 0.75)±
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0
0.10
(0.95 / 0.75)±
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0
0.10
B0
W
E
4 × 0402 1.50 ± 0.15 2.26 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
4 × 0603 1.90 ± 0.15 3.50 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
0508
1.50 ± 0.15 2.26 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
0612
1.90 ± 0.15 3.50 ± 0.20 8.0 ± 0.20 1.75 ± 0.1
F
P0
P1
P2
Ø D0
T
0.42 ± 0.05
(0.95 / 0.75)±
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0
0.10
(0.95 / 0.75)±
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0
0.10
3.50 ± 0.05 4.0 ± 0.05 4.0 ± 0.05 2.0 ± 0.05 1.50 +0.1 /-0 (0.95 / 0.75)±
0.10
NOTE
1. P0 pitch tolerance over any 10 pitches is 0.2 mm
2. 4 x 0402 stands for 0508 array
3. 4 x 0603 stands for 0612 array
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Product specification
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General data
BLISTER TAPE SPECIFICATION
For dimension see Table 4
K0: so chosen that the orientation of the component
cannot change
For W = 8 mm: T2 = 3.5 mm max.
For W = 12 mm: T2 = 6.5 mm max.
Fig. 4 Blister tape
Table 5 Dimensions of blister tape for relevant chip size; see Fig.4
SYMBOL
SIZE
B0
CODE A0
Unit: mm
K0
W
Min. Max. Min. Max. Min. Max.
E
F
Ø D0
Ø D1
P0
(2)
P1
P2
Min.
0805
1.29 1.57 2.08 2.39 1.27 1.55 8.1 ± 0.20
1.70 ± 0.1 3.5 ± 0.05 1.5 +0.1/-0.0 1 +0.1/-0.0
4.0 ± 0.10 4.0 ± 0.10 2.0 ± 0.05
1206
1.65 2.01 3.30 3.63 1.22 2.03 8.1 ± 0.20
1.70 ± 0.1 3.5 ± 0.05 1.5 +0.1/-0.0 1 +0.1/-0.0
4.0 ± 0.10 4.0 ± 0.10 2.0 ± 0.05
1210
2.55 3.02 3.28 3.76 0.78 2.75 8.1 ± 0.20
1.70 ± 0.1 3.5 ± 0.05 1.5 +0.1/-0.0 1 +0.1/-0.0
4.0 ± 0.10 4.0 ± 0.10 2.0 ± 0.05
1808
2.10 2.45 4.80 5.45 1.30 2.45 12.1 ± 0.20 1.70 ± 0.1 5.5 ± 0.05 1.5 +0.1/-0.0 1.5 +0.1/-0.0 4.0 ± 0.10 8.0 ± 0.10 2.0 ± 0.05
1812
3.24 3.75 4.60 5.20 0.80 2.40 12.1 ± 0.20 1.70 ± 0.1 5.5 ± 0.05 1.5 +0.1/-0.0 1.5 +0.1/-0.0 4.0 ± 0.10 8.0 ± 0.10 2.0 ± 0.05
2220
5.12 5.32 5.84 6.04 1.28 1.48 12.0 ± 0.20 1.70 ± 0.1 5.5 ± 0.05 1.5 +0.1/-0.0 1.5 +0.1/-0.0 4.0 ± 0.10 8.0 ± 0.10 2.0 ± 0.05
NOTE
1. Typical capacitor displacement in pocket
2. P0 pitch tolerance over any 10 pitches is ±0.2 mm
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Product specification
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18
General data
REEL SPECIFICATION
Fig. 5 Reel
Table 6 Reel dimensions; see Fig.5
SYMBOL
TAPE WIDTH
A
N
C
W1
8 (Ø 178 mm/7")
178 ± 1.0
60 ± 1.0
13 +0.50/-0.20
9.0 ± 0.2
14.4
8 (Ø 330 mm/13")
330 ± 1.0
100 ± 1.0
13 +0.50/-0.20
9.0 ± 0.2
14.4
12 (Ø 178 mm/7")
178 ± 1.0
60 ± 1.0
13 +0.50/-0.20
13.4 ± 1.5
18.4
Unit: mm
W2max.
P ROPERTIES OF REEL
Material: polystyrene
Surface resistance: <10 10
/sq.
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Product specification
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18
General data
THICKNESS CLASSES AND PACKING QUANTITY
Table 7
SIZE
CODE
Ø 180 MM / 7 INCH
Ø 330 MM / 13 INCH
THICKNESS
CLASSIFICATION
TAPE WIDTH
QUANTITY PER REEL
Paper/PE
Blister
Paper/PE
Blister
QUANTITY
PER BULK CASE
0201
0.3 ± 0.03 mm
8 mm
15,000
---
50,000
---
---
0402
0.5 ± 0.05 mm
8 mm
10,000
---
50,000
---
50,000
0603
0.8 ± 0.1 mm
8 mm
4,000
---
15,000
---
15,000
0.6 ± 0.1 mm
8 mm
4,000
---
20,000
---
10,000
0805
0.85 ± 0.1 mm
8 mm
4,000
---
15,000
---
8,000
1.25 ± 0.2 mm
8 mm
---
3,000
---
10,000
5,000
0.6 ± 0.1 mm
8 mm
4,000
---
20,000
---
---
0.85 ± 0.1 mm
8 mm
4,000
---
15,000
---
---
1.00 / 1.15 ± 0.1 mm
8 mm
---
3,000
---
10,000
---
1.25 ± 0.2 mm
8 mm
---
3,000
---
10,000
---
1.6 ± 0.15 mm
8 mm
---
2,500
---
10,000
---
1.6 ± 0.2 mm
8 mm
---
2,000
---
8,000
---
0.6 / 0.7 ± 0.1 mm
8 mm
---
4,000
---
15,000
---
0.85 ± 0.1 mm
8 mm
---
4,000
---
10,000
---
1206
1.15 ± 0.1 mm
8 mm
---
3,000
---
10,000
---
1.15 ± 0.15 mm
8 mm
---
3,000
---
10,000
---
1.25 ± 0.2 mm
8 mm
---
3,000
---
---
---
1.5 ± 0.1 mm
8 mm
---
2,000
---
---
---
1.6 / 1.9 ± 0.2 mm
8 mm
---
2,000
---
---
---
2.0 ± 0.2 mm
8 mm
---
2,000
1,000
---
---
---
2.5 ± 0.2 mm
8 mm
---
1,000
500
---
---
---
1.15 ± 0.15 mm
12 mm
---
3,000
---
---
---
1.25 ± 0.2 mm
12 mm
---
3,000
---
---
---
1.35 ± 0.15 mm
12 mm
---
2,000
---
---
---
1.5 ± 0.1 mm
12 mm
---
2,000
---
---
---
1.6 ± 0.2 mm
12 mm
---
2,000
---
---
---
2.0 ± 0.2 mm
12 mm
---
2,000
---
---
---
0.6 / 0.85 ± 0.1 mm
12 mm
---
2,000
---
---
---
1.15 ± 0.1 mm
12 mm
---
1,000
---
---
---
1.25 ± 0.2 mm
12 mm
---
1,000
---
---
---
1.5 ± 0.1 mm
12 mm
---
1,000
---
---
---
1.6 ± 0.2 mm
12 mm
---
1,000
---
---
---
2.0 ± 0.2 mm
12 mm
---
1,000
---
---
---
2.5 ± 0.2 mm
12 mm
---
500
---
---
---
1210
1808
1812
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
General data
7
18
LEADER/TRAILER TAPE SPECIFICATION
Fig. 6 Leader/trailer tape
Table 8 Leader/trailer tape data
DESCRIPTION
VALUE
Minimum length of empty compartments at leader end
≥ 400 mm of which a minimum 260 mm of empty compartments
are covered with cover tape and ≥ 180 mm cover tape only
Minimum length of empty compartments at trailer end
≥ 180 mm
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Product specification
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General data
LABELLING
Label examples are shown in Fig. 7
LINE MARKING EXPLANATION
1
Quantity
2
Bar code of batch no (1D)
3
Unique batch number
4
Bar code of CTC (2D)
5
Taping week code
6
Series code of reel
Fig. 7 Packing label
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
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General data
MOUNTING
SOLDERING CONDITIONS
For normal use the capacitors may
be mounted on printed-circuit
boards or ceramic substrates by
applying wave soldering, reflow
soldering or conductive adhesive in
accordance with IEC 61760-1
(Standard method for the
specification of surface mounting
components). For advised soldering
profiles see Figs 8, 9, 10.
An improper combination of
soldering, substrate and chip size
can lead to a damaging of the
component. The risk increases
with the chip size and with
temperature fluctuations (>100 °C).
Therefore, it is advised to use the
smallest possible size and follow
the dimensional recommendations
given in Tables 8, 9 and 10 for
reflow and wave soldering. More
detailed information is available
on request.
Solid line: Typical process (terminal temperature)
Dotted lines: Process limits - bottom process limit (terminal temperature) & upper process limit
(top surface temperature).
Fig. 8 Infrared soldering, forced gas convection reflow soldering - Temperature/time profile for SnPb solders
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
General data
10
18
Solid line: Typical process (terminal temperature)
Dotted lines: Process limits - bottom process limit (terminal temperature) & upper process limit
(top surface temperature).
Fig. 9 Infrared soldering, forced gas convection reflow soldering - Temperature/time profile for lead-free SnAgCu solders
Solid line: Typical process
Dotted lines: Process limits
Fig. 10 Double wave soldering for SnPb and lead-free SnAgCu solder - Temperature/time profile (terminal temperature)
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Product specification
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18
General data
FOOTPRINT DIMENSIONS
Fig. 11 Discrete capacitors recommended dimensions of footprint
Table 9 Reflow soldering; for footprint dimensions see Fig.11
SIZE
Unit: mm
FOOTPRINT DIMENSIONS
CODE A
B
C
D
E
F
G
0201
0.8 ± 0.20
0.25 ± 0.05
0.28 ± 0.07
0.3 ± 0.10
---
---
---
0402
1.5 ± 0.15
0.5 ± 0.15
0.5 ± 0.15
0.5 ± 0.15
0.10 ± 0.15
1.75 ± 0.15
0.95 ± 0.15
0603
2.3 ± 0.15
0.7 ± 0.15
0.8 ± 0.15
0.9 ± 0.15
0.26 ± 0.15
2.7 ± 0.15
1.5 ± 0.15
0603
2.3 ± 0.25
0.5 ± 0.25
0.9 ± 0.25
0.9 ± 0.25
0.0 ± 0.25
2.7 ± 0.25
1.5 ± 0.25
0805
2.8 ± 0.25
0.9 ± 0.25
0.95 ± 0.25
1.4 ± 0.25
0.45 ± 0.25
3.2 ± 0.25
2.1 ± 0.25
1206
4.0 ± 0.25
2.0 ± 0.25
1.0 ± 0.25
1.8 ± 0.25
1.4 ± 0.25
4.4 ± 0.25
2.5 ± 0.25
1210
4.0 ± 0.25
2.0 ± 0.25
1.0 ± 0.25
2.7 ± 0.25
1.4 ± 0.25
4.4 ± 0.25
3.4 ± 0.25
1808
5.4 ± 0.25
3.3 ± 0.25
1.05 ± 0.25
2.3 ± 0.25
2.7 ± 0.25
5.8 ± 0.25
2.9 ± 0.25
1812
5.4 ± 0.25
3.3 ± 0.25
1.05 ± 0.25
3.5 ± 0.25
2.7 ± 0.25
5.8 ± 0.25
4.1 ± 0.25
2220
6.6 ± 0.25
4.5 ± 0.25
1.05 ± 0.25
5.3 ± 0.25
3.9 ± 0.25
7.0 ± 0.25
5.9 ± 0.25
Processing remarks
IR or hot plate soldering
Ceramic substrate only
Table 10 Wave soldering (no dummy tracks allowed for ≥ 500 V); for footprint dimensions see Fig.11
SIZE
Unit: mm
FOOTPRINT DIMENSIONS
CODE A
B
C
D
E
F
G
0603
2.4 ± 0.10
1.0 ± 0.10
0.7 ± 0.10
0.8 ± 0.10
0.2 ± 0.10
3.0 ± 0.10
1.9 ± 0.10
1 x (0.2 x 0.8)
0603
2.7 ± 0.25
0.9 ± 0.25
0.9 ± 0.25
0.8 ± 0.25
0.0 ± 0.25
3.2 ± 0.25
2.1 ± 0.25
1 x (0.3 x 0.8)
0805
3.2 ± 0.15
1.4 ± 0.15
0.9 ± 0.15
1.3 ± 0.15
0.36 ± 0.15 4.1 ± 0.15
2.5 ± 0.15
1 x (0.3 x 1.3)
0805
3.4 ± 0.25
1.3 ± 0.25
1.05 ± 0.25 1.3 ± 0.25
0.2 ± 0.25
4.3 ± 0.25
2.7 ± 0.25
1 x (0.2 x 1.3)
1206
4.8 ± 0.25
2.3 ± 0.25
1.25 ± 0.25 1.7 ± 0.25
1.25 ± 0.25 5.9 ± 0.25
3.2 ± 0.25
3 x (0.25 x 1.7)
Number & dimensions to dummy tracks
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Product specification
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18
General data
Fig. 12 Recommended footprint dimensions for C-Array
Table 11 C-Array footprint dimensions; see Fig.12
FOOTPRINT DIMENSIONS
SIZE
Unit: mm
CODE
A
B
C
D
E
0405 (2 x 0402)
1.4 ± 0.15
0.4 ± 0.05
0.6 ± 0.05
0.64
0.35 ± 0.05
0508 (4 x 0402)
1.65 ± 0.15
0.55 ± 0.05
0.55 ± 0.05
0.5
0.25 ± 0.05
0612 (4 x 0603)
2.54 ± 0.15
0.89 ± 0.10
0.76 ± 0.10
0.80 ± 0.10
0.45 ± 0.10
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Product specification
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General data
TESTS AND REQUIREMENTS
Table 12 Test procedures and requirements
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Mounting
IEC 6038421/22
4.3
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
inspection
and
dimension
check
4.4
Any applicable method using × 10 magnification
In accordance with specification
Capacitance
4.5.1
Class 1:
f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C
Within specified tolerance
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
f = 120 Hz for C >10 µF, measuring at voltage 0.5 Vrms at 20 °C
Dissipation
factor (D.F.)
4.5.2
Class 1:
f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 V rms at 20 °C
In accordance with specification
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
f = 120 Hz for C > 10 µF, measuring at voltage 0.5 Vrms at 20 °C
Insulation
resistance
4.5.3
At Ur (DC) for 1 minute
In accordance with specification
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Product specification
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TEST
TEST METHOD
Temperature
coefficient
4.6
18
General data
PROCEDURE
REQUIREMENTS
Capacitance shall be measured by the steps shown in the following
table.
<General purpose series>
Class1:
∆ C/C: ± 30ppm
The capacitance change should be measured after 5 min at each
specified temperature stage.
Step
Temperature(℃)
a
25± 2
b
Lower temperature± 3℃
c
25± 2
d
Upper Temperature± 2℃
e
25± 2
14
Class2:
X7R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
<High Capacitance series>
Class2:
X7R/X5R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
(1) Class I
Temperature Coefficient shall be calculated from the formula as
below
Temp, Coefficient =
C2 - C1
106 [ppm/℃]
C1 xΔT
C1: Capacitance at step c
C2: Capacitance at 125℃
∆T: 100℃(=125℃-25℃)
(2) Class II
Capacitance Change shall be calculated from the formula as below
C2 - C1
∆C =
x 100%
C1
C1: Capacitance at step c
C2: Capacitance at step b or d
Adhesion
4.7
A force applied for 10 seconds to the line joining the terminations
and in a plane parallel to the substrate
Force
size ≥ 0603: 5N
size = 0402: 2.5N
size = 0201: 1N
IEC 60384Bond
21/22
strength of
plating on end
face
4.8
Mounting in accordance with IEC 60384-22 paragraph 4.3
No visible damage
Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm
<General purpose series>
∆C/C
Class 1:
NP0: within ± 1% or 0.5 pF,
whichever is greater
Class2:
X5R/X7R/Y5V: ± 10%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R/Y5V: ± 10%
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
TEST
Resistance to
soldering heat
TEST METHOD
4.9
18
General data
PROCEDURE
REQUIREMENTS
Precondition: 150 +0/–10 °C for 1 hour, then
keep for 24 ± 1 hours at room temperature
Dissolution of the end face plating shall not
exceed 25% of the length of the edge
concerned
Preheating: for size ≤ 1206: 120 °C to 150 °C for
1 minute
Preheating: for size >1206: 100 °C to 120 °C for
1 minute and 170 °C to 200 °C for 1 minute
Solder bath temperature: 260 ± 5 °C
Dipping time: 10 ± 0.5 seconds
Recovery time: 24 ± 2 hours
15
<General purpose series>
∆C/C
Class 1:
NP0: within ± 0.5% or 0.5 pF, whichever is greater
Class2:
X5R/X7R: ± 10%
Y5V: ± 20%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R: ± 10%
Y5V: ± 20%
D.F. within initial specified value
Rins within initial specified value
Solderability
4.10
Preheated the temperature of 80 °C to 140 °C
and maintained for 30 seconds to 60 seconds.
The solder should cover over 95% of the critical
area of each termination
Test conditions for lead containing solder alloy
Temperature: 235 ± 5 °C
Dipping time: 2 ± 0.2 seconds
Depth of immersion: 10 mm
Alloy Composition: 60/40 Sn/Pb
Number of immersions: 1
Test conditions for leadfree containing solder alloy
Temperature: 245 ± 5 °C
Dipping time: 3 ± 0.3 seconds
Depth of immersion: 10 mm
Alloy Composition: SAC305
Number of immersions: 1
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
TEST METHOD
PROCEDURE
REQUIREMENTS
Rapid change
of
temperature
IEC 6038421/22
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for
24 ± 1 hours at room temperature
No visual damage
4.11
18
General data
TEST
16
<General purpose series>
∆C/C
5 cycles with following detail:
30 minutes at lower category temperature
30 minutes at upper category temperature
Recovery time 24 ± 2 hours
Class 1:
NP0: within ± 1% or 1 pF, whichever is greater
Class2:
X5R/X7R: ± 15%
Y5V: ± 20%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R: ± 15%
Y5V: ± 20%
D.F. meet initial specified value
Rins meet initial specified value
Damp heat
with Ur load
4.13
1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for
24 ± 1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Damp heat test:
500 ± 12 hours at 40 ± 2 °C;
90 to 95% R.H. 1.0 Ur applied
4. Recovery:
Class 1: 6 to 24 hours
Class 2: 24 ± 2 hours
5. Final measure: C, D, IR
P.S. If the capacitance value is less than the
minimum value permitted, then after the
other measurements have been made the
capacitor shall be precondition according to
“IEC 60384 4.1” and then the requirement
shall be met.
No visual damage after recovery
<General purpose series>
∆C/C
Class 1:
NP0: within ± 2% or 1 pF, whichever is greater
Class2:
X5R/X7R: ± 15%; Y5V: ± 30%
D.F.
Class 1: NP0: ≤ 2 x specified value
Class2:
X5R/X7R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
Y5V: ≤ 15%
Rins
Class 1:
NP0: ≥ 2,500 MΩ or Rins x Cr ≥ 25s whichever is less
Class2:
X5R/X7R/Y5V: ≥ 500 MΩ or Rins x Cr ≥ 25s
whichever is less
<High Capacitance series>
∆C/C
Class2: X5R/X7R: ± 20%; Y5V: ± 30%
D.F.
Class2: 2 x initial value max
Rins
Class2: 500 MΩ or Rins x Cr ≥ 25s, whichever is less
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Dec. 4, 2014 V.18
Product specification
Surface-Mount Ceramic Multilayer Capacitors
TEST
TEST METHOD
Endurance
IEC 6038421/22
General data
PROCEDURE
4.14 1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for
24 ± 1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Endurance test:
Temperature: NP0/X7R: 125 °C
X5R/Y5V: 85 °C
Specified stress voltage applied for 1,000 hours:
Applied 2.0 x Ur for general product
Applied 1.5 x Ur for high cap. product
High voltage series follows with below stress
condition:
Applied 1.3 x Ur for 500V series
Applied 1.2 x Ur for 1KV, 2KV, 3KV series
18
REQUIREMENTS
No visual damage
<General purpose series>
∆C/C
Class1:
NP0: within ± 2% or 1 pF, whichever is greater
Class2:
X5R/X7R: ± 15%; Y5V: ± 30%
D.F.
Class1:
NP0: ≤ 2 x specified value
Class2:
X5R/X7R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
4. Recovery time: 24 ± 2 hours
Y5V: ≤ 15%
5. Final measure: C, D, IR
Rins
P.S. If the capacitance value is less than the
minimum value permitted, then after the other
measurements have been made the capacitor shall
be precondition according to “IEC 60384 4.1” and
then the requirement shall be met.
17
Class1:
NP0: ≥ 4,000 MΩ or
Rins x Cr ≥ 40s whichever is less
Class2:
X5R/X7R/Y5V: ≥ 1,000 MΩ or
Rins x Cr ≥ 50s whichever is less
<High Capacitance series>
∆C/C
Class 2:
X5R/X7R: ± 20%; Y5V: ± 30%
D.F.
Class 2:
2 x initial value max
Rins
Class 2:
1,000 MΩ or Rins x Cr ≥ 50s, whichever is less
Voltage proof
IEC 60384-1
4.6
Specified stress voltage applied for 1 minute
No breakdown or flashover
Ur ≤ 100 V: series applied 2.5 Ur
100 V < Ur ≤ 200 V series applied (1.5 Ur + 100)
200 V < Ur ≤ 500 V series applied (1.3 Ur + 100)
Ur > 500 V: 1.3 Ur
I: 7.5 mA
www.yageo.com
Dec. 4, 2014 V.18
Product specification
Surface-Mount Ceramic Multilayer Capacitors
General data
18
18
REVISION HISTORY
REVISION
DATE
CHANGE NOTIFICATION
Version 19
Dec. 04, 2014
- Dimensions of paper
Version 18
Jun. 10, 2014
- Dimensions of paper
Version 17
Jun. 17, 2013
- Thickness classes and Packing quantity updated
Version 16
Oct 05, 2012
- Thickness classes and Packing quantity updated
Version 15
Mar 09, 2011
- Packing quantity added
Version 14
Feb 18, 2011
- 0201 PE tape specifications added
Version 13
Sep 15, 2010
- Dimensions of blister tape updated
Version 12
Sep 18, 2009
- PE tape specifications updated
Version 11
Sep 07, 2009
- PE tape specifications added
Version 10
Jun 12, 2009
- Paper tape specifications updated
Version 9
Apr 03, 2009
- Change to dual brand datasheet
- Label definition updated
- Reflow soldering for Sn/Pb chart updated
- Reflow soldering for lead free (Pb-free) chart added
- Double wave soldering chart updated
- Tests and requirements updated
Version 8
Apr 11, 2006
- Taping quality improved
Version 7
Jul 10, 2003
- Company logo updated
- Taping specification updated
- Label definition updated
www.yageo.com
Dec. 4, 2014 V.18