DATA SHEET

DATA SHEET
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
01005
NP0/X5R/X7R
4 V TO 16 V
10 pF to 100 nF
Product Specification – June 29, 2015 V.6
RoHS compliant & Halogen Free
Product specification
Surface-Mount Ceramic Multilayer Capacitors
SCOPE
This specification describes
01005 NP0/X5R series chip
capacitors with lead-free
terminations.
01005
NP0/X5R
2
11
6.3V to 16V
ORDERING INFORMATION - GLOBAL PART NUMBER, PHYCOMP CTC &
12NC
All part numbers are identified by the series, size, tolerance, TC material,
packing style, voltage, process code, termination and capacitance value.
YAGEO BRAND ordering code
APPLICATIONS
Mobile
Module
FEATURES
Supplied in tape on reel
Nickel-barrier end termination
RoHS compliant
Halogen Free compliant
GLOBAL PART NUMBER (PREFERRED )
CC
XXXX X X XXX X
(1)
(2) (3)
(4) (5)
B
X XXX
(6) (7)
(1) SIZE – INCH BASED (METRIC)
0100(0402)
(2) TOLERANCE
J = ±5%
K = ±10%
M = ±20%
(3) PACKING STYLE
R = Paper/PE taping reel; Reel 7 inch
(4) TC MATERIAL
NP0
X5R
X7R
(5) RATED VOLTAGE
2= 4 V
5 = 6.3 V
6 = 10 V
7 = 16 V
(6) PROCESS
N = NP0
B = Class 2 MLCC
(7) CAPACITANCE VALUE
2 significant digits+number of zeros
The 3rd digit signifies the multiplying factor, and letter R is decimal point
Example: 121 = 12 x 101 = 120 pF
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
CONSTRUCTION
The capacitor consists of a
rectangular block of ceramic
dielectric in which a number of
interleaved metal electrodes are
contained. This structure gives
rise to a high capacitance per
unit volume.
The inner electrodes are
connected to the two end
terminations and finally covered
with a layer of plated tin (NiSn).
The terminations are lead-free. A
cross section of the structure is
shown in Fig.1.
01005
NP0/X5R
6.3V to 16V
3
11
terminations
electrodes
MLB457
ceramic material
Fig. 1 Surface mounted multilayer ceramic capacitor construction
DIMENSION
Table 1 For outlines see fig. 2
TYPE
L1 (mm)
W (mm)
01005
0.4 ±0.02
0.2 ±0.02
OUTLINES
T (mm)
0.2 ±0.02
L2 / L3 (mm)
L4 (mm)
min.
max.
min.
0.07
0.14
0.13
For dimension see Table 1
Fig. 2 Surface mounted multilayer
ceramic capacitor dimension
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
01005
NP0/X5R
6.3V to 16V
4
11
CAPACITANCE RANGE & THICKNESS
Table 2 01005 Sizes
NP0
X5R
10V / 16 V
4V
6.3V
6.3V / 10V
0.2±0.02
0.2±0.02
0.2±0.02
150 pF
0.2±0.02
0.2±0.02
0.2±0.02
220 pF
0.2±0.02
0.2±0.02
0.2±0.02
330 pF
0.2±0.02
0.2±0.02
0.2±0.02
470 pF
0.2±0.02
0.2±0.02
0.2±0.02
680 pF
0.2±0.02
0.2±0.02
0.2±0.02
1 000 pF
0.2±0.02
0.2±0.02
0.2±0.02
2.2 nF
0.2±0.02
0.2±0.02
4.7 nF
0.2±0.02
0.2±0.02
10 nF
0.2±0.02
0.2±0.02
22nF
0.2±0.02
0.2±0.02
47 nF
0.2±0.02
0.2±0.02
100 nF
0.2±0.02
0.2±0.02
220 nF
0.2±0.02
CAP.
10 pF
0.2±0.02
12 pF
0.2±0.02
15 pF
0.2±0.02
18 pF
0.2±0.02
22 pF
0.2±0.02
27 pF
0.2±0.02
33 pF
0.2±0.02
39 pF
0.2±0.02
47 pF
0.2±0.02
56 pF
0.2±0.02
68 pF
0.2±0.02
82 pF
0.2±0.02
100 pF
0.2±0.02
Tape width
X7R
8 mm
THICKNESS CLASSES AND PACKING QUANTITY
Table 3
Ø 180 MM / 7 INCH
Ø 330 MM / 13 INCH
SIZE
CODE
THICKNESS
CLASSIFICATION
TAPE WIDTH
QUANTITY PER REEL
Paper/PE
Blister
Paper/
Blister
QUANTITY
PER BULK CASE
01005
0.2 ±0.02 mm
8 mm
20,000
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
01005
NP0/X5R
5
11
6.3V to 16V
ELECTRICAL CHARACTERISTICS
NP0/X5R DIELECTRIC CAPACITORS; NISN TERMINATIONS
Unless otherwise specified, all test and measurements shall be made under standard atmospheric conditions
for testing as given in 5.3 of IEC 60068-1:
-
Temperature: 15 °C to 35 °C
Relative humidity: 25% to 75%
Air pressure: 86 kPa to 106 kPa
Before the measurements are made, the capacitor shall be stored at the measuring temperature for a time
sufficient to allow the entire capacitor to reach this temperature.
The period as prescribed for recovery at the end of a test is normally sufficient for this purpose.
Table 4
VALUE
DESCRIPTION
Capacitance range
10 pF to 100 nF
Capacitance tolerance
NP0
C ≥ 10 pF
X5R
±5%, ±10%
±10%, ±20%
Dissipation factor (D.F.)
NP0
C < 30 pF
≤ 1 / ( 400 + 20C )
C ≥ 30 pF
≤ 0.1 %
X5R / X7R
≤ 10 %
Rins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less
X5R / X7R ≥ 1nF:
Insulation resistance after 1 minute at Ur (DC)
Rins × C ≥ 100 Ω ·F
X5R ≥ 10nF:
Rins × C ≥ 50 Ω ·F
Maximum capacitance change as a function of temperature
(temperature characteristic/coefficient):
NP0
±30 ppm/°C
X5R
±15%
Operating temperature range:
NP0
–55 °C to +125 °C
X5R
–55 °C to +85 °C
X7R
–55 °C to +125 °C
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
01005
NP0/X5R
6
11
6.3V to 16V
SOLDERING RECOMMENDATION
Table 5
SOLDERING
METHOD
Reflow
SIZE
01005
Reflow only
Reflow/Wave
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TESTS AND REQUIREMENTS
Table 6
Test procedures and requirements
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Mounting
IEC 60384- 4.3
21/22
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
Inspection and
Dimension
Check
4.4
Any applicable method using × 10 magnification
In accordance with
specification
Capacitance
4.5.1
Class 1:
f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C
Within specified tolerance
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz, measuring at voltage 0.5 Vrms at 20 °C
Dissipation
Factor (D.F.)
4.5.2
Class 1:
f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 Vrms at 20 °C
In accordance with
specification
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz, measuring at voltage 0.5 Vrms at 20 °C
Insulation
Resistance
4.5.3
At Ur (DC) for 1 minute
In accordance with
specification
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
TEST
TEST METHOD
4.6
Temperature
coefficient
NP0/X5R
01005
PROCEDURE
REQUIREMENTS
Capacitance shall be measured by the steps
shown in the following table.
<General purpose series>
Class1:
∆ C/C: ±30ppm
The capacitance change should be measured
after 5 min at each specified temperature stage.
Step
Temperature(℃)
a
25±2
b
Lower temperature±3℃
c
25±2
d
Upper Temperature±2℃
e
25±2
(1) Class I
Temperature Coefficient shall be calculated from
the formula as below
Temp, Coefficient =
C2 - C1
106 [ppm/℃]
C1xΔT
7
11
6.3V to 16V
Class2:
X7R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
<High Capacitance series>
Class2:
X7R/X5R: ∆ C/C: ±15%
Y5V: ∆ C/C: 22~-82%
In case of applying voltage, the capacitance
change should be measured after 1 more min.
with applying
voltage in equilibration of each temp. stage.
CC0100MRX5R5BB104:
0.2V±0.1Vrms
C1: Capacitance at step c
C2: Capacitance at 125℃
∆T: 100℃(=125℃-25℃)
Measuring Voltage: 0.5 to 5 Vrms
(2) Class II
Capacitance Change shall be calculated from the
formula as below
∆C =
C2 - C1
x 100%
C1
C1: Capacitance at step c
C2: Capacitance at step b or d
Adhesion
Bond
Strength of
Plating on
End Face
IEC 6038421/22
4.7
A force applied for 10 seconds to the line joining
the terminations and in a plane parallel to the
substrate
Force
size 01005 : 1N
4.8
Mounting in accordance with IEC 60384-22
paragraph 4.3
No visible damage
Conditions: bending 1 mm at a rate of 1 mm/s,
radius jig 5 mm
∆C/C
Class 1:
NP0: within ±1% or 0.5 pF, whichever is
greater
Class2:
X5R: ±10%
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
TEST
TEST METHOD
4.9
Resistance to
Soldering
Heat
01005
NP0/X5R
8
11
6.3V to 16V
PROCEDURE
REQUIREMENTS
Precondition: 150 +0/–10 °C for 1 hour,
then keep for 24 ±1 hours at room
temperature
Dissolution of the end face plating shall not exceed
25% of the length of the edge concerned
Preheating: 120 °C to 150 °C for 1 minute
and 170 °C to 200 °C for 1 minute.
Solder bath temperature: 260 ±5 °C
Dipping time: 10 ±0.5 seconds
Recovery time: 24 ±2 hours
∆C/C
Class 1:
NP0: within ±0.5% or 0.5 pF, whichever is greater
Class2:
X5R: ±10%
D.F. within initial specified value
Rins within initial specified value
4.10
Solderability
Preheated the temperature of 80 °C to
140 °C and maintained for 30 seconds to
60 seconds.
The solder should cover over 95% of the critical
area of each termination
Test conditions for leadfree containing
solder alloy
Temperature: 245 ±5 °C
Dipping time: 3 ±0.3 seconds
Depth of immersion: 10 mm
Rapid Change
of
Temperature
IEC 6038421/22
4.11
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature
5 cycles with following detail:
30 minutes at lower category temperature
30 minutes at upper category temperature
Recovery time 24 ±2 hours
No visual damage
∆C/C
Class 1:
NP0: within ±1% or 1 pF, whichever is greater
Class2:
X5R: ±15%
D.F. meet initial specified value
Rins meet initial specified value
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
NP0/X5R
01005
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Damp Heat
with Ur
load
1. Preconditioning, class 2 only:
No visual damage after recovery
4.13
150 +0/-10 °C /1 hour, then keep for
24 ±1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Damp heat test:
500 ±12 hours at 40 ±2 °C;
90 to 95% R.H; 1.0 Ur applied.
4. Recovery:
Class 1: 6 to 24 hours
Class 2: 24 ±2 hours
9
11
6.3V to 16V
∆C/C
Class 1:
NP0: within ±2% or 1 pF, whichever is
greater
Class2:
X5R: ±20%
D.F.
Class 1:
NP0: ≤ 2 x specified value
5. Final measure: C, D, IR
Class2:
X5R: ≤ 2 x specified value
P.S. If the capacitance value is less than the
minimum value permitted, then after the other
measurements have been made the capacitor
shall be precondition according to “IEC 60384
4.1” and then the requirement shall be met.
Rins
Class 1:
NP0: ≥ 2,500 MΩ or Rins x Cr ≥ 25s whichever
is less
Class2:
X5R: ≥ 500 MΩ or Rins x Cr ≥ 25s whichever
is less
X5R≥ 1nF
Δ C/C
Class2: X5R: ±25%
D.F.
Class2: X5R: ≤ 2 x specified value
Rins
Rins x Cr ≥ 5 Ω · F
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
NP0/X5R
01005
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Endurance
IEC 6038421/22
1. Preconditioning, class 2 only:
No visual damage
4.14
150 +0/-10 °C /1 hour, then keep for
24 ±1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Endurance test:
Temperature: NP0: 125 °C
Specified stress voltage applied for 1,000
hours:
Applied 2.0 x Ur for general product
Temperature: X5R: 85°C Specified stress
voltage applied for 1,000 hours:
Applied 1.5 x Ur for general product
4. Recovery time: 24 ±2 hours
5. Final measure: C, D, IR
P.S. If the capacitance value is less than the
minimum value permitted, then after the other
measurements have been made the capacitor
shall be precondition according to “IEC 60384
4.1” and then the requirement shall be met.
10
11
6.3V to 16V
∆C/C
Class1:
NP0: within ±2% or 1 pF, whichever is
greater
Class2:
X5R: ±20%
D.F.
Class1:
NP0: ≤ 2 x specified value
Class2:
X5R: ≤ 2x initial value max
Rins
Class1:
NP0: ≥ 4,000 MΩ or
Rins x Cr ≥ 40s whichever is less
Class2:
X5R: ≥ 1,000 MΩ or
Rins x Cr ≥ 50s whichever is less
X5R ≥ 1nF
Δ C/C
Class2: X5R: ±25%
D.F.
Class2: X5R: ≤ 2x initial value max
Rins
Class2: Rins x Cr ≥ 10 Ω · F
Voltage Proof
IEC 60384-1 4.5.4
Specified stress voltage applied for 1 minute
Ur ≤ 100 V: series applied 2.5 Ur
I: 7.5 mA
No breakdown or flashover
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Jun. 29, 2015 V.6
Product specification
Surface-Mount Ceramic Multilayer Capacitors
01005
NP0/X5R
6.3V to 16V
11
11
REVISION HISTORY
REVISION DATE
CHANGE NOTIFICATION
DESCRIPTION
Version 6
Jun. 29, 2015
-Test procedures and requirements
Version 5
Jun. 06, 2013
-Test procedures and requirements
Version 4
Mar. 27, 2013
- Change Tolerance
Version 3
Jan. 15, 2013
- Change Range
Version 2
Oct. 23, 2012
- Change Range
Version 1
July 03, 2012
- Change Range
Version 0
Apr 16, 2012
-
- New
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