EOL PI2126 Series 30 Volt, 12 Amp Full-Function Active ORing Solution Description Features The PI2126 is a complete full-function Active ORing solution with a high-speed ORing MOSFET controller and a very low on-state resistance MOSFET designed for use in 12V Bus redundant power system architectures. The PI2126 Cool-ORing solution is offered in an extremely small, thermally enhanced 5mm x 7mm LGA package and can be used in high side Active ORing applications. The PI2126 enables extremely low power loss with fast dynamic response to fault conditions, critical for high availability systems. Integrated High Performance 12A, 4.5mΩ MOSFET Very small, high density fully-optimized solution with simple PCB layout Fast dynamic response to power source failures, with 90ns reverse current turn-off delay time Accurate sensing capability to indicate system fault conditions (-6mV reverse threshold) Internal charge pump Fault Status output Applications The PI2126, with its 4.5mΩ internal MOSFET provides very high efficiency and low power loss during steady state operation. The PI2126 monitors the current direction in the MOSFET and will respond very fast to a reverse current due to input power source fault condition to prevent undesired high current build-up in the system. The PI2126 provides an active low fault flag output to the system during reverse current, excessive forward over-current and UVLO fault conditions. N+1 Redundant Power Systems Servers & High End Computing Telecom Systems High-side Active ORing Package Information The PI2126 is offered in the following package: 25-pin 5mm x 7mm thermally enhanced LGA package, achieving <11°C/W RθJ-PCB Typical Application: Vin1 S SP VR PI2126 SN Applied Input Short FT PG VC D FT Normal operation 0A Input Current S SP PG VC PI2126 V(D) Redundant Bus FT FT V(S) (Input) Reverse detection MOSFET Turn Off Time 0V Figure 1: PI2126 High Side Active ORing Picor Corporation • picorpower.com MOSFET Miller Effect VR D SN LOAD Vin2 Reverse Current 90ns Figure 2: PI2126 response time to an input short fault condition PI2126 Rev 1.1 Page 1 of 15 EOL Pin Description Pin Name D S Pin Number Description 1, 15, 16 17, 22, 23, 24, 25 Drain: The Drain of the internal N-channel MOSFET. Connect this pin to the output load. 2, 3, 4, 5, 18, 19, 20, 21 Source: The source of the internal N-channel MOSFET. Connect this pin to the input power source bus voltage. SP 6 Positive Sense Input & Clamp: Connect SP pin to the trace between S pin and the input source (outside of the PI2126 foot print). The polarity of the voltage difference between SP and SN provides an indication of current direction through the MOSFET. VR 7 Controller Input Supply With Limiting Resistor: This pin is connected internally to VC through a 420Ω resistor added for Bus voltages greater than 10V and less than 14V. VC 8 Controller Input Supply: This pin is the supply pin for the control circuitry and gate driver. Voltage on this pin is regulated to 11.7V with respect to PG pin by an internal shunt regulator. NC 9, 12 Not Connected: Leave these pins unconnected. PG 10, 11 Control Circuitry Return: These pins are ground return for the gate driver and control circuitry. In 12V applications connect these pins to ground. 13 Fault Status Output: This open collector pin pulls low after a delay when a reverse fault or a forward fault occurs. When the input voltage to the control circuitry is in under voltage, VVC-PG < 7V this pin pulls low. When VVC-PG > 7.15V and 6mV < SP-SN < 275mV this pin clears (High). Leave this pin unconnected if unused. 14 Negative Sense Input: Connect SN pin to the trace between D pin and the output load (outside of the PI2126 foot print). The polarity of the voltage difference between SP and SN provides an indication of current direction through the MOSFET. SN Package Pin-Out S 2 S 3 S 4 D 1 18 S D 22 19 S D 23 20 S D 24 21 S D 25 17 D 16 D S 5 15 D SP 6 PI2126 VR 7 8 VC 9 NC 10 PG 11 PG 14 SN 13 FT 12 NC 25-pin LGA (5mm x 7mm) Top view Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 2 of 15 EOL Absolute Maximum Ratings Note: All voltage nodes are referenced to PG Drain-to-Source Voltage (VDS) 30V @ 25°C Source Current (Is) Continuous Source Current (Is) Pulsed (10μs) 12A (1) 60A Single Pulse Avalanche Current (TAV<40μs) (1) 60A -0.3V to 17.3V / 10mA Source (S), SP, SN -0.3V to 40V / 4mA Thermal Resistance RθJA(3) 46C/W Thermal Resistance RθJ-PCB(3) 11C/W Storage Temperature -65°C to 150°C Operating Junction Temperature -40°C to 140°C Soldering Temperature for 20 seconds 260°C ESD Rating 2kV HBM Electrical Specifications Unless otherwise specified: -40C < TJ < 125C, VS =VC=10.5V, Parameter Symbol Min VVC-PG 8.5 Typ Max Units Conditions 10.5 V 1.5 2.0 mA 11.7 12.5 V IS=3mA 10 Delta IS=10mA Control Circuit Supply (VC to PG) Operating Supply Range Quiescent Current Clamp Voltage Clamp Shunt Resistance IVC VVC-CLM 11 RVC Under-Voltage Rising Threshold VVCUVR 6.1 7.15 8.5 V Under-Voltage Falling Threshold VVCUVF 6 7.00 7.9 V Under-Voltage Hysteresis VVCUV-HS 100 150 200 mV VR Supply (VR pin connected to Vin, Figure 1) Operating Supply Range VVR-PG 10 14 V 10 mA 550 Ω Quiescent Current Bias Resistor Picor Corporation • picorpower.com IVR RBias 300 420 PI2126 No VC limiting Resistor Normal operation, no fault Biased From VR pin VR = 14V Rev 1.1 Page 3 of 15 EOL Electrical Specifications Unless otherwise specified: -40C < TJ < 125C, VS=VC=10.5V, Parameter Symbol Max Units -3 3 V VSP-SN -80 400 mV SP-SN SP Input Bias Current ISP 35 55 75 μA VSP = VSN = VS SN Input Bias Current ISN 35 55 75 μA VSP = VSN = VS SN Current Reverse Comparator Threshold Reverse Comparator Hysteresis MOSFET Turn On Threshold Reverse Fault to MOSFETs Turn-off Time Forward Comparator Threshold Forward Comparator Hysteresis Internal N-Channel MOSFET ISN -11 10 +1 0.2 -6 12 +6 0.5 -2 14 +11 mA mV mV mV VSN = 14V, VSP = VS =VD=0V VSN = 10.5V @ 25°C VSP-PG = 10.5V @ 25°C VSN = 10.5V @ 25°C 90 150 ns VSP-SN = ± 50mV step 275 25 300 35 mV mV DIFFERENTIAL AMPLIFIER AND COMPARATORS Common Mode Input Voltage VCM Differential Operating Input Voltage (1) VRVS-TH VRVS-HY VFET-ON Min tRVS VFWD-TH VFWD-HY 250 15 Drain-to-Source Breakdown Voltage BVDSS 30 Source Current Continuous Drain-to-Source On Resistance Body Diode Forward Voltage Fault: Output Low Voltage Output High Leakage Current IS RDS(on) Vf-BD Delay time Typ V 4.5 0.75 12 6 1.0 0.2 0.5 V μA 8 16 μs -1 4 A m V Conditions SP to S and SN to S VS=VPG =VSP=0V, ID=2mA , Tj=25°C; VSN=10.5V In ON state, Tj=25°C In ON state, IS=10A, Tj=25°C, In OFF state, IS=4A, Tj=25°C IGST=1.5mA, VC>4.5V VSP-SN = ± 50mV step to 90% of max, Note 1: These parameters are not production tested but are guaranteed by design, characterization, and correlation with statistical process control. Note 2: Current sourced by a pin is reported with a negative sign. Note 3: Thermal resistance characterized on PI2126-EVAL1 evaluation board with 0LFM airflow. Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 4 of 15 EOL Functional Description: The PI2126 integrated Cool-ORing product takes advantage of two different technologies combining a 4.5m on-state resistance (RDS(on)) N-channel MOSFET with high density control circuitry. This combination provides superior density, minimizing PCB space to achieve an ideal ORing diode function, significantly reducing power dissipation and eliminating the need for heat sinking, while minimizing design complexity. Figure 3: Reverse comparator hysteresis, the hysteresis voltage is SP-SN Forward Voltage Comparator: FWD The PI2126’s 4.5mΩ on-state resistance MOSFET used in the conduction path enables a dramatic reduction in power dissipation versus the performance of a diode used in conventional ORing applications due to its high forward voltage drop. The FWD comparator detects when a forward voltage condition exists and SP is above 275mV (typical) positive with respect to SN. When SP-SN is more than 275mV, the FWD comparator will assert the Fault ( ) low to report a fault condition. Due to the inherent characteristics of the MOSFET, while the gate remains enhanced above the gate threshold voltage it will allow current to flow in the forward and reverse directions. Ideal ORing applications do not allow for reverse current flow, so the controller has to be capable of very fast and accurate detection of reverse current caused by input power source failures, and turn off the gate of the MOSFET as quickly as possible. Once the gate voltage falls below the gate threshold, the MOSFET is off and the body diode will be reverse biased preventing reverse current flow and subsequent excessive voltage droop on the redundant bus. VC and Internal Voltage Regulator: The PI2126 has a separate input VC that provides power to the control circuitry. An internal regulator clamps the VC voltage with respect to PG pin (VVC-PG) to 11.7V typical. The internal regulator circuit has a comparator to monitor VC voltage and pulls the MOSFET Gate low when VC is lower than the VC Under-Voltage Threshold. The VR input pin can be connected to the input voltage eliminating the need for an external limiter in 12V Bus applications (10V to 14V). An internal 420Ω resistor is connected between the VR pin and the internal regulator VC pin. Differential Amplifier: The PI2126 integrates a high-speed low offset voltage differential amplifier to sense the difference between the Sense Positive (SP) pin voltage and Sense Negative (SN) pin voltage with high accuracy. The amplifier output is connected to the Reverse and Forward comparators. Fault Indication: The pin is an open collector NPN that will be pulled low under the following fault conditions. Reverse Current Comparator: RVS The reverse current comparator provides the critical function in the controller, detecting negative voltage caused by reverse current. When the SN pin is 6mV higher than the SP pin, the reverse comparator will force the gate discharge circuit to turn off the MOSFET in typically 90ns and assert the Fault ( ) low with a typical delay of 8μs to report a fault condition. The reverse comparator will hold the gate low until the SP pin is 6mV higher than the SN pin. Reverse comparator hysteresis is shown in Figure 3. Picor Corporation • picorpower.com Typical Condition Indication of possible faults 1 Reverse: VSP-VSN ≤ -6mV Input supply shorted (MOSFET turned OFF) 2 Forward: VSP-VSN ≥ +275mV Open FET, Gate short or open, High current (MOSFET turned ON) 3 Forward VSP-VSN ≤ +6mV Shorted FET on power-up (MOSFET turned OFF) 4 UVLO 4.5V < PI2126 VVC-PG <7.15V Rev 1.1 Controller not ready (MOSFET turned OFF) Page 5 of 15 EOL S 5 4 3 2 VC VC VR SP 8 18 + 7 7.15V 420Ω + SN 14 11.7V 20 2X Charge Pump Differential Amplifier 6 19 EN - + RVS - +6mV Hys= -12mV 0.1μF +275mV Hys= -25mV 21 GATE RVS - Gate Driver + FWD FWD - S 22 FT 23 24 D 24 10 11 13 15 16 17 1 PG PG FT D Figure 4: PI2126 Internal Block Diagram SP-SN < +6mV 7. 0V VS-PG < 7.15V VS-PG >7.15V VS-PG>4.5V MOSFET OFF FT : Low Turn Off MOSFET & Pull FT Low SPG < V Reverse Cleared SP-SN > +6mV MOSFET OFF FT : Low SP-SN > -6mV <7 G -P R V m n -6 tio < di N on C -S se SP er ev VS .0V FT : High FT : High Turn MOSFET ON & Hold it in RDS(on) Fault Recovery FT : Low Fault Condition SP-SN >275mV: Open FET, Gate short or open, High Current Figure 5: PI2126 State Diagram. Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 6 of 15 EOL Iin_1 Vin_1 S ORing_1 D V_Load Vin_2 Iin_2 S ORing_2 D Load OR1 VC >7.15V Vin Vin_1 OR1VC >4.5V Vin_2 >Vin_1 Vin_2 Vin1 Shorted Vin_2 Delayed Iin Vin2 >Vin1 Iin_1 Iin_2 FET turn on delay Reverse Current FET in Rds_ON V_Load FET body diode conducting VSP-VSN≥275mV FT_1 VSP-VSN<-6mV -6mV<VSP-VSN<275mV VSP-VSN<-6mV VSP-VSN>+6mV FT_2 VSP-VSN<+6mV -6mV<VSP-VSN<275mV Figure 6: PI2126 Timing Diagram Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 7 of 15 EOL Typical Characteristics: 1.2 ID=2mA VVC-SGND=10.5V 1.1 1.50 Normaized: BVDSS VC Quiescent Current [mA] 1.55 1.45 1.0 0.9 0.8 1.40 -50 -25 0 25 50 75 -50 100 125 150 -25 1.6 VVC-SGND=10.5V 75 100 125 150 IS=10A 1.5 -4.00 1.4 -5.00 Normaized: RDS(on) Reverse Comparator Threshold [mV] 50 Figure 8: Drain-to-Source Breakdown Voltage (BVDSS ) vs. temperature -3.00 -6.00 -7.00 -8.00 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -9.00 -50 -25 0 25 50 75 -50 100 125 150 Figure 9: Reverse Comparator Threshold (VRVS-TH) vs. temperature 95 -25 0 25 50 75 100 125 150 Junction Temperature [°C] Junction Temperature [°C] Figure 10: Drain-to-Source On Resistance (RDS(on)) vs. temperature. 100 VSP-SN =+50mV to -50mV step IS=4A 94 93 IS: Source Current [A] Reverse Fault to response Time [ns] 25 Junction Temperature [°C] Junction Temperature [°C] Figure 7: Controller quiescent current (IVC:) vs. temperature. 0 92 91 90 89 88 87 TJ=150°C TJ=25°C 10 1 -50 -25 0 25 50 75 100 125 150 0.2 Picor Corporation • picorpower.com 0.6 0.8 1.0 1.2 Vf-BD: Body Diode Forward Voltage [V] Junction Temperature [°C] Figure 11: Reverse Fault to MOSFETs Turn-off Time (tRVS) vs. temperature. 0.4 Figure 12: Body Diode Forward Voltage (Vf-BD) vs. temperature. PI2126 Rev 1.1 Page 8 of 15 EOL Thermal Characteristics: 150 150 Air Flow = 0LFM Junction Temperature [°C] Junction Temperature [°C] RDS(on)=6.0mΩ @ 25°C 130 RθJA = 46°C/W 120 110 TA = 100°C 100 90 80 70 Air Flow = 200LFM 140 140 TA = 90°C TA = 80°C TA = 70°C TA = 60°C 60 0 1 2 3 4 5 6 7 8 9 10 11 RθJA = 33°C/W 120 110 100 90 80 70 TA = 100°C TA = 90°C TA = 80°C TA = 70°C 60 TA = 60°C TA = 50°C 50 0 1 2 TA = 50°C 50 RDS(on)=6.0mΩ @ 25°C 130 12 3 4 Input Current [A] 5 6 7 8 9 10 11 12 Input Current [A] Figure 13: Junction Temperature vs. Input Current (0LFM) Figure 14: Junction Temperature vs. Input Current (200LFM) 13 200LFM, RDS(on)=4.5mΩ Input Current [A] 12 0L 11 0L F FM ,R DS 10 M 20 0L F ,R DS (o n ) =6 M ,R DS (on .0m Ω ) =4 (o n) = .5m Ω 6 .0 m Ω 9 RθJA = 46°C/W at 0LFM RθJA = 33°C/W at 200LFM 8 7 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 Ambient Temperature [°C ] Figure 15: PI2126 input current de-rating based on maximum TJ=150°C vs. ambient temperature MOSFET PI2126 Figure 16: Thermal image of PI2126 mounted on PI2126-EVAL1Thermal Image picture, Iout=12A, TA=25°C, Air Flow=0LFM Note that the MOSFET RDS(on) of PI2126 under test is 4.1mΩ at TA=25°C Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 9 of 15 EOL Application Information The PI2126 is designed to replace high side ORing diodes in high current low voltage bus redundant power architectures. Replacing a traditional diode with a PI2126 will result in significant power dissipation reduction as well as board space reduction, efficiency improvement and additional protection features. RPG selection for input voltage greater than 14V: Select the resistor (RPG) value at the minimum input voltage to avoid a voltage drop that may reduce VVC-PG lower than VC under voltage lockout. Select the value of RPG using the following equations: This section describes in detail the procedure to follow when designing with the PI2126 Active ORing solution. And RPG maximum power dissipation is: Control Circuitry Bias: The PI2126 control circuitry and the gate driver for the internal MOSFET are biased through the VC pin or VR pin. An internal regulator clamps the VC voltage (VVC-PG) to 11.7V typically. An internal bypass ceramic capacitor (0.1μF) is connected between VC and PG to hold VVC-PG steady. Where: Vin1 S SP VR PG VC D1 Maximum applied input voltage : Controller maximum clamp voltage, 12.5V : Controller maximum bias current, use 2.0mA : 0.1mA is added for margin RPG calculation example Vin (minimum) = 11V and Vin (maximum) = 18V power dissipation. SN FT : Select a lower typical resistor value (1KΩ) and calculate its D PI2126 Minimum applied input voltage : Controller maximum Under-Voltage Rising Threshold, 8.5V In 12V system applications, where the input voltage (Vin) is between 10V and 14V, connect the VR pin to Vin and connect PG to the Vin return, Figure 1. A 420Ω internal resistor (RBias) is connected between the VR pin and the VC pin. In high voltage applications above 14V, PG pin has to float above ground and VC pin will be connected directly to Vin. As shown in Figure 17, VR pin is disconnected and PG pin float on a bias resistor (RPG). A low current low forward voltage drop Schottky diode is required for the PI2126 when PI2126 is configured floating on PG. Connect one terminal of RPG to the PG pin and the other end of RPG to ground (Vin return). Connect the Schottky diode anode to the PG pin and connect its cathode to the VC pin. : FT PMEG3005AEA RPG S SP VR D PI2126 PG VC D1 Internal N-Channel MOSFET BVDSS: SN FT FT PMEG3005AEA RPG Figure 17: PI2126 in application above 14V Recommended Schottky Diode: PMEG3005AEA: from NXP or equivalent Picor Corporation • picorpower.com LOAD Vin2 The PI2126’s internal N-Channel MOSFET breakdown voltage (BVDSS) is rated for 30V at 25°C and will degrade to 28V at -40°C, refer to Figure 8. Drain to source voltage should not exceed BVDSS in nominal operation. During a fast switching transient the MOSFET can tolerate voltages higher than its BVDSS rating under avalanche conditions, refer to the Absolute Maximum Ratings table. In Active ORing applications when one of the input power sources is shorted, a large reverse current is sourced from PI2126 Rev 1.1 Page 10 of 15 EOL the load through the MOSFET. Depending on the output impedance of the system and the parasitic inductance, the reverse current in the MOSFET may exceed the source pulsed current rating (60A) before the PI2126 MOSFET is turned off. Where: The peak current during an input short condition is calculated as follows, assuming that the output has very low impedance and it is not a limiting factor: In Active ORing circuits the MOSFET is always on in steady state operation and the power dissipation is derived from the total source current and the on-state resistance of the MOSFET. : : : The PI2126 internal MOSFET power dissipation can be calculated with the following equation: Peak current in PI2126 MOSFET before it is turned off. Where: : MOSFET power dissipation Input voltage or load voltage at S pin before input short condition did occur. : MOSFET breakdown voltage (30V) Power dissipation: Where: : Avalanche energy : Source Current Reverse fault to MOSFET turn-off time. : : Circuit parasitic inductance Note: For the worst case condition, calculate with maximum rated RDS(on) at the MOSFET maximum operating junction temperature because RDS(on) value is directly proportional to temperature. Refer to Figure 10 for normalized RDS(on) values over temperature. The PI2126 maximum RDS(on) at 25°C is 6mΩ and will increase by 40% at 125°C junction temperature. The high peak current during an input short stores energy in the circuit parasitic inductance, and as soon as the MOSFET turns off, the stored energy will be released and this will produce a high negative voltage and ringing at the MOSFET source. At the same time the energy stored at the drain side of the internal MOSFET will be released and produce a voltage higher than the load voltage. This event will create a high voltage difference between the drain and source of the MOSFET. The MOSFET may avalanche, but this avalanche will not affect the MOSFET performance because the PI2126 has a fast response time to the input fault condition and the stored energy will be well below the MOSFET avalanche capability. The Junction Temperature rise is a function of power dissipation and thermal resistance. Where: : Junction-to-Ambient thermal resistance, 46°C/W This may require iteration to get to the final junction temperature. Figure 13 and Figure 14 show the PI2126 internal MOSFET final junction temperature curves versus conducted current at maximum RDS(on), given ambient temperatures and air flow. MOSFET avalanche during input short is calculated as follows: Picor Corporation • picorpower.com MOSFET on-state resistance PI2126 Rev 1.1 Page 11 of 15 EOL Typical application Example: Requirement: (Junction Temperature). The Junction Temperature at maximum load current (10A) and 60°C ambient is 95°C. Redundant Bus Voltage = 12V (±10%, 10.8V to 13.2V) Load Current = 10A (assume through each redundant path) 150 Maximum Ambient Temperature = 60°C 140 Solution: 130 Junction Temperature [°C] Air Flow = 0LFM A single PI2126 for each redundant 12V power source should be used, configured as shown in the circuit schematic in Figure 18. PG pin is connected to ground and VR pin is connected to Vin, U1 Vin1 2-5 & 18-21 6 S D SP VR 8 VC PI2126 PG 7 1,15-17 & 22-25 SN 14 FT 13 FT 10, 11 U2 S SP 7 VR 8 VC D PI2126 PG 6 SN 14 FT RθJA = 46°C/W 120 110 TA = 100°C 100 95 TA = 90°C 90 TA = 80°C 80 TA = 70°C 70 TA = 60°C 60 TA = 50°C 50 0 1 2 3 4 13 FT 5 6 7 8 9 10 11 12 Input Current [A] 1,15-17 & 22-25 Figure 19: Example 1 final junction temperature at 10A/60°C LOAD Vin2 2-5 & 18-21 RDS(on)=6.0mΩ @ 25°C RDS(on) is 6mΩ maximum at 25°C and will increase as the Junction temperature increases. From Figure 10, at 95°C RDS(on) will increase by 26%, then 10, 11 Figure 18: PI2126 in 12V redundant bus voltage application maximum at 95°C The fault pin ( ) can be pulled to the system logic level voltage via a resistor (10kΩ), or it can be connected to the input voltage (Vin) via a 25kΩ resistor. Maximum power dissipation is: Recalculate TJ: Power Dissipation and Junction Temperature: First use Figure 13 (Junction Temperature vs. Input Current) to find the final junction temperature for 10A load current at 60°C ambient temperature. In Figure 13 (illustrated in Figure 19) draw a vertical line from 10A to intersect the 60°C ambient temperature line. At the intersection draw a horizontal line towards the Y-axis Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 12 of 15 EOL Layout Recommendation: Use the following general guidelines when designing printed circuit boards. An example of the typical land pattern for the PI2126 is shown in Figure 20: Connect all S pads together with a wide trace to reduce trace parasitics to accommodate the high current input, and also connect all D pads together with a wide trace to accommodate the high current output. Connect the SP pin to the S pins and connect the SN pin to D pins outside the SiP as shown in Figure 20. Use 1oz copper or thicker if possible to reduce trace resistance and power dissipation. PI2126 S S S S S S S S Vin D D D D D D D D SP VR Vout SN PG PG Make sure to have a solid ground (return) plane to reduce circuit parasitic inductance. VC C6 typically is not required, but if addition bypassing is preferred, Figure 20 shows the appropriate layout for an extra VC capacitor. FT CVC Figure 20: Layout recommendation Figure 21: PI2126 Mounted on PI2126-EVAL1 Please visit http://vicorpower.com/picorpower/ for information on PI2122-EVAL1 Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 13 of 15 EOL Package Drawings: Ordering Information: Part Number Package Transport Media PI2126-00-LGIZ 5mm x 7mm 25-pin LGA TRAY Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 14 of 15 EOL Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR LIMITED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Vicor Corporation 25 Frontage Road Andover, MA 01810 USA Picor Corporation 51 Industrial Drive North Smithfield, RI 02896 USA Customer Service: [email protected] Technical Support: [email protected] Tel: 800-735-6200 Fax: 978-475-6715 Picor Corporation • picorpower.com PI2126 Rev 1.1 Page 15 of 15