TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide Introduction Technical Note Transitioning DDR3 8Gb DDP 2CS to 8Gb SDP 1CS Introduction This technical note explains how to transition a dual-rank 8Gb 2CS (dual die) MT41K512M16 DDP device to a single-rank 8Gb 1CS (monolithic) MT41K512M16 SDP device without changing density, bandwidth, ball assignments, or trace routing in the PCB design. This document is for custom design purposes only. For complete specifications, see the product data sheet. PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide 8Gb 2CS DDP Block Diagram and Ball Assignments 8Gb 2CS DDP Block Diagram and Ball Assignments Figure 1: Functional Block Diagram for DDP (64 Meg x 16 x 8 Banks x 2 Ranks) Rank 1 (32 Meg x 16 x 8 banks) Rank 0 (32 Meg x 16 x 8 banks) CS1# RAS# CKE1 CAS# ODT1 WE# CK CK# CS0# CKE0 A[14:0], BA[2:0] ZQ1 ODT0 ZQ0 DQS, DQS# DQ[15:0] DM/TDQS TDQS# PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide 8Gb 2CS DDP Block Diagram and Ball Assignments Figure 2: DDP Ball Assignments – 96-Ball FBGA – x16 (Top View) Note: PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 1. Dark balls with rings designate balls that differ from the SDP version. Pin M7 (RFU) must be NC (no connection) on the DDP layout for transition to SDP as the A15 pin. 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide Ball Assignment Changes Ball Assignment Changes To transition from DDP to SDP, follow the pin changes outlined in Table 1. Table 1: Ball Assignment Changes Ball Number DDP SDP Notes J9 CKE1 NC 1 J1 ODT1 NC 1 L1 CS1# NC 1 L9 ZQ1 NC 1 M7 RFU A15 2 K9 CKE0 CKE 3 K1 ODT0 ODT 3 L2 CS0# CS# 3 L8 ZQ0 ZQ 3 Notes: 1. NC = no connection. 2. New connection. 3. Same connection. For NC, the ball has no connection to the device or to other balls within the SDRAM package. It is recommended that the remaining PCB traces connected to the SDP NC balls be driven to V SS or V DD via a system firmware change. After completing the transitions in Table 1, verify all connections, values, and system signal integrity simulations following the design guidance for DDR 3 signal integrity outlined in TN-41-13: DDR 3 Point-to-Point Design Support. A system firmware change to adjust the controller and DRAM DQ/DQS drive strength may be required depending on system signal integrity simulation results. PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide 8Gb 1CS SDP Block Diagram and Ball Assignments 8Gb 1CS SDP Block Diagram and Ball Assignments Figure 3: Functional Block Diagram for SDP (64 Meg x 16 x 8 Banks) (64 Meg x 16 x 8 banks) RAS# CAS# WE# CK CK# CS# CKE A[15:0], BA[2:0] ODT ZQ DQS, DQS# DQ[15:0] DM/TDQS TDQS# PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide 8Gb 1CS SDP Block Diagram and Ball Assignments Figure 4: SDP Ball Assignments – 96-Ball FBGA – x16 (Top View) 1 2 3 VDDQ DQ13 VSSQ 4 5 6 7 8 9 DQ15 DQ12 VDDQ VSS VDD VSS UDQS# DQ14 VSSQ VDDQ DQ11 DQ9 UDQS DQ10 VDDQ VSSQ VDDQ UDM DQ8 VSSQ VDD VSS VSSQ DQ0 LDM VSSQ VDDQ VDDQ DQ2 LDQS DQ1 DQ3 VSSQ VSSQ DQ6 LDQS# VDD VSS VSSQ VREFDQ VDDQ DQ4 DQ7 DQ5 VDDQ NC VSS RAS# CK VSS NC ODT0 VDD CAS# CK# VDD CKE NC CS WE# A10/AP ZQ NC VSS BA0 BA2 A15 VREFCA VSS VDD A3 A0 A12/BC# BA1 VDD VSS A5 A2 A1 A4 VSS VDD A7 A9 A11 A6 VDD VSS RESET# A13 A14 A8 VSS A B C D E F G H J K L M N P R T Note: PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 1. Dark balls with rings designate balls that differ from the DDP version. Balls marked with a star indicate a change from the DDP version. 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. TN-41-16: DDR3 MT41K512M16 DDP to SDP Transition Guide Revision History Revision History Rev. A – 02/14 • Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef857b1683 tn-41-16_ddr3_ddp_to_sdp.pdf - Rev. A 2/14 EN 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved.