TN-42-02: DDP to SDP LPDDR2 Introduction Technical Note LPDDR2 Dual Die Package to Single Die Package Migration Introduction This technical note provides information to enable migration of a Micron 1Gb LPDDR2 product from a dual-die package to a single-die package. Changes to density, bandwidth, or trace routing in the PCB design are unnecessary. For complete specifications, see the respective product data sheet. This technical note does not include memory controller firmware changes required to move from dual die to single die. Customers are advised to re-simulate the system for SI confirmation. The LPDDR2 Product Details table shows dual-die and single-die part numbers and essential differences between the DDP and SDP devices. Table 1: LPDDR2 Device Details Device Architecture MT42H16M32D2 (DDP) MT42H32M32D1 (SDP, Monolithic) Density per package 1Gb 1Gb Die per package 2 1 Ranks (CS_n) per channel 1 1 Channels per die 1 1 PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications. All information discussed herein is provided on an "as is" basis, without warranties of any kind. TN-42-02: DDP to SDP LPDDR2 Address Changes Address Changes Timing related changes necessary to transition from DDP to SDP are shown in the Address Changes table here. Table 2: Address Changes – All Configurations Parameter Configuration Die Row address DDP SDP 4 Meg x 32 x 4 banks x 1ch 4 Meg x 32 x 8 banks x 1ch 2 1 8K (A[12:0]) 8K (A[12:0]) Bank address 4 (BA[1:0]) 8 (BA[2:0]) Column address 1K (A[9:0]) 512 (A[8:0]) 2KB 2KB Page size Ball Connection Changes After completing the following ball connection changes, verify all connections, values, and system signal integrity simulations. Information to help verify these design changes and confirm signal integrity is in technical note TN-52-02: Point-to-Point System Design: Layout and Routing Tips for LPDDR2 and LPDDR3 Devices. A system firmware change to adjust the controller and DRAM DQ/DQS drive strength may be required depending on system signal integrity simulation results. Table 3: Ball Connection Changes Note applies to entire table. Ball Number C3 Note: PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN DDP SDP ZQ1 NC 1. NC = No connection, either to the SDP device or to other balls within the SDRAM package. It is recommended that remaining PCB traces connected to the NC balls be driven to VSS or VDD via a system firmware change. 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. TN-42-02: DDP to SDP LPDDR2 Block Diagram – DDP Block Diagram – DDP Figure 1: Functional Block Diagram for DDP – 4 Meg x 32 x 4 Banks x 1 Channel (2 Die) VDD1 VDD2 VDDCA VDDQ VSS VREFCA VREFDQ DM[3:2] DM[1:0] RZQ0 ZQ0 CS# CKE CK CK# LPDDR2 Die 0 LPDDR2 Die 1 CA[9:0] RZQ1 ZQ1 DQ[31:16], DQS[3:2] DQ[15:0], DQS[1:0] PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. TN-42-02: DDP to SDP LPDDR2 Block Diagram – SDP Block Diagram – SDP Figure 2: Functional Block Diagram for SDP – 4 Meg x 32 x 8 Banks x 1 Channel VDD1 VDD2 VDDQ VDDCA VSS VREFCA VREFDQ ZQ CS0# RZQ CKE0 CK CK# DM LPDDR2 Die 0 CA[9:0] DQ, DQS PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. TN-42-02: DDP to SDP LPDDR2 Ballout – DDP Ballout – DDP Figure 3: DDP Ball Assignments – 134-Ball FBGA (x32 Top View) 3 6 1 2 A DNU DNU B DNU NC NC VDD2 VDD1 DQ31 C VDD1 VSS ZQ1 VSS VSSQ D VSS VDD2 ZQ0 VDDQ E VSSCA CA9 CA8 F VDDCA CA6 G VDD2 H 9 10 DNU DNU A DQ29 DQ26 DNU B VDDQ DQ25 VSSQ VDDQ C DQ30 DQ27 DQS3 DQS3# VSSQ D DQ28 DQ24 DM3 DQ15 VDDQ VSSQ E CA7 VSSQ DQ11 DQ13 DQ14 DQ12 VDDQ F CA5 VREFCA DQS1# DQS1 DQ10 DQ9 DQ8 VSSQ G VDDCA VSS CK# DM1 VDDQ J VSSCA NC CK VSSQ VDDQ K CKE NC NC DM0 VDDQ L CS# NC NC DQS0# DQS0 DQ5 DQ6 DQ7 VSSQ L M CA4 CA3 CA2 VSSQ DQ4 DQ2 DQ1 DQ3 VDDQ M N VSSCA VDDCA CA1 DQ19 DQ23 DM2 DQ0 VDDQ VSSQ N P VSS VDD2 CA0 VDDQ DQ17 DQ20 DQS2 DQS2# VSSQ P R VDD1 VSS NC VSS VSSQ VDDQ DQ22 VSSQ VDDQ R T DNU NC NC VDD2 VDD1 DQ16 DQ18 DQ21 DNU T U DNU DNU DNU DNU U 1 2 Notes: PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 3 4 4 5 6 5 7 8 H VDD2 VSS VREFDQ J K 7 8 9 10 1. Die pad VSS and VSSQ signals are combined to VSS package balls. 2. See the Ball Connection Changes table for DDP to SDP migration. 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. TN-42-02: DDP to SDP LPDDR2 Ballout – SDP Ballout – SDP Figure 4: SDP Ball Assignments – 134-Ball FBGA (x32 Top View) 1 2 A DNU DNU B DNU NC NC VDD2 VDD1 DQ31 C VDD1 VSS NC VSS VSSQ D VSS VDD2 ZQ0 VDDQ E VSSCA CA9 CA8 F VDDCA CA6 G VDD2 H 3 4 6 5 9 10 DNU DNU A DQ29 DQ26 DNU B VDDQ DQ25 VSSQ VDDQ C DQ30 DQ27 DQS3 DQS3# VSSQ D DQ28 DQ24 DM3 DQ15 VDDQ VSSQ E CA7 VSSQ DQ11 DQ13 DQ14 DQ12 VDDQ F CA5 VREFCA DQS1# DQS1 DQ10 DQ9 DQ8 VSSQ G VDDCA VSS CK# DM1 VDDQ J VSSCA NC CK VSSQ VDDQ K CKE NC NC DM0 VDDQ L CS# NC NC DQS0# DQS0 DQ5 DQ6 DQ7 VSSQ L M CA4 CA3 CA2 VSSQ DQ4 DQ2 DQ1 DQ3 VDDQ M N VSSCA VDDCA CA1 DQ19 DQ23 DM2 DQ0 VDDQ VSSQ N P VSS VDD2 CA0 VDDQ DQ17 DQ20 DQS2 DQS2# VSSQ P R VDD1 VSS NC VSS VSSQ VDDQ DQ22 VSSQ VDDQ R T DNU NC NC VDD2 VDD1 DQ16 DQ18 DQ21 DNU T U DNU DNU DNU DNU U 1 2 Notes: PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 3 4 6 5 7 8 H VDD2 VSS VREFDQ J K 7 8 9 10 1. Die pad VSS and VSSQ signals are combined to VSS package balls. 2. See Ball Connection Changes table for DDP to SDP migration. 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. TN-42-02: DDP to SDP LPDDR2 Revision History Revision History Rev. A – 12/14 • Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000 www.micron.com/products/support Sales inquiries: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. PDF: 09005aef86122676 tn4202_mg_lpddr2_ddp_to_sdp.pdf - Rev. A 12/14 EN 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved.