TPS54326EVM-540 3-A, SWIFT(TM)

User's Guide
SLVU353 – November 2009
TPS54326EVM-540 3-A, SWIFTTM Regulator Evaluation
Module
1
2
3
4
Contents
Introduction .................................................................................................................. 2
1.1
Background ......................................................................................................... 2
1.2
Performance Specification Summary ............................................................................ 2
1.3
Modifications ........................................................................................................ 3
Test Setup and Results .................................................................................................... 3
2.1
Input / Output Connections ....................................................................................... 3
2.2
Start Up Procedure ................................................................................................ 4
2.3
Efficiency ............................................................................................................ 4
2.4
Load Regulation .................................................................................................... 5
2.5
Line Regulation ..................................................................................................... 5
2.6
Load Transient Response ........................................................................................ 6
2.7
Output Voltage Ripple ............................................................................................. 6
2.8
Input Voltage Ripple ............................................................................................... 7
2.9
Start Up .............................................................................................................. 7
2.10 Switching Frequency .............................................................................................. 8
Board Layout ................................................................................................................ 8
3.1
Layout ............................................................................................................... 8
Schematic, Bill of Materials and Reference ............................................................................ 12
4.1
Schematic ......................................................................................................... 12
4.2
Bill of Materials .................................................................................................... 13
4.3
Reference .......................................................................................................... 13
List of Figures
1
TPS54326EVM-540 Efficiency ............................................................................................ 4
2
TPS54326EVM-540 Load Regulation .................................................................................... 5
3
TPS54326EVM-540 Line Regulation ..................................................................................... 5
4
TPS54326EVM-540 Load Transient Response ......................................................................... 6
5
TPS54326EVM-540 Output Voltage Ripple ............................................................................. 6
6
TPS54326EVM-540 Input Voltage Ripple ............................................................................... 7
7
TPS54326EVM-540 Start Up .............................................................................................. 7
8
TPS54326-540 Switching Frequency
9
Top Assembly ............................................................................................................... 9
10
Top Layer ................................................................................................................... 10
11
Internal Layer 1 ............................................................................................................ 10
12
Internal Layer 2 ............................................................................................................ 11
13
Bottom Layer ............................................................................................................... 11
14
Bottom Assembly .......................................................................................................... 11
15
TPS54326EVM-540 Schematic Diagram............................................................................... 12
....................................................................................
8
List of Tables
D-CAP2 is a trademark of Texas Instruments.
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1
Introduction
1
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1
Input Voltage and Output Current Summary ............................................................................ 2
2
TPS54326 EVM and Performance Specifications Summary .......................................................... 2
3
Output Voltages ............................................................................................................. 3
4
Connection and Test Points ............................................................................................... 4
5
Bill of Materials............................................................................................................. 13
Introduction
This user’s guide contains background information for the TPS54326 as well as support documentation for
the TPS54326EVM-540 evaluation module. Also included are the performance specifications, schematic
and the bill of materials for the TPS54326EVM-540.
1.1
Background
The TPS54326 is a single, adaptive on-time D-CAP2™ mode synchronous buck converter requiring a very
low external component count. The D-CAP2™ control circuit is optimized for low ESR output capacitors
such as POSCAP, SP-CAP or ceramic types and features fast transient response with no external
compensation. The switching frequency is internally set at a nominal 700 kHz. The high-side and low-side
switching MOSFETs are incorporated inside the TPS54326 package along with the gate drive circuitry.
The low drain-to-source on resistance of the MOSFETs allow the TPS54326 to achieve high efficiencies
and helps keep the junction temperature low at high output currents. The TPS54226 also has an
Auto-Skip mode to enable higher efficiency at light loads. The TPS54326 dc/dc synchronous converter is
designed to provide up to a 2A output from an input control voltage source of 4.5V to 18V, input power
voltage source of 2V to 18V and output voltage from 0.76V to 5.5V. Rated input voltage, output voltage
and output current range for the evaluation module are given in Table 1.
Table 1. Input Voltage and Output Current Summary
1.2
EVM
Input Voltage Range
Output Voltage and Current Range
TPS54326EVM-540
VIN = 4.5V to 18V
Vout = 1.05 V, 0A to 2A
Performance Specification Summary
A summary of the TPS54326EVM-540 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 12V and an output voltage of 1.05V, unless otherwise noted. The
ambient temperature is 25°C for all measurement, unless otherwise noted.
Table 2. TPS54326 EVM and Performance Specifications Summary
Specifications
Test Conditions
Input voltage range (VIN)
Min
Typ
Max
4.5
12
18
Output voltage
Operating frequency
CH1
2
1.05
VIN = 12V, IO = 1A
Output current range
Over current limit
VIN = 12V
Output ripple voltage
VIN = 12V, IO = 3A
TPS54326EVM-540 3-A, SWIFTTM Regulator Evaluation Module
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kHz
3
4.1
7
V
V
700
0
Unit
A
A
mVPP
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1.3
Modifications
These evaluation modules are designed to provide access to the features of the TPS54326. Some
modifications can be made to this module.
1.3.1
Output Voltage Set Point
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing
the value of R1 can change the output voltage above 0.765V. The value of R1 for a specific output voltage
can be calculated using Equation 1 and Equation 2.
For output voltage from 0.76V to 2.5V:
æ R1 ö
VO = 0.765 ´ ç 1+
÷
è R2 ø
(1)
For output voltage over 2.5V:
æ R1 ö
VO = (0.763 + 0.0017 ´ VO ) ´ ç 1+
÷
è R2 ø
(2)
Table 3 lists the R1 value for some common output voltages. For higher output voltages, a feed forward
capacitor is required. Pads for this component (C2) are provided on the printed circuit board. C2 is used
for faster load transient response and is recommended for auto skip mode stability. Note that the values
given in Table 3 are standard values, and not the exact value calculated using Table 3.
Table 3. Output Voltages
2
Output Voltage
(V)
R1
(kΩ)
R2
(kΩ)
C2
(pF)
L1
(µH)
1.0
6.81
22.1
1.5
1.05
8.25
22.1
1.5
1.2
12.7
22.1
1.8
30.1
22.1
150-220
2.2
2.5
49.9
22.1
68-100
2.2
3.3
73.2
22.1
47 - 68
2.2
5.0
121
22.1
33 - 47
3.3
1.5
Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54326EVM-540. The section also
includes test results typical for the evaluation modules and efficiency, output load regulation, output line
regulation, load transient response, output voltage ripple, input voltage ripple, start up and switching
frequency.
2.1
Input / Output Connections
The TPS5326EVM-540 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 3 A must be connected to J1 through a pair of 20 AWG wires. The load
must be connected to J2 through a pair of 20 AWG wires. The maximum load current capability is 3 A.
Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor
the VIN input voltages with TP2 providing a convenient ground reference. TP8 is used to monitor the output
voltage with TP9 as the ground reference.
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Test Setup and Results
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Table 4. Connection and Test Points
2.2
Reference Designator
Function
J1
VIN (see Table 1 for VIN range)
J2
VOUT, 1.05 V at 3 A maximum
JP1
EN control. Connect EN to OFF to disable, connect EN to ON to enable.
TP1
VIN test point at VIN connector
TP2
GND test point at VIN
TP3
EN test point
TP4
VCC test point
TP5
Analog ground test point
TP6
Switch node test point
TP7
Power good test point
TP8
Output voltage test point
TP9
Ground test point at output connector
Start Up Procedure
1. Make sure the jumper at JP1 (Enable control) is set from EN to OFF.
2. Apply appropriate VIN voltage to VIN and PGND terminals at J1.
3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM will enable the output voltage.
2.3
Efficiency
Figure 1 shows the efficiency for the TPS54326EVM-540 at an ambient temperature of 25°C.
90
80
VI = 5 V
70
Efficiency - %
VI = 12 V
60
50
40
30
20
10
0.001
0.01
0.1
1
10
IO - Output Current - A
Figure 1. TPS54326EVM-540 Efficiency
4
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2.4
Load Regulation
The load regulation for the TPS54326EVM-540 is shown Figure 2.
1.2
VI = 5 V
Output Voltage Deviation - %
0.9
0.6
0.3
VI = 12 V
0
-0.3
0
0.5
1
1.5
2
IO - Output Current - A
2.5
3
3.5
Figure 2. TPS54326EVM-540 Load Regulation
2.5
Line Regulation
The line regulation for the TPS54326EVM-540 is shown Figure 3.
1.065
IO = 0.001 A
VO - Output Voltage - V
1.06
1.055
IO = 1.5 A
1.05
IO = 3 A
1.045
4
8
12
VI - Input Voltage - V
16
20
Figure 3. TPS54326EVM-540 Line Regulation
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Test Setup and Results
2.6
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Load Transient Response
The TPS54326EVM-540 response to load transient is shown in Figure 4. The current step is from 0.75 A
to 2.25 A (25% to 75% of rated load). Total peak-to-peak output voltage variation is as shown.
VO = 50 mV/div (AC Coupled)
IO = 1 A/div
0.75 to 2.25 A Load Step
t - Time = 200 ms/div
Figure 4. TPS54326EVM-540 Load Transient Response
2.7
Output Voltage Ripple
The TPS54326EVM-540 output voltage ripple is shown in Figure 5. The output current is the rated full load
of 3A.
VO = 50 mV/div (AC Coupled)
Switching Node = 5 V/div
t - Time = 500 ns/div
Figure 5. TPS54326EVM-540 Output Voltage Ripple
6
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2.8
Input Voltage Ripple
The TPS54326EVM-540 input voltage ripple is shown in Figure 6. The output current is the rated full load
of 3A.
VI = 50 mV/div (AC Coupled)
Switching Node = 5 V/div
t - Time = 500 ns/div
Figure 6. TPS54326EVM-540 Input Voltage Ripple
2.9
Start Up
The TPS54326EVM-540 start up waveform is shown in Figure 7.
EN = 10 V/div
VOUT = 500 mV/div
PG = 5 V/div
Time = 500 ms/div
Figure 7. TPS54326EVM-540 Start Up
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Board Layout
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2.10 Switching Frequency
The TPS54326EVM-540 switching frequency is shown in Figure 8.
900
fsw - Switching Frequency - kHz
IO = 1 A
800
VO = 1.8 V
700
600
VO = 3.3 V
500
0
5
10
VI - Input Voltage - V
15
20
Figure 8. TPS54326-540 Switching Frequency
3
Board Layout
This section provides description of the TPS54326EVM-540, board layout, and layer illustrations.
3.1
Layout
The board layout for the TPS54326EVM-540 and is shown in Figure 9 through Figure 14. The top layer
contains the main power traces for VIN, VO and ground. Also on the top layer are connections for the pins
of the TPS54326 and a large area filled with ground. Many of the signal traces are also located on the top
side. The input decoupling capacitor are located as close to the IC as possible. The input and output
connectors, test points and most of the components are located on the top side. R3, the 0-Ω resistor that
connects VIN to VCC and R4, the power good pull up, are located on the back side. Analog ground and
power ground are connected at a single point on the top layer near pin 5 of the TPS54326. The internal
layer 1 is a split plane containing analog and power grounds. The internal layer 2 is primarily power
ground. There are also a fill area of VIN and a trace routing VCC to the enable control jumper JP1. The
bottom layer is primarily analog ground. There are also traces to connect VIN to VCC through R3, traces
for the power good signal and the feedback trace from VOUT to the voltage setpoint divider network.
8
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Board Layout
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Figure 9. Top Assembly
Figure 10. Top Layer
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Board Layout
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Figure 11. Internal Layer 1
Figure 12. Internal Layer 2
10
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Board Layout
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Figure 13. Bottom Layer
Figure 14. Bottom Assembly
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Schematic, Bill of Materials and Reference
4
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Schematic, Bill of Materials and Reference
This section presents the TPS54326EVM-540 schematic, bill of materials and reference.
4.1
Schematic
Figure 15 is the schematic for the TPS54326EVM-540.
Figure 15. TPS54326EVM-540 Schematic Diagram
12
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Schematic, Bill of Materials and Reference
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4.2
Bill of Materials
Table 5. Bill of Materials
RefDes
QTY
Value
Description
Size
Part Number
MFR
C1, C3
2
10uF
Capacitor, Ceramic, 25V, X5R, 20%
1210
C3225X5R1E106M
TDK
C11
0
Open
Capacitor, Ceramic
1206
Std
Std
C2, C4, C8
0
Open
Capacitor, Ceramic
0603
Std
Std
C5
1
3300pF
Capacitor, Ceramic, 25V, X7R , 10%
0603
Std
Std
C6
1
1uF
Capacitor, Ceramic, 16V, X7R, 10%
0603
Std
Std
C7
1
0.1uF
Capacitor, Ceramic, 50V, X7R, 10%
0603
Std
Std
C9, C10
2
22uF
Capacitor, Ceramic, 6.3V, X5R, 20%
1206
C3216X5R0J226M
TDK
J1, J2
2
ED555/2DS
Terminal Block, 2-pin, 6-A, 3.5mm
0.27 x 0.25 inch
ED555/2DS
Sullins
JP1
1
PEC03SAAN
Header, Male 3-pin, 100mil spacing
0.100 inch x 3
PEC03SAAN
Sullins
L1
1
1.5uH
Inductor, SMT, 11.5 A, 9.7 milliohm
0.256 x 0.280 inch
SPM6530T-1R5M100
TDK
R1
1
8.25k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R2
1
22.1k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R3
1
0
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R4
1
100k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R5
0
Open
Resistor, Chip, 1/16W, 1%
0603
Std
Std
TP1, TP3,
TP4, TP6,
TP7, TP8,
TP9
3
5000
Test Point, Red, Thru Hole Color Keyed
0.100 x 0.100 inch
5000
Keystone
TP2, TP5,
TP9
3
5001
Test Point, Black, Thru Hole Color Keyed
0.100 x 0.100 inch
5001
Keystone
U1
1
TPS54326PWP
TPS54326PWP
TI
929950-00
3M
HPA540
Any
4.3
IC, 2-A Output Single Sync. Step-Down
–
1
Shunt, 100-mil, Black
–
1
PCB, 2.76 In x 1.97 In x 0.062 In
0.100
Reference
1. TPS54326 data sheet, Single Synchronous Converter with Integrated High Side and Low Side MOS
FET (SLVSA14)
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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
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EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 5V to 17V and the output voltage range of 1V to 5V .
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to
operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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