AN054 -- Anaren balun optimized for CC2420

0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 1 of 17
Anaren 0404 (BD2425N50200A00) balun optimized for
Texas Instruments CC2420 Transceiver
Nithya R Subramanian – RF Development Engineer
Niels Kirkeby– R&D Manager
August 31st, 2007
Introduction
Over the last few years, the drive for miniaturization and integration has intensified the
challenges concerning the trade off between repeatability, cost and time to market. The design
must be robust enough to get good yields, but also have the lowest possible bill of material
cost. The total cost not only depends on the number and the types of parts and their
associated cost, but also on the size of the PCB and enclosure.
At Anaren the focus is on developing product that addresses this trade off. Integrating 100%
RF tested components increase yield and decreases size and time to market. The following
application note demonstrates these objectives clearly as we present a small and simple balun
solution optimized for use with the CC2420 from Texas Instruments. The CC2420 is a true
single-chip 2.4 GHz ISM and IEEE 802.15.4 (ZigBee) compliant RF transceiver, designed for
low-power wireless applications. The reference design presented in this application note uses
only three components for the impedance matching: a 1mm square Anaren multilayer balun, a
DC blocking capacitor and an inductor for final impedance matching. This results in, a design
which takes up very little space and performs according to the numbers stated in the data
sheet.
The CC2420 is a low-cost, highly integrated solution for robust wireless communication in the
2.4 GHz unlicensed ISM band. CC2420 is designed to be compliant with SRD regulations
covered by ETSI EN 300 328 and EN 300 440 class 2 (Europe), FCC CFR47 Part 15 (US)
and ARIB STD-T66 (Japan). The CC2420 provides extensive hardware support for packet
handling, data buffering, burst transmissions, data encryption, data authentication, clear
channel assessment, link quality indication and packet timing information.
For more information about this or any other products currently available in the Anaren
product portfolio, please visit our website at www.anaren.com for datasheets, S parameters
and general corporate information.
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0404 Balun Application note
(ANN-2001) Page 2 of 17
For more information on Low Power Wireless products from Texas Instruments please visit
www.ti.com\lpw for product information.
Comparisons of Different Balun Solutions
The RF front end for the CC2420 is architecturally simple in that both receiver LNA and
transmitter PA are attached to the same set of balanced pins. The transmitter is linear enough
to not require any significant filtering. Hence an impedance matched, balanced to single
ended transformation is all that is needed. The only complication being that the PA bias
power, pin 7 on the CC2420, needs to be supplied into the balanced pin set.
A multitude of possible balun implementations exist and Texas Instruments provides two other
reference designs. One uses a 180° transmission line and 4 discrete components. The other
solution is a discrete lattice balun implementation that uses 7 components. The solution from
Anaren, described in this document, uses a discrete balun, one capacitor and one inductor.
Below we will step through each implementation to detail the differences and benefits that
each offer.
Figure 2 Layout of transmission line
implementation
Figure 1 Schematic of transmission
line implementation
The transmission line implementation shown in Figure 1 and Figure 2 is straight forward and
employs only four discrete components. However the PCB real estate taken up is significant
and the performance is sensitive to changes of line width of the 180˚ transmission line, PCB
thickness and variation in the PCB material.
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0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 3 of 17
Figure 4 Layout of the lumped element
implementation
Figure 3 Schematic of the lumped
element implementation
The lumped element implementation shown in Figure 3 and Figure 4 is smaller in size than the
transmission line version, but uses a total of 7 discrete components. This implementation is
less susceptible to line width and PCB variations, but it is sensitive to discrete component
tolerances.
Figure 5 Schematic of the Anaren balun
implementation
Figure 6 Layout of the Anaren balun
implementation
The Anaren balun implementation shown in Figure 5 and Figure 6 has fewer components and
uses less real estate than any of the other solutions
The Anaren balun implementation shown in Figure 5 and Figure 6 takes up even less PCB
area and has reduced sensitivity to discrete component tolerance/variation. The
recommended components are a parallel inductor of 6.8nH (Johanson L-07C6N8J) and a
12pF DC-blocking capacitor (Johanson 250R07C120JV4). Care should be taken using
alternate vendors especially on the inductor as they do not have the same performance. Each
vendor of inductors and capacitors has their own way of realizing the inductor/capacitor with
associated differences in parasitic values, even within a single vendor, different component
series are made differently with significantly different parasitic’s. Even from one value to the
next in the same series there can be parasitic differences, if for instance a spiral inductor
requires another turn to fit in the same footprint from one value to the next then either the
trace width drops, another trace layer is used or maybe a different material set – these, from a
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0404 Balun Application note
(ANN-2001) Page 4 of 17
value point of view, subtle changes causes significant parasitic change. If the change in
impedance cause by parasitic changes fall within the circle outlined in Figure 9 the
performance will be acceptable. One way to evaluate alternate vendors is to compare sparameters of the components – however the s-parameters must be measured the same way
from both vendors to be able to compare and this information is not often available. Another
way is to use vendor or third party models but it is still important to know what each model
represents; does it include the PCB pads, is the model valid for the PCB used etc.
The Anaren recommended layout (can be supplied as Gerber files) is fabricated on a 39mil
thick FR4 board. If a multilayer board is used it is recommended that internal power/GND
planes be opened such that the effective height to GND is roughly 40mil, as illustrated in
Figure 7 below,. If it is not possible in the application to open up internal GND planes then
follow Table 1 for changes to the differential connecting lines, identified in Figure 8, with red
arrows and the single ended connection identified in Figure 8, with a blue arrow.
Figure 7 Opening in power/GND planes
below RF circuitry
Figure 8 Differential (red) connecting lines
and single ended (blue) connecting line
Distance to ground &
material [mil]
Differential line width
Single ended line width
Width/Length [mil/mil]
Width/Length [mil/mil]
5, PI
8/60
8/221
8, Ro4350
8/60
10/221
10, FR4
10/60
15/221
20, FR4
10/60
30/221
30, FR4
10/60
50/221
39, FR4
10/60
80/221
60, FR4
10/75
80/221
Table 1 : Differential line and single ended line width/length for various substrate
heights
If a SMA connector is used and GND plane spacing other than 39 mils is used then the launch
area must be opened or otherwise compensated to provide proper match.
If the location of the components is changed (not recommended) then it is very important to
keep the DC blocking capacitor very close to the balun (pin 1). Also the trace lines between
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0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 5 of 17
the CC2420 chip, the parallel inductor and balun are an integral part of the matching and
should not be changed in length.
Table 2 demonstrates the significant reduction in size; component count and board layout
achieved with the Anaren 0404 balun solution.
Solution
Transmission line
design
Lumped element
design
Anaren/TI
0404 internal
bias solution
Component Count
and type
4 Total
7 Total
3 Total
1 Capacitor
4 Capacitors
1 Balun
3 Inductors
3 Inductors
1 Inductor
1 Capacitor
PCB Area
0.1448 sq. inch
0.0423 sq. inch
0.0174 sq inch
Space savings
based on lumped
element design
-242%
0%
59%
Table 2 Comparison of the three different balun implementations
The Anaren balun performance is consistent and tolerant to PCB manufacturing tolerances.
Production average and worst case RF performance data for the BD2425N50200A00 is
illustrated in Table 3.
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0404 Balun Application note
(ANN-2001) Page 6 of 17
Max
20
15
1
10
0.5
5
Frequency [MHz]
3200
3100
3000
2900
2800
2700
2600
Frequency [MHz]
Table 3 Balun Performance
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3200
3100
3000
2900
2800
2700
2600
2500
2400
2300
2100
2000
1900
3200
3100
3000
2900
2800
2700
2600
2500
2400
-20
2300
-15
-2
2200
-10
2100
-1
2000
2500
0
-1.5
1900
Max
-5
1800
-0.5
1700
[Deg]
2
0
Min
Ave
Phase Balance
2200
Min
Ave
1.5
1800
2400
2200
2100
2000
1900
1800
1700
3200
3100
3000
2900
2700
2600
2500
2400
2300
2200
2100
2000
1900
1800
2800
Frequency [MHz]
Am plitude Balance
1700
Max
Ave
0
-3
-6
-9
-12
-15
-18
-21
-24
-27
-30
-33
-36
Frequency [MHz]
[dB]
Min
Return Loss
[dB]
0
-0.3
-0.6
-0.9
-1.2
-1.5
-1.8
-2.1
-2.4
-2.7
-3
-3.3
-3.6
1700
[dB]
Min
Ave
2300
Max
Insertion Loss
0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 7 of 17
Figure 8 Implementation of CC2420 using Anaren balun.
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0404 Balun Application note
(ANN-2001) Page 8 of 17
Application Verification
Measurements verify that the reference designs presented in this application note has the
same performance as given in the data sheet. These measurements include;
•
Transmit Power
•
Receive Sensitivity
•
Current consumption
These measurements were performed independently by both Anaren and TI. In addition TI
also performed an Error Vector Magnitude measurement. Through further testing at Anaren
the optimum impedance for the CC2420 Chip is found to be inside the range (ellipse) shown in
Smith chart below.
Anaren balun design
TRL design
Lumped element design
Figure 9 Optimum Impedance
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0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 9 of 17
The Impedance Matching
The following describes the matching steps.
Optimum differential impedance as seen from the RF ports towards antenna is stated as
95+j187 Ω in the data sheet for the CC2420. The BD2425N50200A00 balun has 50 Ω single
ended port impedance and 200 Ω balanced port impedance. A 6.8nH inductor is connected
across the balanced ports for matching purposes and a 12pF capacitor is used at pin 1 as a
DC block (RF GND) to allow biasing through this pin to the differential ports, pin 3 and pin 4 of
the balun. This is illustrated in Figure 10.
Figure 10 Anaren balun schematic
The impedance matching steps, with a SMA connector, illustrated in the Smith chart, Figure
11 performs the match as follows.
•
The connector and the connecting line at the input transform 50 Ω to 45-j2 Ω (Note 1).
•
The balun transforms 45-j2 Ω into 239+j29 Ω
•
The inductor at the differential arm of the balun brings the impedance to 53+j98 Ω
•
The transmission line to interface the chip to the balun brings the impedance to
62+j135 Ω.
•
The DC-blocking capacitor and transmission line from the Tx/Rx switch to the bias
point of the balun (pin 1) transforms the impedance to 84+j172 Ω
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0404 Balun Application note
(ANN-2001) Page 10 of 17
Figure 11 Smith chart showing the impedance matching steps
The value of the inductor and the capacitor also depends on the length of the transmission line
used between the CC2420 chip and the balun. If the length of the transmission line between
chip and the balun is increased then the inductor and the capacitor values should be
decreased. If the length of the line is decreased then the inductor and capacitor should be
increased.
It is strongly recommended to use the same line length, width, inductor and capacitor values
as shown in the 0404 internal bias design schematic. Any change in inductor value, DCblocking capacitor value or layout will give only similar but not exactly the same performance.
Note 1: If a SMA connector is not used then a 50 Ω transmission line should be used to
connect to the balun, this change will cause a negligible shift in performance.
References
1. http://focus.ti.com/docs/prod/folders/print/cc2420.html - CC2420EM Reference Design
2. http://focus.ti.com/docs/prod/folders/print/cc2420.html - CC2420 Development kit user
manual
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0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 11 of 17
Ultra Low Profile
0404 Balun
50Ω to 200Ω
Balanced
Description
The BD2425N50200A00 is a low cost, low profile
sub-miniature unbalanced to balanced transformer
designed for differential inputs and output locations on
modern chipsets in an easy to use surface mount
package. The BD2425N50200A00 is ideal for high
volume manufacturing and delivers higher performance
than traditional ceramic baluns. The BD2425N50200A00
has an unbalanced port impedance of 50Ω and a 200Ω
balanced port impedance. This transformation enables
single ended signals to be applied to differential ports on
modern integrated chipsets. The output ports have equal
amplitude (-3dB) with 180 degree phase differential. The
BD2425N50200A00 is available on tape and reel for pick
and place high volume manufacturing.
Detailed Electrical Specifications: Specifications subject to change without notice.
ROOM (25°C)
Features:
•
•
•
•
•
•
•
•
•
•
•
•
2400 – 2500 MHz
0.65mm Height Profile
50 Ohm to 2 x 100 Ohm
Low Insertion Loss
802.11 b+g
MIMO b+g
Bluetooth
Zigbee
Surface Mountable
Tape & Reel
Non-conductive
RoHS Compliant
Parameter
Min.
Frequency
2400
Typ.
Max
2500
Unit
MHz
Unbalanced Port Impedance
50
Ω
Balanced Port Impedance
200
Ω
27
dB
Return Loss
21
Insertion Loss*
0.6
0.7
dB
Amplitude Balance
0.5
1.0
dB
Phase Balance
2
6
Degree
s
CMRR
29
dB
Power Handling
Operating Temperature
-55
1
Watts
+85
ºC
* Insertion Loss stated at room temperature (Insertion Loss is approximately 0.1 dB higher at +85 ºC)
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0404 Balun Application note
(ANN-2001) Page 12 of 17
Outline Drawing
Top View (Near-side)
.041+.003
-.002
1.05+0.08
-0.06
[
]
Side View
.041+.003
-.002
1.05+0.08
-0.06
[
Bottom View (Far-side)
.012 [0.30]
.024±.0025
[0.62±0.064] 0.12 [0.30] 1
]
2
3x.0
[0.2
4
4X .020 [0.50]
3
3x.010
[0.25]
Pin Designation
GND / DC Feed
1
+ RF GND
Dimensions are in Inches [Millimeters]
Mechanical Outline
2 Unbalanced Port
3 Balanced Port
4 Balanced Port
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Tolerances are Non-Cumula
0404 Balun App. Note
0404 Balun Application note
(ANN-2001) Page 13 of 17
Typical Performance:2400 MHz. to 2500 MHz.
Insertion Loss
-3
-0.3
-6
-0.6
-9
-0.9
-12
-1.2
-15
-1.5
1.5
15
1
10
0.5
5
2600
2550
2500
-20
2450
-15
-2
2400
-10
2350
-1
-1.5
Frequency [MHz]
Frequency [MHz]
CMRR
0
-3
-6
-9
-12
-15
-18
-21
-24
-27
-30
-33
2600
2550
2500
2450
-36
2400
2450
-5
2400
0
-0.5
2350
0
2300
deg
20
2350
2600
Phase Balance
2
2300
[dB]
Amplitude Balance
[dB]
2600
Frequency [MHz]
Frequency [MHz]
2300
2550
2300
2600
2550
2500
-3.6
2450
-36
2400
-3.3
2350
-3
-33
2550
-2.7
-30
2500
-2.4
-27
2500
-2.1
-24
2450
-1.8
-21
2400
-18
2350
[dB]
0
2300
[dB]
Return Loss - Input
0
Frequency [MHz]
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0404 Balun Application note
(ANN-2001) Page 14 of 17
Wide Band Performance: 500 MHz. to 8500 MHz.
Return Loss - Input
0
-0.3
-3
-0.6
-6
-9
-1.2
-12
-1.5
-15
[dB]
-0.9
-1.8
-18
Frequency [MHz]
CMRR
-3
-6
-9
-12
-15
-18
-21
-24
-27
-30
-33
8500
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
-36
3000
6500
7000
7500
8000
8500
7500
8000
8500
5000
Frequency [MHz]
0
2500
4500
4000
3500
3000
2500
2000
1500
8500
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
-20
3000
-15
-2
2500
-10
2000
-1
-1.5
500
-5
1000
0
-0.5
1500
7000
5
0
2000
6000
10
1500
6500
1
0.5
500
5500
15
500
6000
1.5
deg
20
1000
5000
Phase Balance
2
1000
[dB]
4500
Frequency [MHz]
Amplitude Balance
[dB]
5500
Frequency [MHz]
4000
3500
3000
2500
2000
500
8500
8000
7500
7000
6500
6000
5500
5000
4000
3500
3000
-36
2500
-33
-3.6
2000
-30
-3.3
1500
-27
-3
500
-24
-2.7
1000
-2.4
1500
-21
`
1000
-2.1
4500
[dB]
Insertion Loss
0
Frequency [MHz]
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0404 Balun Application note
(ANN-2001) Page 15 of 17
Mounting Configuration:
In order for Xinger surface mount components to work optimally, the proper impedance
transmission lines must be used to connect to the RF ports. If this condition is not satisfied,
insertion loss, Isolation and VSWR may not meet published specifications.
All of the Xinger components are constructed from ceramic filled PTFE composites which
possess excellent electrical and mechanical stability having X and Y thermal coefficient of
expansion (CTE) of 17 ppm/oC.
An example of the PCB footprint used in the testing of these parts is shown below. An
example of a DC-biased footprint is also shown below. In specific designs, the transmission
line widths need to be adjusted to the unique dielectric coefficients and thicknesses as well
as varying pick and place equipment tolerances
With No DC Bias
3X .011
[0.29]
.008 [0.21]
3X .011
[0.29]
With DC Bias
Plated thru
hole to
ground
.014 [0.36]
.008 [0.21]
.020
[0.50]
3X Transmission
Line
.020
[0.50]
Circuit Pattern
.008 [0.21]
3X .011
[0.29]
.014 [0.36]
.008 [0.21]
.020
[0.50]
3X Transmission
Line
.020
[0.50]
Circuit Pattern
Footprint Pad (s)
Solder Resist
Plated thru
hole to
ground
3X .011
[0.29]
Footprint Pad (s)
Dimensions are in Inches [Millimeters]
Mounting Footprint
Solder Resist
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Dimensions are in Inches [Millimeters]
Mounting Footprint
0404 Balun Application note
(ANN-2001) Page 16 of 17
Packaging and Ordering Information
Parts are available in reel and are packaged per EIA 481-2. Parts are oriented in tape and reel as
shown below. Minimum order quantities are 4000 per reel. See Model Numbers below for further
ordering information.
ØA
ØC
ØD
QUANTITY/REEL
4000
TABLE 1
REEL DIMENSIONS (inches [mm])
ØA
7.00 [177.8]
B
0.32 [8.0]
2.0 [50.8]
ØC
ØD
0.512 [13.0]
B
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