Product Folder Sample & Buy Technical Documents Support & Community Tools & Software SN74LV1T00 SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 SN74LV1T00 Single Power Supply 2-Input Positive NAND Gate CMOS Logic Level Shifter 1 Features 2 Applications • • • • • • • 1 • • • • • • • • • • • • • (1) Single-Supply Voltage Translator at 5.0/3.3/2.5/1.8V VCC Operating Range of 1.8V to 5.5V Up Translation – 1.2V(1) to 1.8V at 1.8V VCC – 1.5V(1) to 2.5V at 2.5V VCC – 1.8V(1) to 3.3V at 3.3V VCC – 3.3V to 5.0V at 5.0V VCC Down Translation – 3.3V to 1.8V at 1.8V VCC – 3.3V to 2.5V at 2.5V VCC – 5.0V to 3.3V at 3.3V VCC Logic Output is Referenced to VCC Output Drive – 8mA Output Drive at 5V – 7mA Output Drive at 3.3V – 3mA Output Drive at 1.8V Characterized up to 50MHz at 3.3V VCC 5V Tolerance on Input Pins –40°C to 125°C Operating Temperature Range Pb-Free Packages Available: SC-70 (DCK) – 2 × 2.1 × 0.65 mm Latch-Up Performance Exceeds 250mA Per JESD 17 ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Supports Standard Logic Pinouts CMOS Output B Compatible with AUP1G and LVC1G Families Refer to the VIH/VIL and output drive for lower VCC condition. Industrial controllers Telecom Portable applications Servers PC and notebooks Automotive 3 Description SN74LV1T00 is a low voltage CMOS gate logic that operates at a wider voltage range for industrial, portable, telecom, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8V/2.5V/3.3V/5V CMOS levels. The input is designed with a lower threshold circuit to match 1.8V input logic at VCC = 3.3V and can be used in 1.8V to 3.3V level up translation. In addition, the 5V tolerant input pins enable down translation (e.g. 3.3V to 2.5V output at VCC = 2.5V). The wide VCC range of 1.8V to 5.5V allows generation of desired output levels to connect to controllers or processors. The SN74LV1T00 is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. Device Information ORDER NUMBER PACKAGE BODY SIZE SN74LV1T00DBVR SOT-23 (5) 2,90mm x 1,60mm SN74LV1T00DCKR SC70 (5) 2,00mm x 1,25mm DCK or DBV PACKAGE (TOP VIEW) A 1 B 2 GND 3 5 VCC 4 Y 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74LV1T00 SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com Table of Contents 1 2 3 4 Features ................................................................. Applications .......................................................... Description ............................................................ Revision History ................................................... 1 1 1 2 4.1 4.2 4.3 4.4 4.5 5 5 6 6 7 Typical Design Examples ......................................... Absolute Maximum Ratings ..................................... Recommended Operating Conditions ...................... Electrical Characteristics .......................................... Switching Characteristics ........................................ 4.6 OPERATING CHARACTERISTICS ......................... 7 5 Parameter Measurement Information ................. 8 6 Device and Documentation Support ................... 9 5.1 More Product Selection ............................................ 8 6.1 Trademarks .............................................................. 9 6.2 Electrostatic Discharge Caution ............................... 9 6.3 Glossary ................................................................... 9 7 Mechanical, Packaging, and Orderable Information ............................................................ 9 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (September 2013) to Revision A • Updated VCC values for VIH parameter in the ELECTRICAL CHARACTERISTICS table. .................................................... 6 Changes from Revision A (September 2013) to Revision B • 2 Page Page Updated document formatting. .............................................................................................................................................. 1 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 SN74LV1T00 www.ti.com SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 Function Table INPUT (Lower Level Input) OUTPUT (VCC CMOS) A B Y H H L L X H X L H SUPPLY VCC = 3.3V A A B B Y VIH(min) =1.35 V VOH(min) = 2.9 V VIL(max) =0.8 V VOL(max)= 0.2 V 1 4 2 Y Figure 1. Logic Diagram (NAND Gate) Figure 2. Excellent Signal Integrity (1.8V to 3.3V at 3.3V VCC) Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 3 SN74LV1T00 SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com Figure 3. Excellent Signal Integrity (3.3V to 3.3V at 3.3V VCC) Figure 4. Excellent Signal Integrity (3.3V to 1.8V at 1.8V VCC) 4 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 SN74LV1T00 www.ti.com SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 4.1 Typical Design Examples VIH = 2.0V VIL = 0.8V 5.0V 3.3V System VIH = 0.99V VIL = 0.55V Vcc = 5.0V 5.0V, 3.3V 2.5V, 1.8V 1.5V, 1.2V System 5.0V System LV1Txx Logic Vcc = 1.8V 1.8V System LV1Txx Logic Vcc = 3.3V 5.0V, 3.3V 2.5V, 1.8V System LV1Txx Logic 3.3V System VOH min = 2.4V VIH min = 1.36V VOL max = 0.4V VIL min = 0.8V Figure 5. Switching Thresholds for 1.8-V to 3.3-V Translation 4.2 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC VI VO MIN MAX Supply voltage range –0.5 7.0 V (2) Input voltage range UNIT –0.5 7.0 V Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 4.6 V Voltage range applied to any output in the high or low state (2) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 or VO > VCC ±20 mA IO Continuous output current ±25 mA Continuous current through VCC or GND ±50 mA θJA Package thermal impedance (3) Tstg Storage temperature range (1) (2) (3) DBV package 206 DCK package –65 252 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 5 SN74LV1T00 SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com 4.3 Recommended Operating Conditions (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage 1.6 5.5 V VI Input voltage 0 5.5 V VO Output voltage 0 VCC V IOH High-level output current IOL Low-level output current Δt/Δv TA (1) Input transition rise or fall rate VCC = 1.8 V –3 VCC = 2.5 V –5 VCC = 3.3 V –7 VCC = 5.0 V –8 VCC = 1.8 V 3 VCC = 2.5 V 5 VCC = 3.3 V 7 VCC = 5.0 V 8 VCC = 1.8 V 20 VCC = 3.3 V or 2.5V 20 VCC = 5.0 V 20 Operating free-air temperature –40 mA mA ns/V 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4.4 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C VCC MIN VIH Low-level input voltage 0.94 1.0 1.02 1.03 1.135 1.18 VCC = 2.75 V 1.21 1.23 VCC = 3 V to 3.3 V 1.35 1.37 VCC = 3.6 V 1.47 1.48 VCC = 4.5 V to 5.0 V 2.02 2.03 2.1 IOH = –2.3 mA IOH = –3 mA VOH IOH = –3 mA IOH = –3.0 mA IOH = –5.5 mA IOH = –5.5 mA IOH = –4 mA IOH = –8 mA IOH = –8 mA 6 2.11 0.55 VCC = 2.25 V to 2.75 V 0.75 0.71 0.8 0.65 1.65 V to 5.5 V 0.8 VCC – 0.1 1.28 1.21 1.5 1.45 1.8V 2.3V 2.5V 3.0 V 3.3 V 4.5 V 5.0 V Submit Documentation Feedback V 0.8 VCC – 0.1 1.65 V UNIT V 0.58 VCC = 4.5 V to 5.5 V IOH = –2.0 mA MAX VCC = 1.65 V to 2.0 V VCC = 3 V to 3.6 V IOH = –20 µA MIN VCC = 2.0 V VCC = 5.5 V VIL TA = –40°C to 125°C MAX VCC = 1.65 V to 1.8 V VCC = 2.25 V to 2.5 V High-level input voltage TYP 2 2 2 1.93 2.25 2.15 2.78 2.7 2.6 2.49 2.9 2.8 4.2 4.1 4.1 3.95 4.6 4.5 V V V V V V Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 SN74LV1T00 www.ti.com SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 Electrical Characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX 0.1 0.1 1.65 V 0.2 0.25 0.1 0.15 2.3V IOL = 3 mA 3.0 V IOL = 4 mA 4.5 V IOL = 8 mA VI = 0 V or VCC 0.15 0.2 0.1 0.15 0.2 0.252 0.15 0.2 0.3 0.35 0.12 ±1 5.0 V 1 10 3.3 V 1 10 2.5 V 1 10 0V, 1.8V, 2.5V, 3.3V, 5.5 V VI = 0 V or VCC, IO = 0; open on loading ICC TA = –40°C to 125°C MAX 1.65 V to 5.5 V IOH = 3 mA A input TYP IOL = 1.9 mA IOL = 5.5 mA II MIN IOL = 20 µA IOH = 2.3 mA VOL TA = 25°C VCC UNIT V μA μA 1.8V 1 10 One input at 0.3V or 3.4V, Other inputs at 0 or VCC, IO = 0 5.5 V 1.35 1.5 mA One input at 0.3V or 1.1V Other inputs at 0 or VCC, IO = 0 1.8V 10 10 μA Ci VI = VCC or GND 3.3 V 2 10 pF Co VO = VCC or GND 3.3 V 2.5 ΔICC 4.5 10 2 2.5 pF Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7) PARAMETER FROM (INPUT) TO (OUTPUT) FREQUENCY (TYP) VCC 5.0V DC to 50 MHz 3.3V tpd Any In Y DC to 25 MHz 2.5V DC to 15 MHz 1.8V CL TA = 25°C MIN TA = –65°C to 125°C TYP MAX MIN TYP MAX 15pF 4 5 4 5 30pF 5.5 7.0 5.5 7.0 15pF 4.8 5 5 5.5 30pF 5 5.5 5.5 6.5 15pF 6 6.5 7 7.5 30pF 6.5 7.5 7.5 8.5 15pF 10.5 11 11 12 30pF 12 13 12 14 UNIT ns ns ns ns 4.6 OPERATING CHARACTERISTICS TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS f = 1 MHz and 10 MHz VCC TYP 1.8 V ± 0.15 V 10 2.5 V ± 0.2 V 10 3.3 V ± 0.3 V 10 5.5 V ± 0.5 V 10 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 UNIT pF 7 SN74LV1T00 SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com 5 Parameter Measurement Information From Output Under Test CL (see Note A) VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VI/2 VCC/2 5, 10, 15, 30 pF VI/2 VCC/2 1 MΩ CL VMI VMO LOAD CIRCUIT VI VMI Input VMI 0V tPHL tPLH VOH VMO Output VMo VOL tPHL tPLH VOH VMo Output VMo VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. B. C. D. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. Figure 6. Load Circuit and Voltage Waveforms 5.1 More Product Selection DEVICE PACKAGE DESCRIPTION SN74LV1T00 DCK, DBV 2-Input Positive-NAND Gate SN74LV1T02 DCK, DBV 2-Input Positive-NOR Gate SN74LV1T04 DCK, DBV Inverter Gate SN74LV1T08 DCK, DBV 2-Input Positive-AND Gate SN74LV1T17 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T14 DCK, DBV Single Schmitt-Trigger Inverter Gate SN74LV1T32 DCK, DBV 2-Input Positive-OR Gate SN74LV1T50 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T86 DCK, DBV Single 2-Input Exclusive-Or Gate SN74LV1T125 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T126 DCK, DBV Single Buffer Gate with 3-state Output SN74LV4T125 RGY, PW Quadruple Bus Buffer Gate With 3-State Outputs 8 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 SN74LV1T00 www.ti.com SCLS737B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 6 Device and Documentation Support 6.1 Trademarks All trademarks are the property of their respective owners. 6.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms and definitions. 7 Mechanical, Packaging, and Orderable Information The following packaging information and addendum reflect the most current data available for the designated devices. This data is subject to change without notice and revision of this document. Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T00 9 PACKAGE OPTION ADDENDUM www.ti.com 21-Feb-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74LV1T00DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (NEA3 ~ NEAS) SN74LV1T00DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 (WA3 ~ WAS) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 21-Feb-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SN74LV1T00DBVR SOT-23 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBV 5 3000 178.0 9.2 3.3 3.2 1.55 4.0 8.0 Q3 SN74LV1T00DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74LV1T00DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74LV1T00DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV1T00DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LV1T00DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74LV1T00DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74LV1T00DCKR SC70 DCK 5 3000 180.0 180.0 18.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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