TRSF3222EIPW - Texas Instruments

EN
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
ROUT2
Battery-Powered Systems
PDAs
Notebooks
Laptops
Palmtop PCs
Hand-Held Equipment
DESCRIPTION/
ORDERING INFORMATION
The TRSF3222E consists of two line drivers, two line
receivers, and a dual charge-pump circuit with
±15-kV ESD protection pin to pin (serial-port
connection pins, including GND).
The TRSF3222E meets the requirements of
TIA/EIA-232-F and provides the electrical interface
between an asynchronous communication controller
and the serial-port connector. The charge pump and
four small external capacitors allow operation from a
single 3-V to 5.5-V supply. The TRSF3222E
operates at typical data signaling rates up to
1000 kbit/s and is an improved drop-in replacement
for industry-popular '3222 two-driver, two-receiver
functions.
20
2
3
19
18
4
17
5
16
6
7
15
14
8
9
13
12
10
11
PWRDOWN
VCC
GND
DOUT1
RIN1
ROUT1
NC
DIN1
DIN2
NC
NC − No internal connection
RHL PACKAGE
(TOP VIEW)
APPLICATIONS
•
•
•
•
•
•
1
C1+
NC
V+
C1–
C2+
C2–
V–
DOUT2
NC
RIN2
PWRDOWN
•
•
•
•
•
•
DB, DW, OR PW PACKAGE
(TOP VIEW)
1
24
2
3
4
23 VCC
22 NC
21 GND
5
6
20 DOUT1
19 RIN1
7
8
18 ROUT1
17 NC
9
10
16 DIN1
15 NC
14 DIN2
11
12
13
NC
•
ESD Protection for RS-232 Bus Pins
– ±15-kV Human-Body Model (HBM)
– ±8-kV IEC 61000-4-2, Contact Discharge
– ±15-kV IEC 61000-4-2, Air-Gap Discharge
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU v.28 Standards
Operates With 3-V to 5.5-V VCC Supply
Operates up to 1000 kbit/s
Two Drivers and Two Receivers
Low Standby Current . . . 1 μA Typ
External Capacitors . . . 4 × 0.1 μF
Accepts 5-V Logic Input With 3.3-V Supply
EN
FEATURES
•
SLLS823 – JULY 2007
ROUT2
www.ti.com
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
NC − No internal connection
The TRSF3222E can be placed in the power-down mode by setting the power-down (PWRDOWN) input low,
which draws only 1 μA from the power supply. When the device is powered down, the receivers remain active
while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is
disabled; V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the
high-impedance state by setting enable (EN) high.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
ORDERING INFORMATION
TA
PACKAGE
SOIC – DW
0°C to 70°C
SSOP – DB
TSSOP – PW
SOIC – DW
–40°C to 85°C
SSOP – DB
TSSOP – PW
(1)
(2)
(1) (2)
ORDERABLE PART NUMBER
Tube of 25
TRSF3222ECDW
Reel of 2000
TRSF3222ECDWR
Tube of 70
TRSF3222ECDB
Reel of 2000
TRSF3222ECDBR
Tube of 70
TRSF3222ECPW
Reel of 2000
TRSF3222ECPWR
Tube of 25
TRSF3222EIDW
Reel of 2000
TRSF3222EIDWR
Tube of 70
TRSF3222EIDB
Reel of 2000
TRSF3222EIDBR
Tube of 70
TRSF3222EIPW
Reel of 2000
TRSF3222EIPWR
TRSF3222EC
RT22EC
RT22EC
TRSF3222EI
RT22EI
RT22EI
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLES
XXX
Each Driver (1)
INPUTS
DIN
(1)
PWRDOWN
OUTPUT
DOUT
X
L
Z
L
H
H
H
H
L
H = high level, L = low level, X = irrelevant, Z = high impedance
Each Receiver (1)
INPUTS
(1)
2
TOP-SIDE MARKING
RIN
EN
OUTPUT
ROUT
H
L
L
H
L
L
X
H
Z
Open
L
H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off),
Open = input disconnected or connected driver off
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TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
LOGIC DIAGRAM (POSITIVE LOGIC)(1)
DIN1
DIN2
PWRDOWN
EN
ROUT1
13
17
12
8
20
DOUT1
DOUT2
Powerdown
1
15
16
RIN1
5 kW
ROUT2
10
9
RIN2
5 kW
(1)
Pin numbers shown are for the DB, DW, and PW packages.
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
(2)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.3
6
V
V+
Positive-output supply voltage range (2)
–0.3
7
V
V–
Negative-output supply voltage range (2)
0.3
–7
V
13
V
V+ – V–
Supply voltage difference
VI
Input voltage range
VO
Output voltage range
(2)
θJA
Package thermal impedance (3) (4)
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
Driver (EN, PWRDOWN)
–0.3
6
Receiver
–25
25
–13.2
13.2
–0.3
VCC + 0.3
Driver
Receiver
DB package
70
DW package
58
PW package
83
RHL package
(1)
(2)
(3)
(4)
V
V
°C/W
TBD
–65
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
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3
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
Recommended Operating Conditions (1)
See Figure 5
MIN NOM MAX UNIT
VCC = 3.3 V
Supply voltage
VCC = 5 V
VIH
Driver and control high-level input voltage
DIN, EN, PWRDOWN
VIL
Driver and control low-level input voltage
DIN, EN, PWRDOWN
VI
Driver and control input voltage
DIN, EN, PWRDOWN
VI
Receiver input voltage
TA
(1)
VCC = 3.3 V
VCC = 5 V
3.3
3.6
5
5.5
V
2
V
2.4
TRSF3222EC
Operating free-air temperature
3
4.5
TRSF3222EI
0.8
V
0
5.5
V
–25
25
V
0
70
–40
85
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
Electrical Characteristics (1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)
PARAMETER
II
ICC
(1)
(2)
4
TEST CONDITIONS
Input leakage current (EN, PWRDOWN)
Supply current
No load, PWRDOWN at VCC
Supply current (powered off)
No load, PWRDOWN at GND
MIN
TYP (2)
MAX
±0.01
±1
μA
0.3
1
mA
1
10
μA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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UNIT
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
DRIVER SECTION
abc
Electrical Characteristics (1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)
PARAMETER
TEST CONDITIONS
MIN TYP (2)
MAX
UNIT
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
5.4
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
–5.4
IIH
High-level input current
VI = VCC
±0.01
±1
μA
IIL
Low-level input current
VI at GND
±0.01
±1
μA
±35
±60
mA
IOS
Short-circuit output current (3)
ro
Output resistance
IOZ
(1)
(2)
(3)
VCC = 3.6 V
VO = 0 V
VCC = 5.5 V
VCC, V+, and V– = 0 V,
Output leakage current
PWRDOWN = GND
VO = ±2 V
300
V
V
Ω
10M
VCC = 3 V to 3.6 V,
VO = ±12 V
±25
VCC = 4.5 V to 5.5 V,
VO = ±10 V
±25
μA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
Switching Characteristics (1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)
PARAMETER
MIN TYP (2)
TEST CONDITIONS
CL = 1000 pF
Maximum data rate
(See Figure 1)
tsk(p)
SR(tr)
(1)
(2)
(3)
Pulse skew (3)
Slew rate,
transition region
(see Figure 1)
RL = 3 kΩ,
One DOUT switching
UNIT
250
CL = 250 pF,
VCC = 3 V to 4.5 V
1000
CL = 1000 pF,
VCC = 4.5 V to 5.5 V
1000
CL = 150 pF to 2500 pF,
RL = 3 kΩ to 7 kΩ,
See Figure 2
RL = 7 kΩ,
CL = 150 pF to 1000 pF
RL = 3 kΩ
MAX
kbit/s
300
ns
8
90
CL = 1000 pF
12
60
CL = 150 pF to 250 pF
24
150
V/μs
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
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5
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
RECEIVER SECTION
abc
Electrical Characteristics (1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
TYP (2)
VCC – 0.6
VCC – 0.1
MAX
1.5
2.4
VCC = 5 V
1.8
2.4
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
IOZ
Output leakage current
EN = 1
ri
Input resistance
VI = ±3 V to ±25 V
VCC = 3.3 V
0.6
1.2
VCC = 5 V
0.8
1.5
UNIT
V
0.4
VCC = 3.3 V
VIT+
(1)
(2)
MIN
TEST CONDITIONS
V
V
V
0.3
V
±0.05
±10
μA
5
7
kΩ
3
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Switching Characteristics (1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TYP (2)
UNIT
tPLH
Propagation delay time, low- to high-level output
CL = 150 pF, See Figure 3
300
ns
tPHL
Propagation delay time, high- to low-level output
CL = 150 pF, See Figure 3
300
ns
ten
Output enable time
CL = 150 pF, RL = 3 kΩ, See Figure 4
200
ns
tdis
Output disable time
CL = 150 pF, RL = 3 kΩ, See Figure 4
200
ns
tsk(p)
Pulse skew (3)
See Figure 3
300
ns
(1)
(2)
(3)
6
TEST CONDITIONS
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
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TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
PARAMETER MEASUREMENT INFORMATION
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 Ω
RL
1.5 V
0V
CL
(see Note A)
tTHL
3V
PWRDOWN
tTLH
VOH
3V
3V
Output
−3 V
−3 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
SR(tr) +
t
THL
6V
or t
TLH
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns,
tf ≤ 10 ns.
Figure 1. Driver Slew Rate
3V
Generator
(see Note B)
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPHL
tPLH
VOH
3V
PWRDOWN
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns,
tf ≤ 10 ns.
Figure 2. Driver Pulse Skew
EN
0V
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
50 Ω
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 3. Receiver Propagation Delay Times
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7
TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
PARAMETER MEASUREMENT INFORMATION (continued)
VCC
GND
S1
3V
Input
1.5 V
RL
3 V or 0 V
0V
tPZH
(S1 at GND)
tPHZ
Output
CL
(see Note A)
EN
S1 at GND)
VOH
Output
50%
0.3 V
Generator
(see Note B)
1.5 V
50 Ω
tPLZ
(S1 at VCC)
0.3 V
Output
50%
VOL
tPZL
(S1 at VCC)
TEST CIRCUIT
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 4. Receiver Enable and Disable Times
8
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TRSF3222E
3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER
WITH ±15-kV ESD PROTECTION
www.ti.com
SLLS823 – JULY 2007
APPLICATION INFORMATION
1
EN
2
+
C1
−
3
C3†
+
20
Powerdown
VCC
C1+
V+
GND
19
18
17
C1−
16
5
C2+
−
6
7
DOUT2
RIN2
−
15
C2−
14
V−
RIN1
ROUT1
NC
+
13
8
9
12
5 kW
ROUT2
DOUT1
5 kW
+
C4
+ C
BYPASS
− = 0.1 µF
−
4
C2
PWRDOWN
11
10
DIN1
DIN2
NC
† C3 can be connected to V
CC or GND.
NOTES: A. Resistor values shown are nominal.
B. NC − No internal connection
C. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be
connected as shown.
VCC vs CAPACITOR VALUES
VCC
3.3 V " 0.3 V
C1
0.1 µF
C2, C3, and C4
0.1 µF
5 V " 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
Figure 5. Typical Operating Circuit and Capacitor Values
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9
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TRSF3222ECDB
ACTIVE
SSOP
DB
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
RT22EC
TRSF3222ECDWR
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
TRSF3222EC
TRSF3222ECPWR
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
RT22EC
TRSF3222EIDW
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF3222EI
TRSF3222EIDWR
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF3222EI
TRSF3222EIPW
ACTIVE
TSSOP
PW
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT22EI
TRSF3222EIPWG4
ACTIVE
TSSOP
PW
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT22EI
TRSF3222EIPWR
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT22EI
TRSF3222EIPWRG4
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT22EI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
TRSF3222ECDWR
SOIC
TRSF3222ECPWR
TRSF3222EIDWR
TRSF3222EIPWR
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
13.3
2.7
12.0
24.0
Q1
DW
20
2000
330.0
24.4
10.8
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
SOIC
DW
20
2000
330.0
24.4
10.8
13.3
2.7
12.0
24.0
Q1
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TRSF3222ECDWR
SOIC
DW
20
2000
367.0
367.0
45.0
TRSF3222ECPWR
TSSOP
PW
20
2000
367.0
367.0
38.0
TRSF3222EIDWR
SOIC
DW
20
2000
367.0
367.0
45.0
TRSF3222EIPWR
TSSOP
PW
20
2000
367.0
367.0
38.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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