CYStech Electronics Corp. N-Channel Enhancement Mode Power MOSFET Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 1/11 BVDSS : 650V RDS(ON) : 3.0Ω(typ.) MTN4N65I3 ID : 4A Description The MTN4N65I3 is a N-channel enhancement-mode MOSFET, providing the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. The TO-251 package is universally preferred for all commercial-industrial applications Features • Low On Resistance • Simple Drive Requirement • Low Gate Charge • Fast Switching Characteristic • RoHS compliant package Applications • Open Framed Power Supply • Adapter • STB Symbol Outline MTN4N65I3 G:Gate D:Drain S:Source MTN4N65I3 TO-251 TO-251S G G D S D S CYStek Product Specification Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 2/11 CYStech Electronics Corp. Ordering Information Device MTN4N65I3-0-UA-G MTN4N65I3S-0-UA-G Package TO-251 (RoHS compliant and halogen-free package) TO-251S (RoHS compliant and halogen-free package) Shipping 80 pcs/tube, 50 tubes/box 80 pcs/tube, 50 tubes/box Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, UA : 80 pcs / tube, 50 tubes/box Product rank, zero for no rank products Product name Absolute Maximum Ratings (TC=25°C) Parameter Symbol Limits Unit Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current @TC=100°C Pulsed Drain Current @ VGS=10V (Note 1) Single Pulse Avalanche Energy (Note 2) Avalanche Current (Note 1) Repetitive Avalanche Energy (Note 1) Peak Diode Recovery dv/dt (Note 3) Maximum Temperature for Soldering @ Lead at 0.125 in(0.318mm) from case for 10 seconds Total Power Dissipation (TA=25℃) Total Power Dissipation (TC=25℃) Linear Derating Factor Operating Junction and Storage Temperature VDS VGS ID ID IDM EAS IAR EAR dv/dt 650 ±30 4 2.4 16 69 4 4.8 4.5 V V A A A mJ A mJ V/ns TL 300 °C 1.14 48 0.38 -55~+150 W W W/°C °C PD Tj, Tstg Note : 1.Repetitive rating; pulse width limited by maximum junction temperature. 2. IAS=4A, VDD=50V, L=8mH, RG=25Ω, starting TJ=+25℃. 3. ISD≤4A, dI/dt≤100A/μs, VDD≤BVDSS, starting TJ=+25℃. Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max MTN4N65I3 Symbol Rth,j-c Rth,j-a Value 2.6 110 Unit °C/W °C/W CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 3/11 Characteristics (TC=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions 650 2.0 - 0.6 2.3 3.0 4.0 ±100 1 10 3.5 V V/°C V S nA μA μA Ω VGS=0, ID=250μA, Tj=25℃ Reference to 25°C, ID=250μA VDS = VGS, ID=250μA VDS =15V, ID=2A VGS=±30 VDS =650V, VGS =0 VDS =520V, VGS =0, TC=125°C VGS =10V, ID=2A 11 2.6 4.6 15 33 30 37 568 51 9.6 - 280 2 1.5 4 16 - Static BVDSS ∆BVDSS/∆Tj VGS(th) *GFS IGSS IDSS *RDS(ON) Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Source-Drain Diode *VSD *IS *ISM *trr *Qrr - nC ID=4A, VDD=520V, VGS=10V ns VDD=325V, ID=4A, VGS=10V, RG=25Ω pF VGS=0V, VDS=25V, f=1MHz V IS=4A, VGS=0V A ns μC VGS=0, IF=4A, dI/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% MTN4N65I3 CYStek Product Specification Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 4/11 CYStech Electronics Corp. Typical Characteristics Static Drain-Source On-resistance vs Ambient Temperature Typical Output Characteristics 7 7 15V 10V 9V 7V 5 6V Static Drain-Source On-state Resistance-RDS(on) (Ω) Drain Current - ID(A) 6 5.5V 4 3 5V 2 6 5 4 3 ID=2A, VGS=10V 2 1 VGS=4.5V 0 0 10 20 30 40 Drain-Source Voltage -VDS(V) 50 1 -100 60 150 4 6 VGS=10V Ta=25°C VDS=10V Drain Current-I D(on) (A) 3.5 4 3 2.5 2 1.5 1 0.5 0 2 0.1 1 0 10 5 10 15 Gate-Source Voltage-VGS(V) Drain Current-ID(A) 100 20 Reverse Drain Current-I DR (A) Ta=25°C 15 10 5 ID=2A 20 Body Diode Forward Voltage Variation with Source Current and Temperature Static Drain-Source On-State Resistance vs Gate-Source Voltage Static Drain-Source On-State Resistance-R DS(ON)(Ω) 0 50 100 Ambient Temperature-Ta(°C) Drain Current vs Gate-Source Voltage Static Drain-Source On-State resistance vs Drain Current Static Drain-Source On-State ResistanceRDS(on) (Ω) -50 VGS=0V 10 Ta=150°C 1 Ta=25°C 0.1 0 0 MTN4N65I3 2 4 6 8 Gate-Source Voltage-VGS(V) 10 12 0 0.2 0.4 0.6 0.8 1 1.2 1.4 Source Drain Voltage -VSD(V) CYStek Product Specification Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 5/11 CYStech Electronics Corp. Typical Characteristics(Cont.) Brekdown Voltage vs Ambient Temperature Capacitance vs Reverse Voltage 1000 Drain-Source Breakdown Voltage BVDSS(V) 850 Capacitance-(pF) Ciss 100 Coss 10 Crss 800 750 700 650 ID=250μA, VGS=0V f=1MHz 1 0 5 10 15 20 25 Drain-to-Source Voltage-VDS (V) 600 -100 30 -50 50 100 150 200 Gate Charge Characteristics Maximum Safe Operating Area 12 100 Operation in this area is limited by RDS(ON) VDS=130V 10μs 10 100μs 1ms 10ms 1 100ms DC Single pulse Tc=25°C Tj=150°C 0.1 Gate-Source Voltage---VGS(V) Drain Current --- ID(A) 0 Ambient Temperature-Tj(°C) 10 VDS=325V 8 VDS=520V 6 4 2 ID=4A 0 0.01 1 10 100 Drain-Source Voltage -VDS(V) 1000 0 2 4 6 8 10 12 Total Gate Charge---Qg(nC) Maximum Drain Current vs Case Temperature 5 Maximum Drain Current---I D(A) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 25 50 75 100 125 150 175 Case Temperature---TC (°C) MTN4N65I3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 6/11 Typical Characteristics(Cont.) Transient Thermal Response Curves 10 ZθJC(t), Thermal Response D=0.5 1 1.ZθJC(t)=2.6 °C/W max. 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*ZθJC(t) 0.2 0.1 0.05 0.1 0.02 0.01 Single Pulse 0.01 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 t1, Square Wave Pulse Duration(s) MTN4N65I3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 7/11 Test Circuit and Waveforms MTN4N65I3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 8/11 Test Circuit and Waveforms(Cont.) MTN4N65I3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 9/11 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTN4N65I3 CYStek Product Specification Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 10/11 CYStech Electronics Corp. TO-251 Dimension Marking: Product Name Date Code CYS 4N65 □□□□ Style: Pin 1.Gate 2.Drain 3.Source 3-Lead TO-251 Plastic Package CYStek Package Code: I3 Inches Min. Max. 0.2500 0.2618 0.2047 0.2126 0.5709 0.5866 0.0276 0.0354 0.0199 0.0276 0.0886 0.0925 0.0886 0.0925 0.0169 0.0228 DIM A B C D E F G H Millimeters Min. Max. 6.35 6.65 5.20 5.40 14.50 14.90 0.70 0.90 0.50 0.70 2.25 2.35 2.25 2.35 0.43 0.58 DIM I J K L M N S T Inches Min. Max. 0.0866 0.0945 0.2126 0.2244 0.2992 0.3071 0.0453 0.0492 0.0169 0.0228 0.1181 REF 0.1969 REF 0.1496 REF Millimeters Min. Max. 2.20 2.40 5.40 5.70 7.60 7.80 1.15 1.25 0.43 0.58 3.00 REF 5.00 REF 3.80 REF Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. MTN4N65I3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C797I3 Issued Date : 2010.03.29 Revised Date : 2013.10.18 Page No. : 11/11 TO-251S Dimension Marking : Device Name Date Code 3-Lead TO-251S Plastic Package CYStek Package Code: I3 Style : Pin 1. Gate 2. Drain Inches Min. Max. 0.2559 0.2638 0.2020 0.2126 0.4094 0.4331 0.0280 0.0319 0.0858 0.0941 0.0858 0.0941 0.0181 0.0220 0.0902 0.0937 DIM A B C E F G H I Millimeters Min. Max. 6.50 6.70 5.13 5.46 10.40 11.00 0.71 0.81 2.18 2.39 2.18 2.39 0.46 0.56 2.29 2.38 DIM J K L M S T U V Inches Min. Max. 0.2362 0.2441 0.1299 0.1457 0.0358 0.0437 0.0181 0.0220 0.1902 REF 0.2106 REF 0.0701 REF 0.0299 REF 3. Source Millimeters Min. Max. 6.00 6.20 3.30 3.70 0.91 1.11 0.46 0.56 4.83 REF 5.35 REF 1.78 REF 0.76 REF Notes: 1.Controlling dimension: inch. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: Pure tin plated • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTN4N65I3 CYStek Product Specification